xref: /OK3568_Linux_fs/kernel/include/uapi/misc/cxl.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright 2014 IBM Corp.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
6*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License
7*4882a593Smuzhiyun  * as published by the Free Software Foundation; either version
8*4882a593Smuzhiyun  * 2 of the License, or (at your option) any later version.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef _UAPI_MISC_CXL_H
12*4882a593Smuzhiyun #define _UAPI_MISC_CXL_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/types.h>
15*4882a593Smuzhiyun #include <linux/ioctl.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun struct cxl_ioctl_start_work {
19*4882a593Smuzhiyun 	__u64 flags;
20*4882a593Smuzhiyun 	__u64 work_element_descriptor;
21*4882a593Smuzhiyun 	__u64 amr;
22*4882a593Smuzhiyun 	__s16 num_interrupts;
23*4882a593Smuzhiyun 	__u16 tid;
24*4882a593Smuzhiyun 	__s32 reserved1;
25*4882a593Smuzhiyun 	__u64 reserved2;
26*4882a593Smuzhiyun 	__u64 reserved3;
27*4882a593Smuzhiyun 	__u64 reserved4;
28*4882a593Smuzhiyun 	__u64 reserved5;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define CXL_START_WORK_AMR		0x0000000000000001ULL
32*4882a593Smuzhiyun #define CXL_START_WORK_NUM_IRQS		0x0000000000000002ULL
33*4882a593Smuzhiyun #define CXL_START_WORK_ERR_FF		0x0000000000000004ULL
34*4882a593Smuzhiyun #define CXL_START_WORK_TID		0x0000000000000008ULL
35*4882a593Smuzhiyun #define CXL_START_WORK_ALL		(CXL_START_WORK_AMR |\
36*4882a593Smuzhiyun 					 CXL_START_WORK_NUM_IRQS |\
37*4882a593Smuzhiyun 					 CXL_START_WORK_ERR_FF |\
38*4882a593Smuzhiyun 					 CXL_START_WORK_TID)
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Possible modes that an afu can be in */
42*4882a593Smuzhiyun #define CXL_MODE_DEDICATED   0x1
43*4882a593Smuzhiyun #define CXL_MODE_DIRECTED    0x2
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* possible flags for the cxl_afu_id flags field */
46*4882a593Smuzhiyun #define CXL_AFUID_FLAG_SLAVE    0x1  /* In directed-mode afu is in slave mode */
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun struct cxl_afu_id {
49*4882a593Smuzhiyun 	__u64 flags;     /* One of CXL_AFUID_FLAG_X */
50*4882a593Smuzhiyun 	__u32 card_id;
51*4882a593Smuzhiyun 	__u32 afu_offset;
52*4882a593Smuzhiyun 	__u32 afu_mode;  /* one of the CXL_MODE_X */
53*4882a593Smuzhiyun 	__u32 reserved1;
54*4882a593Smuzhiyun 	__u64 reserved2;
55*4882a593Smuzhiyun 	__u64 reserved3;
56*4882a593Smuzhiyun 	__u64 reserved4;
57*4882a593Smuzhiyun 	__u64 reserved5;
58*4882a593Smuzhiyun 	__u64 reserved6;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /* base adapter image header is included in the image */
62*4882a593Smuzhiyun #define CXL_AI_NEED_HEADER	0x0000000000000001ULL
63*4882a593Smuzhiyun #define CXL_AI_ALL		CXL_AI_NEED_HEADER
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define CXL_AI_HEADER_SIZE 128
66*4882a593Smuzhiyun #define CXL_AI_BUFFER_SIZE 4096
67*4882a593Smuzhiyun #define CXL_AI_MAX_ENTRIES 256
68*4882a593Smuzhiyun #define CXL_AI_MAX_CHUNK_SIZE (CXL_AI_BUFFER_SIZE * CXL_AI_MAX_ENTRIES)
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun struct cxl_adapter_image {
71*4882a593Smuzhiyun 	__u64 flags;
72*4882a593Smuzhiyun 	__u64 data;
73*4882a593Smuzhiyun 	__u64 len_data;
74*4882a593Smuzhiyun 	__u64 len_image;
75*4882a593Smuzhiyun 	__u64 reserved1;
76*4882a593Smuzhiyun 	__u64 reserved2;
77*4882a593Smuzhiyun 	__u64 reserved3;
78*4882a593Smuzhiyun 	__u64 reserved4;
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /* ioctl numbers */
82*4882a593Smuzhiyun #define CXL_MAGIC 0xCA
83*4882a593Smuzhiyun /* AFU devices */
84*4882a593Smuzhiyun #define CXL_IOCTL_START_WORK		_IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work)
85*4882a593Smuzhiyun #define CXL_IOCTL_GET_PROCESS_ELEMENT	_IOR(CXL_MAGIC, 0x01, __u32)
86*4882a593Smuzhiyun #define CXL_IOCTL_GET_AFU_ID            _IOR(CXL_MAGIC, 0x02, struct cxl_afu_id)
87*4882a593Smuzhiyun /* adapter devices */
88*4882a593Smuzhiyun #define CXL_IOCTL_DOWNLOAD_IMAGE        _IOW(CXL_MAGIC, 0x0A, struct cxl_adapter_image)
89*4882a593Smuzhiyun #define CXL_IOCTL_VALIDATE_IMAGE        _IOW(CXL_MAGIC, 0x0B, struct cxl_adapter_image)
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun #define CXL_READ_MIN_SIZE 0x1000 /* 4K */
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* Events from read() */
94*4882a593Smuzhiyun enum cxl_event_type {
95*4882a593Smuzhiyun 	CXL_EVENT_RESERVED      = 0,
96*4882a593Smuzhiyun 	CXL_EVENT_AFU_INTERRUPT = 1,
97*4882a593Smuzhiyun 	CXL_EVENT_DATA_STORAGE  = 2,
98*4882a593Smuzhiyun 	CXL_EVENT_AFU_ERROR     = 3,
99*4882a593Smuzhiyun 	CXL_EVENT_AFU_DRIVER    = 4,
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun struct cxl_event_header {
103*4882a593Smuzhiyun 	__u16 type;
104*4882a593Smuzhiyun 	__u16 size;
105*4882a593Smuzhiyun 	__u16 process_element;
106*4882a593Smuzhiyun 	__u16 reserved1;
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun struct cxl_event_afu_interrupt {
110*4882a593Smuzhiyun 	__u16 flags;
111*4882a593Smuzhiyun 	__u16 irq; /* Raised AFU interrupt number */
112*4882a593Smuzhiyun 	__u32 reserved1;
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun struct cxl_event_data_storage {
116*4882a593Smuzhiyun 	__u16 flags;
117*4882a593Smuzhiyun 	__u16 reserved1;
118*4882a593Smuzhiyun 	__u32 reserved2;
119*4882a593Smuzhiyun 	__u64 addr;
120*4882a593Smuzhiyun 	__u64 dsisr;
121*4882a593Smuzhiyun 	__u64 reserved3;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun struct cxl_event_afu_error {
125*4882a593Smuzhiyun 	__u16 flags;
126*4882a593Smuzhiyun 	__u16 reserved1;
127*4882a593Smuzhiyun 	__u32 reserved2;
128*4882a593Smuzhiyun 	__u64 error;
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun struct cxl_event_afu_driver_reserved {
132*4882a593Smuzhiyun 	/*
133*4882a593Smuzhiyun 	 * Defines the buffer passed to the cxl driver by the AFU driver.
134*4882a593Smuzhiyun 	 *
135*4882a593Smuzhiyun 	 * This is not ABI since the event header.size passed to the user for
136*4882a593Smuzhiyun 	 * existing events is set in the read call to sizeof(cxl_event_header)
137*4882a593Smuzhiyun 	 * + sizeof(whatever event is being dispatched) and the user is already
138*4882a593Smuzhiyun 	 * required to use a 4K buffer on the read call.
139*4882a593Smuzhiyun 	 *
140*4882a593Smuzhiyun 	 * Of course the contents will be ABI, but that's up the AFU driver.
141*4882a593Smuzhiyun 	 */
142*4882a593Smuzhiyun 	__u32 data_size;
143*4882a593Smuzhiyun 	__u8 data[];
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun struct cxl_event {
147*4882a593Smuzhiyun 	struct cxl_event_header header;
148*4882a593Smuzhiyun 	union {
149*4882a593Smuzhiyun 		struct cxl_event_afu_interrupt irq;
150*4882a593Smuzhiyun 		struct cxl_event_data_storage fault;
151*4882a593Smuzhiyun 		struct cxl_event_afu_error afu_error;
152*4882a593Smuzhiyun 		struct cxl_event_afu_driver_reserved afu_driver_event;
153*4882a593Smuzhiyun 	};
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #endif /* _UAPI_MISC_CXL_H */
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