xref: /OK3568_Linux_fs/kernel/include/uapi/linux/switchtec_ioctl.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Microsemi Switchtec PCIe Driver
4*4882a593Smuzhiyun  * Copyright (c) 2017, Microsemi Corporation
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
7*4882a593Smuzhiyun  * under the terms and conditions of the GNU General Public License,
8*4882a593Smuzhiyun  * version 2, as published by the Free Software Foundation.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * This program is distributed in the hope it will be useful, but WITHOUT
11*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13*4882a593Smuzhiyun  * more details.
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #ifndef _UAPI_LINUX_SWITCHTEC_IOCTL_H
18*4882a593Smuzhiyun #define _UAPI_LINUX_SWITCHTEC_IOCTL_H
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/types.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_CFG0	0
23*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_CFG1	1
24*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_IMG0	2
25*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_IMG1	3
26*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_NVLOG	4
27*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR0	5
28*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR1	6
29*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR2	7
30*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR3	8
31*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR4	9
32*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR5	10
33*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR6	11
34*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_VENDOR7	12
35*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_BL2_0	13
36*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_BL2_1	14
37*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_MAP_0	15
38*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_MAP_1	16
39*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_KEY_0	17
40*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_KEY_1	18
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define SWITCHTEC_NUM_PARTITIONS_GEN3	13
43*4882a593Smuzhiyun #define SWITCHTEC_NUM_PARTITIONS_GEN4	19
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* obsolete: for compatibility with old userspace software */
46*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_NUM_PARTITIONS	SWITCHTEC_NUM_PARTITIONS_GEN3
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun struct switchtec_ioctl_flash_info {
49*4882a593Smuzhiyun 	__u64 flash_length;
50*4882a593Smuzhiyun 	__u32 num_partitions;
51*4882a593Smuzhiyun 	__u32 padding;
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_ACTIVE  1
55*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PART_RUNNING 2
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun struct switchtec_ioctl_flash_part_info {
58*4882a593Smuzhiyun 	__u32 flash_partition;
59*4882a593Smuzhiyun 	__u32 address;
60*4882a593Smuzhiyun 	__u32 length;
61*4882a593Smuzhiyun 	__u32 active;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun struct switchtec_ioctl_event_summary_legacy {
65*4882a593Smuzhiyun 	__u64 global;
66*4882a593Smuzhiyun 	__u64 part_bitmap;
67*4882a593Smuzhiyun 	__u32 local_part;
68*4882a593Smuzhiyun 	__u32 padding;
69*4882a593Smuzhiyun 	__u32 part[48];
70*4882a593Smuzhiyun 	__u32 pff[48];
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun struct switchtec_ioctl_event_summary {
74*4882a593Smuzhiyun 	__u64 global;
75*4882a593Smuzhiyun 	__u64 part_bitmap;
76*4882a593Smuzhiyun 	__u32 local_part;
77*4882a593Smuzhiyun 	__u32 padding;
78*4882a593Smuzhiyun 	__u32 part[48];
79*4882a593Smuzhiyun 	__u32 pff[255];
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_STACK_ERROR		0
83*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_PPU_ERROR			1
84*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_ISP_ERROR			2
85*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_SYS_RESET			3
86*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FW_EXC			4
87*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FW_NMI			5
88*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL		6
89*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FW_FATAL			7
90*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP		8
91*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC	9
92*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP		10
93*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC	11
94*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_GPIO_INT			12
95*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_PART_RESET		13
96*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_MRPC_COMP			14
97*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC		15
98*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP	16
99*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_AER_IN_P2P		17
100*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_AER_IN_VEP		18
101*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_DPC			19
102*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_CTS			20
103*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_HOTPLUG			21
104*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_IER			22
105*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_THRESH			23
106*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_POWER_MGMT		24
107*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING		25
108*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FORCE_SPEED		26
109*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT		27
110*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_LINK_STATE		28
111*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_GFMS			29
112*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_INTERCOMM_REQ_NOTIFY	30
113*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_UEC			31
114*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_MAX_EVENTS			32
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX -1
117*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_IDX_ALL -2
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR     (1 << 0)
120*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL   (1 << 1)
121*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG    (1 << 2)
122*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI    (1 << 3)
123*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL  (1 << 4)
124*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL  (1 << 5)
125*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG   (1 << 6)
126*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI   (1 << 7)
127*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL (1 << 8)
128*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED    (~0x1ff)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun struct switchtec_ioctl_event_ctl {
131*4882a593Smuzhiyun 	__u32 event_id;
132*4882a593Smuzhiyun 	__s32 index;
133*4882a593Smuzhiyun 	__u32 flags;
134*4882a593Smuzhiyun 	__u32 occurred;
135*4882a593Smuzhiyun 	__u32 count;
136*4882a593Smuzhiyun 	__u32 data[5];
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PFF_VEP 100
140*4882a593Smuzhiyun struct switchtec_ioctl_pff_port {
141*4882a593Smuzhiyun 	__u32 pff;
142*4882a593Smuzhiyun 	__u32 partition;
143*4882a593Smuzhiyun 	__u32 port;
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_FLASH_INFO \
147*4882a593Smuzhiyun 	_IOR('W', 0x40, struct switchtec_ioctl_flash_info)
148*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_FLASH_PART_INFO \
149*4882a593Smuzhiyun 	_IOWR('W', 0x41, struct switchtec_ioctl_flash_part_info)
150*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_SUMMARY \
151*4882a593Smuzhiyun 	_IOR('W', 0x42, struct switchtec_ioctl_event_summary)
152*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_SUMMARY_LEGACY \
153*4882a593Smuzhiyun 	_IOR('W', 0x42, struct switchtec_ioctl_event_summary_legacy)
154*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_EVENT_CTL \
155*4882a593Smuzhiyun 	_IOWR('W', 0x43, struct switchtec_ioctl_event_ctl)
156*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PFF_TO_PORT \
157*4882a593Smuzhiyun 	_IOWR('W', 0x44, struct switchtec_ioctl_pff_port)
158*4882a593Smuzhiyun #define SWITCHTEC_IOCTL_PORT_TO_PFF \
159*4882a593Smuzhiyun 	_IOWR('W', 0x45, struct switchtec_ioctl_pff_port)
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun #endif
162