1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef RK_VCM_HEAD_H 5*4882a593Smuzhiyun #define RK_VCM_HEAD_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <linux/types.h> 8*4882a593Smuzhiyun #include <linux/time_types.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define RK_VCM_HEAD_VERSION KERNEL_VERSION(0, 0x02, 0x0) 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Focus position values: 13*4882a593Smuzhiyun * 65 logical positions ( 0 - 64 ) 14*4882a593Smuzhiyun * where 64 is the setting for infinity and 0 for macro 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun #define VCMDRV_MAX_LOG 64U 17*4882a593Smuzhiyun #define VCMDRV_SETZOOM_MAXCNT 300U 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_MAX_CURRENT "rockchip,vcm-max-current" 20*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_START_CURRENT "rockchip,vcm-start-current" 21*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_RATED_CURRENT "rockchip,vcm-rated-current" 22*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_STEP_MODE "rockchip,vcm-step-mode" 23*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_DLC_ENABLE "rockchip,vcm-dlc-enable" 24*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_MCLK "rockchip,vcm-mclk" 25*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_T_SRC "rockchip,vcm-t-src" 26*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_T_DIV "rockchip,vcm-t-div" 27*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_ADVANCED_MODE "rockchip,vcm-adcanced-mode" 28*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_SAC_MODE "rockchip,vcm-sac-mode" 29*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_SAC_TIME "rockchip,vcm-sac-time" 30*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_PRESC "rockchip,vcm-prescl" 31*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_NRC_EN "rockchip,vcm-nrc-en" 32*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_NRC_MODE "rockchip,vcm-nrc-mode" 33*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_NRC_PRESET "rockchip,vcm-nrc-preset" 34*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_NRC_INFL "rockchip,vcm-nrc-infl" 35*4882a593Smuzhiyun #define OF_CAMERA_VCMDRV_NRC_TIME "rockchip,vcm-nrc-time" 36*4882a593Smuzhiyun #define VCMDRV_SETZOOM_MAXCNT 300U 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define RK_VIDIOC_VCM_TIMEINFO \ 39*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rk_cam_vcm_tim) 40*4882a593Smuzhiyun #define RK_VIDIOC_IRIS_TIMEINFO \ 41*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 1, struct rk_cam_vcm_tim) 42*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM_TIMEINFO \ 43*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 2, struct rk_cam_vcm_tim) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define RK_VIDIOC_GET_VCM_CFG \ 46*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 3, struct rk_cam_vcm_cfg) 47*4882a593Smuzhiyun #define RK_VIDIOC_SET_VCM_CFG \ 48*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 4, struct rk_cam_vcm_cfg) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define RK_VIDIOC_FOCUS_CORRECTION \ 51*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 5, unsigned int) 52*4882a593Smuzhiyun #define RK_VIDIOC_IRIS_CORRECTION \ 53*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 6, unsigned int) 54*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM_CORRECTION \ 55*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 7, unsigned int) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define RK_VIDIOC_FOCUS_SET_BACKLASH \ 58*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 8, unsigned int) 59*4882a593Smuzhiyun #define RK_VIDIOC_IRIS_SET_BACKLASH \ 60*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 9, unsigned int) 61*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM_SET_BACKLASH \ 62*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 10, unsigned int) 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM1_TIMEINFO \ 65*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 11, struct rk_cam_vcm_tim) 66*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM1_CORRECTION \ 67*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 12, unsigned int) 68*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM1_SET_BACKLASH \ 69*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 13, unsigned int) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define RK_VIDIOC_ZOOM_SET_POSITION \ 72*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 14, struct rk_cam_set_zoom) 73*4882a593Smuzhiyun #define RK_VIDIOC_FOCUS_SET_POSITION \ 74*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 15, struct rk_cam_set_focus) 75*4882a593Smuzhiyun #define RK_VIDIOC_MODIFY_POSITION \ 76*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 16, struct rk_cam_modify_pos) 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define RK_VIDIOC_SET_VCM_MAX_LOGICALPOS \ 79*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 17, unsigned int) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define RK_VIDIOC_COMPAT_VCM_TIMEINFO \ 82*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rk_cam_compat_vcm_tim) 83*4882a593Smuzhiyun #define RK_VIDIOC_COMPAT_IRIS_TIMEINFO \ 84*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 1, struct rk_cam_compat_vcm_tim) 85*4882a593Smuzhiyun #define RK_VIDIOC_COMPAT_ZOOM_TIMEINFO \ 86*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 2, struct rk_cam_compat_vcm_tim) 87*4882a593Smuzhiyun #define RK_VIDIOC_COMPAT_ZOOM1_TIMEINFO \ 88*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 11, struct rk_cam_compat_vcm_tim) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun struct rk_cam_modify_pos { 91*4882a593Smuzhiyun __s32 focus_pos; 92*4882a593Smuzhiyun __s32 zoom_pos; 93*4882a593Smuzhiyun __s32 zoom1_pos; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun struct rk_cam_set_focus { 97*4882a593Smuzhiyun _Bool is_need_reback; 98*4882a593Smuzhiyun __s32 focus_pos; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun struct rk_cam_zoom_pos { 102*4882a593Smuzhiyun __s32 zoom_pos; 103*4882a593Smuzhiyun __s32 focus_pos; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun struct rk_cam_set_zoom { 107*4882a593Smuzhiyun _Bool is_need_zoom_reback; 108*4882a593Smuzhiyun _Bool is_need_focus_reback; 109*4882a593Smuzhiyun __u32 setzoom_cnt; 110*4882a593Smuzhiyun struct rk_cam_zoom_pos zoom_pos[VCMDRV_SETZOOM_MAXCNT]; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun struct rk_cam_vcm_tim { 114*4882a593Smuzhiyun struct __kernel_old_timeval vcm_start_t; 115*4882a593Smuzhiyun struct __kernel_old_timeval vcm_end_t; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #ifndef __kernel_old_timeval32 119*4882a593Smuzhiyun struct __kernel_old_timeval32 { 120*4882a593Smuzhiyun __s32 tv_sec; 121*4882a593Smuzhiyun __s32 tv_usec; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun #endif 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun struct rk_cam_compat_vcm_tim { 126*4882a593Smuzhiyun struct __kernel_old_timeval32 vcm_start_t; 127*4882a593Smuzhiyun struct __kernel_old_timeval32 vcm_end_t; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun struct rk_cam_vcm_cfg { 131*4882a593Smuzhiyun int start_ma; 132*4882a593Smuzhiyun int rated_ma; 133*4882a593Smuzhiyun int step_mode; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #endif /* RK_VCM_HEAD_H */ 137*4882a593Smuzhiyun 138