1*4882a593Smuzhiyun /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Rockchip hdmirx driver 4*4882a593Smuzhiyun * Copyright (C) 2022 Rockchip Electronics Co., Ltd. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _UAPI_RK_HDMIRX_CONFIG_H 8*4882a593Smuzhiyun #define _UAPI_RK_HDMIRX_CONFIG_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun #include <linux/v4l2-controls.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun enum mute_type { 14*4882a593Smuzhiyun MUTE_OFF = 0, 15*4882a593Smuzhiyun MUTE_VIDEO = 1, 16*4882a593Smuzhiyun MUTE_AUDIO = 2, 17*4882a593Smuzhiyun MUTE_ALL = 3, 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun enum audio_stat { 21*4882a593Smuzhiyun AUDIO_OFF = 0, 22*4882a593Smuzhiyun AUDIO_ON = 1, 23*4882a593Smuzhiyun AUDIO_UNSTABLE = 2, 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun enum input_mode { 27*4882a593Smuzhiyun MODE_HDMI = 0, 28*4882a593Smuzhiyun MODE_DVI = 1, 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun enum hdmirx_color_range { 32*4882a593Smuzhiyun HDMIRX_DEFAULT_RANGE = 0, 33*4882a593Smuzhiyun HDMIRX_LIMIT_RANGE = 1, 34*4882a593Smuzhiyun HDMIRX_FULL_RANGE = 2, 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun enum hdmirx_color_space { 38*4882a593Smuzhiyun HDMIRX_XVYCC601 = 0, 39*4882a593Smuzhiyun HDMIRX_XVYCC709 = 1, 40*4882a593Smuzhiyun HDMIRX_SYCC601 = 2, 41*4882a593Smuzhiyun HDMIRX_ADOBE_YCC601 = 3, 42*4882a593Smuzhiyun HDMIRX_ADOBE_RGB = 4, 43*4882a593Smuzhiyun HDMIRX_BT2020_YCC_CONST_LUM = 5, 44*4882a593Smuzhiyun HDMIRX_BT2020_RGB_OR_YCC = 6, 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* Private v4l2 ioctl */ 48*4882a593Smuzhiyun #define RK_HDMIRX_CMD_GET_FPS \ 49*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 0, int) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define RK_HDMIRX_CMD_GET_SIGNAL_STABLE_STATUS \ 52*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 1, int) 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define RK_HDMIRX_CMD_GET_HDCP_STATUS \ 55*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 2, int) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define RK_HDMIRX_CMD_SET_MUTE \ 58*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 3, int) 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define RK_HDMIRX_CMD_SET_HPD \ 61*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 4, int) 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define RK_HDMIRX_CMD_SET_AUDIO_STATE \ 64*4882a593Smuzhiyun _IOW('V', BASE_VIDIOC_PRIVATE + 5, int) 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define RK_HDMIRX_CMD_SOFT_RESET \ 67*4882a593Smuzhiyun _IO('V', BASE_VIDIOC_PRIVATE + 6) 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define RK_HDMIRX_CMD_RESET_AUDIO_FIFO \ 70*4882a593Smuzhiyun _IO('V', BASE_VIDIOC_PRIVATE + 7) 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define RK_HDMIRX_CMD_GET_INPUT_MODE \ 73*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 8, int) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define RK_HDMIRX_CMD_GET_COLOR_RANGE \ 76*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 9, int) 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define RK_HDMIRX_CMD_GET_COLOR_SPACE \ 79*4882a593Smuzhiyun _IOR('V', BASE_VIDIOC_PRIVATE + 10, int) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* Private v4l2 event */ 82*4882a593Smuzhiyun #define RK_HDMIRX_V4L2_EVENT_SIGNAL_LOST \ 83*4882a593Smuzhiyun (V4L2_EVENT_PRIVATE_START + 1) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #endif /* _UAPI_RK_HDMIRX_CONFIG_H */ 86