1 /* SPDX-License-Identifier: (GPL-2.0+ WITH Linux-syscall-note) OR MIT 2 * 3 * Rockchip ISP32 4 * Copyright (C) 2022 Rockchip Electronics Co., Ltd. 5 */ 6 7 #ifndef _UAPI_RK_ISP32_CONFIG_H 8 #define _UAPI_RK_ISP32_CONFIG_H 9 10 #include <linux/types.h> 11 #include <linux/v4l2-controls.h> 12 #include <linux/rk-isp3-config.h> 13 14 #define RKISP_CMD_GET_TB_HEAD_V32 \ 15 _IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkisp32_thunderboot_resmem_head) 16 17 #define ISP32_MODULE_DPCC ISP3X_MODULE_DPCC 18 #define ISP32_MODULE_BLS ISP3X_MODULE_BLS 19 #define ISP32_MODULE_SDG ISP3X_MODULE_SDG 20 #define ISP32_MODULE_LSC ISP3X_MODULE_LSC 21 #define ISP32_MODULE_AWB_GAIN ISP3X_MODULE_AWB_GAIN 22 #define ISP32_MODULE_BDM ISP3X_MODULE_BDM 23 #define ISP32_MODULE_CCM ISP3X_MODULE_CCM 24 #define ISP32_MODULE_GOC ISP3X_MODULE_GOC 25 #define ISP32_MODULE_CPROC ISP3X_MODULE_CPROC 26 #define ISP32_MODULE_IE ISP3X_MODULE_IE 27 #define ISP32_MODULE_RAWAF ISP3X_MODULE_RAWAF 28 #define ISP32_MODULE_RAWAE0 ISP3X_MODULE_RAWAE0 29 #define ISP32_MODULE_RAWAE1 ISP3X_MODULE_RAWAE1 30 #define ISP32_MODULE_RAWAE2 ISP3X_MODULE_RAWAE2 31 #define ISP32_MODULE_RAWAE3 ISP3X_MODULE_RAWAE3 32 #define ISP32_MODULE_RAWAWB ISP3X_MODULE_RAWAWB 33 #define ISP32_MODULE_RAWHIST0 ISP3X_MODULE_RAWHIST0 34 #define ISP32_MODULE_RAWHIST1 ISP3X_MODULE_RAWHIST1 35 #define ISP32_MODULE_RAWHIST2 ISP3X_MODULE_RAWHIST2 36 #define ISP32_MODULE_RAWHIST3 ISP3X_MODULE_RAWHIST3 37 #define ISP32_MODULE_HDRMGE ISP3X_MODULE_HDRMGE 38 #define ISP32_MODULE_RAWNR ISP3X_MODULE_RAWNR 39 #define ISP32_MODULE_GIC ISP3X_MODULE_GIC 40 #define ISP32_MODULE_DHAZ ISP3X_MODULE_DHAZ 41 #define ISP32_MODULE_3DLUT ISP3X_MODULE_3DLUT 42 #define ISP32_MODULE_LDCH ISP3X_MODULE_LDCH 43 #define ISP32_MODULE_GAIN ISP3X_MODULE_GAIN 44 #define ISP32_MODULE_DEBAYER ISP3X_MODULE_DEBAYER 45 #define ISP32_MODULE_BAYNR ISP3X_MODULE_BAYNR 46 #define ISP32_MODULE_BAY3D ISP3X_MODULE_BAY3D 47 #define ISP32_MODULE_YNR ISP3X_MODULE_YNR 48 #define ISP32_MODULE_CNR ISP3X_MODULE_CNR 49 #define ISP32_MODULE_SHARP ISP3X_MODULE_SHARP 50 #define ISP32_MODULE_DRC ISP3X_MODULE_DRC 51 #define ISP32_MODULE_CAC ISP3X_MODULE_CAC 52 #define ISP32_MODULE_CSM ISP3X_MODULE_CSM 53 #define ISP32_MODULE_CGC ISP3X_MODULE_CGC 54 #define ISP32_MODULE_VSM BIT_ULL(45) 55 56 #define ISP32_MODULE_FORCE ISP3X_MODULE_FORCE 57 58 /* Measurement types */ 59 #define ISP32_STAT_RAWAWB ISP3X_STAT_RAWAWB 60 #define ISP32_STAT_RAWAF ISP3X_STAT_RAWAF 61 #define ISP32_STAT_RAWAE0 ISP3X_STAT_RAWAE0 62 #define ISP32_STAT_RAWAE1 ISP3X_STAT_RAWAE1 63 #define ISP32_STAT_RAWAE2 ISP3X_STAT_RAWAE2 64 #define ISP32_STAT_RAWAE3 ISP3X_STAT_RAWAE3 65 #define ISP32_STAT_RAWHST0 ISP3X_STAT_RAWHST0 66 #define ISP32_STAT_RAWHST1 ISP3X_STAT_RAWHST1 67 #define ISP32_STAT_RAWHST2 ISP3X_STAT_RAWHST2 68 #define ISP32_STAT_RAWHST3 ISP3X_STAT_RAWHST3 69 #define ISP32_STAT_BLS ISP3X_STAT_BLS 70 #define ISP32_STAT_DHAZ ISP3X_STAT_DHAZ 71 #define ISP32_STAT_VSM BIT(18) 72 #define ISP32_STAT_INFO2DDR BIT(19) 73 74 #define ISP32_MESH_BUF_NUM ISP3X_MESH_BUF_NUM 75 76 #define ISP32_LSC_GRAD_TBL_SIZE ISP3X_LSC_GRAD_TBL_SIZE 77 #define ISP32_LSC_SIZE_TBL_SIZE ISP3X_LSC_SIZE_TBL_SIZE 78 #define ISP32_LSC_DATA_TBL_SIZE ISP3X_LSC_DATA_TBL_SIZE 79 80 #define ISP32_DEGAMMA_CURVE_SIZE ISP3X_DEGAMMA_CURVE_SIZE 81 82 #define ISP32_GAIN_IDX_NUM ISP3X_GAIN_IDX_NUM 83 #define ISP32_GAIN_LUT_NUM ISP3X_GAIN_LUT_NUM 84 85 #define ISP32_RAWAWB_EXCL_STAT_NUM ISP3X_RAWAWB_EXCL_STAT_NUM 86 #define ISP32_RAWAWB_HSTBIN_NUM ISP3X_RAWAWB_HSTBIN_NUM 87 #define ISP32_RAWAWB_WEIGHT_NUM ISP3X_RAWAWB_WEIGHT_NUM 88 #define ISP32_RAWAWB_SUM_NUM 4 89 #define ISP32_RAWAWB_RAMDATA_NUM ISP3X_RAWAWB_RAMDATA_NUM 90 #define ISP32L_RAWAWB_WEIGHT_NUM 5 91 #define ISP32L_RAWAWB_RAMDATA_RGB_NUM 25 92 #define ISP32L_RAWAWB_RAMDATA_WP_NUM 13 93 94 #define ISP32_RAWAEBIG_SUBWIN_NUM ISP3X_RAWAEBIG_SUBWIN_NUM 95 #define ISP32_RAWAEBIG_MEAN_NUM ISP3X_RAWAEBIG_MEAN_NUM 96 #define ISP32_RAWAELITE_MEAN_NUM ISP3X_RAWAELITE_MEAN_NUM 97 98 #define ISP32_RAWHISTBIG_SUBWIN_NUM ISP3X_RAWHISTBIG_SUBWIN_NUM 99 #define ISP32_RAWHISTLITE_SUBWIN_NUM ISP3X_RAWHISTLITE_SUBWIN_NUM 100 #define ISP32_HIST_BIN_N_MAX ISP3X_HIST_BIN_N_MAX 101 #define ISP32L_HIST_LITE_BIN_N_MAX 64 102 103 #define ISP32_RAWAF_CURVE_NUM ISP3X_RAWAF_CURVE_NUM 104 #define ISP32_RAWAF_HIIR_COE_NUM ISP3X_RAWAF_HIIR_COE_NUM 105 #define ISP32_RAWAF_VFIR_COE_NUM ISP3X_RAWAF_VFIR_COE_NUM 106 #define ISP32_RAWAF_WIN_NUM ISP3X_RAWAF_WIN_NUM 107 #define ISP32_RAWAF_LINE_NUM ISP3X_RAWAF_LINE_NUM 108 #define ISP32_RAWAF_GAMMA_NUM ISP3X_RAWAF_GAMMA_NUM 109 #define ISP32_RAWAF_SUMDATA_NUM ISP3X_RAWAF_SUMDATA_NUM 110 #define ISP32_RAWAF_VIIR_COE_NUM 3 111 #define ISP32_RAWAF_GAUS_COE_NUM 9 112 #define ISP32L_RAWAF_WND_DATA 25 113 114 #define ISP32_DPCC_PDAF_POINT_NUM ISP3X_DPCC_PDAF_POINT_NUM 115 116 #define ISP32_HDRMGE_L_CURVE_NUM ISP3X_HDRMGE_L_CURVE_NUM 117 #define ISP32_HDRMGE_E_CURVE_NUM ISP3X_HDRMGE_E_CURVE_NUM 118 119 #define ISP32_GIC_SIGMA_Y_NUM ISP3X_GIC_SIGMA_Y_NUM 120 121 #define ISP32_CCM_CURVE_NUM 18 122 123 #define ISP32_3DLUT_DATA_NUM ISP3X_3DLUT_DATA_NUM 124 125 #define ISP32_LDCH_MESH_XY_NUM ISP3X_LDCH_MESH_XY_NUM 126 #define ISP32_LDCH_BIC_NUM 36 127 128 #define ISP32_GAMMA_OUT_MAX_SAMPLES ISP3X_GAMMA_OUT_MAX_SAMPLES 129 130 #define ISP32_DHAZ_SIGMA_IDX_NUM ISP3X_DHAZ_SIGMA_IDX_NUM 131 #define ISP32_DHAZ_SIGMA_LUT_NUM ISP3X_DHAZ_SIGMA_LUT_NUM 132 #define ISP32_DHAZ_HIST_WR_NUM ISP3X_DHAZ_HIST_WR_NUM 133 #define ISP32_DHAZ_ENH_CURVE_NUM ISP3X_DHAZ_ENH_CURVE_NUM 134 #define ISP32_DHAZ_HIST_IIR_NUM ISP3X_DHAZ_HIST_IIR_NUM 135 #define ISP32_DHAZ_ENH_LUMA_NUM 17 136 137 #define ISP32_DRC_Y_NUM ISP3X_DRC_Y_NUM 138 139 #define ISP32_CNR_SIGMA_Y_NUM ISP3X_CNR_SIGMA_Y_NUM 140 #define ISP32_CNR_GAUS_COE_NUM 6 141 142 #define ISP32_YNR_XY_NUM ISP3X_YNR_XY_NUM 143 #define ISP32_YNR_NLM_COE_NUM 6 144 145 #define ISP32_BAYNR_XY_NUM ISP3X_BAYNR_XY_NUM 146 #define ISP32_BAYNR_GAIN_NUM 16 147 148 #define ISP32_BAY3D_XY_NUM ISP3X_BAY3D_XY_NUM 149 150 #define ISP32_SHARP_X_NUM ISP3X_SHARP_X_NUM 151 #define ISP32_SHARP_Y_NUM ISP3X_SHARP_Y_NUM 152 #define ISP32_SHARP_GAUS_COEF_NUM ISP3X_SHARP_GAUS_COEF_NUM 153 #define ISP32_SHARP_GAIN_ADJ_NUM 14 154 #define ISP32_SHARP_STRENGTH_NUM 22 155 156 #define ISP32_CAC_STRENGTH_NUM ISP3X_CAC_STRENGTH_NUM 157 158 #define ISP32_CSM_COEFF_NUM ISP3X_CSM_COEFF_NUM 159 160 struct isp32_ldch_cfg { 161 __u8 frm_end_dis; 162 __u8 zero_interp_en; 163 __u8 sample_avr_en; 164 __u8 bic_mode_en; 165 __u8 force_map_en; 166 __u8 map13p3_en; 167 168 __u8 bicubic[ISP32_LDCH_BIC_NUM]; 169 170 __u32 hsize; 171 __u32 vsize; 172 __s32 buf_fd; 173 } __attribute__ ((packed)); 174 175 struct isp32_awb_gain_cfg { 176 /* AWB1_GAIN_G */ 177 __u16 awb1_gain_gb; 178 __u16 awb1_gain_gr; 179 /* AWB1_GAIN_RB */ 180 __u16 awb1_gain_b; 181 __u16 awb1_gain_r; 182 /* AWB0_GAIN0_G */ 183 __u16 gain0_green_b; 184 __u16 gain0_green_r; 185 /* AWB0_GAIN0_RB*/ 186 __u16 gain0_blue; 187 __u16 gain0_red; 188 /* AWB0_GAIN1_G */ 189 __u16 gain1_green_b; 190 __u16 gain1_green_r; 191 /* AWB0_GAIN1_RB*/ 192 __u16 gain1_blue; 193 __u16 gain1_red; 194 /* AWB0_GAIN2_G */ 195 __u16 gain2_green_b; 196 __u16 gain2_green_r; 197 /* AWB0_GAIN2_RB*/ 198 __u16 gain2_blue; 199 __u16 gain2_red; 200 } __attribute__ ((packed)); 201 202 struct isp32_bls_cfg { 203 __u8 enable_auto; 204 __u8 en_windows; 205 __u8 bls1_en; 206 207 __u8 bls_samples; 208 209 struct isp2x_window bls_window1; 210 struct isp2x_window bls_window2; 211 struct isp2x_bls_fixed_val fixed_val; 212 struct isp2x_bls_fixed_val bls1_val; 213 214 __u16 isp_ob_offset; 215 __u16 isp_ob_predgain; 216 __u32 isp_ob_max; 217 } __attribute__ ((packed)); 218 219 struct isp32_ccm_cfg { 220 /* CTRL */ 221 __u8 highy_adjust_dis; 222 __u8 enh_adj_en; 223 __u8 asym_adj_en; 224 /* BOUND_BIT */ 225 __u8 bound_bit; 226 __u8 right_bit; 227 /* COEFF0_R */ 228 __s16 coeff0_r; 229 __s16 coeff1_r; 230 /* COEFF1_R */ 231 __s16 coeff2_r; 232 __s16 offset_r; 233 /* COEFF0_G */ 234 __s16 coeff0_g; 235 __s16 coeff1_g; 236 /* COEFF1_G */ 237 __s16 coeff2_g; 238 __s16 offset_g; 239 /* COEFF0_B */ 240 __s16 coeff0_b; 241 __s16 coeff1_b; 242 /* COEFF1_B */ 243 __s16 coeff2_b; 244 __s16 offset_b; 245 /* COEFF0_Y */ 246 __u16 coeff0_y; 247 __u16 coeff1_y; 248 /* COEFF1_Y */ 249 __u16 coeff2_y; 250 /* ALP_Y */ 251 __u16 alp_y[ISP32_CCM_CURVE_NUM]; 252 /* ENHANCE0 */ 253 __u16 color_coef0_r2y; 254 __u16 color_coef1_g2y; 255 /* ENHANCE1 */ 256 __u16 color_coef2_b2y; 257 __u16 color_enh_rat_max; 258 } __attribute__ ((packed)); 259 260 struct isp32_debayer_cfg { 261 /* CONTROL */ 262 __u8 filter_g_en; 263 __u8 filter_c_en; 264 /* G_INTERP */ 265 __u8 clip_en; 266 __u8 dist_scale; 267 __u8 thed0; 268 __u8 thed1; 269 __u8 select_thed; 270 __u8 max_ratio; 271 /* G_INTERP_FILTER1 */ 272 __s8 filter1_coe1; 273 __s8 filter1_coe2; 274 __s8 filter1_coe3; 275 __s8 filter1_coe4; 276 /* G_INTERP_FILTER2 */ 277 __s8 filter2_coe1; 278 __s8 filter2_coe2; 279 __s8 filter2_coe3; 280 __s8 filter2_coe4; 281 /* C_FILTER_GUIDE_GAUS */ 282 __s8 guid_gaus_coe0; 283 __s8 guid_gaus_coe1; 284 __s8 guid_gaus_coe2; 285 /* C_FILTER_CE_GAUS */ 286 __s8 ce_gaus_coe0; 287 __s8 ce_gaus_coe1; 288 __s8 ce_gaus_coe2; 289 /* C_FILTER_ALPHA_GAUS */ 290 __s8 alpha_gaus_coe0; 291 __s8 alpha_gaus_coe1; 292 __s8 alpha_gaus_coe2; 293 /* C_FILTER_IIR_0 */ 294 __u8 ce_sgm; 295 __u8 exp_shift; 296 /* C_FILTER_IIR_1 */ 297 __u8 wet_clip; 298 __u8 wet_ghost; 299 /* C_FILTER_BF */ 300 __u8 bf_clip; 301 __u8 bf_curwgt; 302 __u16 bf_sgm; 303 /* G_INTERP_OFFSET */ 304 __u16 hf_offset; 305 __u16 gain_offset; 306 /* G_FILTER_OFFSET */ 307 __u16 offset; 308 /* C_FILTER_LOG_OFFSET */ 309 __u16 loghf_offset; 310 __u16 loggd_offset; 311 /* C_FILTER_IIR_0 */ 312 __u16 wgtslope; 313 /* C_FILTER_ALPHA */ 314 __u16 alpha_offset; 315 /* C_FILTER_EDGE */ 316 __u16 edge_offset; 317 __u32 edge_scale; 318 /* C_FILTER_ALPHA */ 319 __u32 alpha_scale; 320 } __attribute__ ((packed)); 321 322 struct isp32_baynr_cfg { 323 /* BAYNR_CTRL */ 324 __u8 bay3d_gain_en; 325 __u8 lg2_mode; 326 __u8 gauss_en; 327 __u8 log_bypass; 328 /* BAYNR_DGAIN */ 329 __u16 dgain1; 330 __u16 dgain0; 331 __u16 dgain2; 332 /* BAYNR_PIXDIFF */ 333 __u16 pix_diff; 334 /* BAYNR_THLD */ 335 __u16 diff_thld; 336 __u16 softthld; 337 /* BAYNR_W1_STRENG */ 338 __u16 bltflt_streng; 339 __u16 reg_w1; 340 /* BAYNR_SIGMA */ 341 __u16 sigma_x[ISP32_BAYNR_XY_NUM]; 342 __u16 sigma_y[ISP32_BAYNR_XY_NUM]; 343 /* BAYNR_WRIT_D */ 344 __u16 weit_d2; 345 __u16 weit_d1; 346 __u16 weit_d0; 347 /* BAYNR_LG_OFF */ 348 __u16 lg2_lgoff; 349 __u16 lg2_off; 350 /* BAYNR_DAT_MAX */ 351 __u32 dat_max; 352 /* BAYNR_SIGOFF */ 353 __u16 rgain_off; 354 __u16 bgain_off; 355 /* BAYNR_GAIN */ 356 __u8 gain_x[ISP32_BAYNR_GAIN_NUM]; 357 __u16 gain_y[ISP32_BAYNR_GAIN_NUM]; 358 } __attribute__ ((packed)); 359 360 struct isp32_bay3d_cfg { 361 /* BAY3D_CTRL */ 362 __u8 bypass_en; 363 __u8 hibypass_en; 364 __u8 lobypass_en; 365 __u8 himed_bypass_en; 366 __u8 higaus_bypass_en; 367 __u8 hiabs_possel; 368 __u8 hichnsplit_en; 369 __u8 lomed_bypass_en; 370 __u8 logaus5_bypass_en; 371 __u8 logaus3_bypass_en; 372 __u8 glbpk_en; 373 __u8 loswitch_protect; 374 __u8 bwsaving_en; 375 /* BAY3D_CTRL1 */ 376 __u8 hiwgt_opt_en; 377 __u8 hichncor_en; 378 __u8 bwopt_gain_dis; 379 __u8 lo4x8_en; 380 __u8 lo4x4_en; 381 __u8 hisig_ind_sel; 382 __u8 pksig_ind_sel; 383 __u8 iirwr_rnd_en; 384 __u8 curds_high_en; 385 __u8 higaus3_mode; 386 __u8 higaus5x5_en; 387 __u8 wgtmix_opt_en; 388 389 /* for isp32_lite */ 390 __u8 wgtmm_opt_en; 391 __u8 wgtmm_sel_en; 392 393 /* BAY3D_SIGGAUS */ 394 __u8 siggaus0; 395 __u8 siggaus1; 396 __u8 siggaus2; 397 __u8 siggaus3; 398 /* BAY3D_KALRATIO */ 399 __u16 softwgt; 400 __u16 hidif_th; 401 /* BAY3D_WGTLMT */ 402 __u16 wgtlmt; 403 __u16 wgtratio; 404 /* BAY3D_SIG */ 405 __u16 sig0_x[ISP32_BAY3D_XY_NUM]; 406 __u16 sig0_y[ISP32_BAY3D_XY_NUM]; 407 __u16 sig1_x[ISP32_BAY3D_XY_NUM]; 408 __u16 sig1_y[ISP32_BAY3D_XY_NUM]; 409 __u16 sig2_x[ISP32_BAY3D_XY_NUM]; 410 __u16 sig2_y[ISP32_BAY3D_XY_NUM]; 411 412 /* LODIF_STAT1 for isp32_lite */ 413 __u16 wgtmin; 414 415 /* BAY3D_HISIGRAT */ 416 __u16 hisigrat0; 417 __u16 hisigrat1; 418 /* BAY3D_HISIGOFF */ 419 __u16 hisigoff0; 420 __u16 hisigoff1; 421 /* BAY3D_LOSIG */ 422 __u16 losigoff; 423 __u16 losigrat; 424 /* BAY3D_SIGPK */ 425 __u16 rgain_off; 426 __u16 bgain_off; 427 /* BAY3D_GLBPK2 */ 428 __u32 glbpk2; 429 } __attribute__ ((packed)); 430 431 struct isp32_ynr_cfg { 432 /* YNR_GLOBAL_CTRL */ 433 __u8 rnr_en; 434 __u8 thumb_mix_cur_en; 435 __u8 global_gain_alpha; 436 __u8 flt1x1_bypass_sel; 437 __u8 nlm11x11_bypass; 438 __u8 flt1x1_bypass; 439 __u8 lgft3x3_bypass; 440 __u8 lbft5x5_bypass; 441 __u8 bft3x3_bypass; 442 /* YNR_RNR_STRENGTH */ 443 __u8 rnr_strength3[ISP32_YNR_XY_NUM]; 444 /* YNR_NLM_SIGMA_GAIN */ 445 __u8 nlm_hi_gain_alpha; 446 /* YNR_NLM_COE */ 447 __u8 nlm_coe[ISP32_YNR_NLM_COE_NUM]; 448 449 /* LOWNR_CTRL4 for isp32_lite */ 450 __u8 frame_add4line; 451 452 __u16 global_gain; 453 454 /* YNR_RNR_MAX_R */ 455 __u16 rnr_max_r; 456 __u16 local_gainscale; 457 /* YNR_RNR_CENTER_COOR */ 458 __u16 rnr_center_coorh; 459 __u16 rnr_center_coorv; 460 /* YNR_LOCAL_GAIN_CTRL */ 461 __u16 loclagain_adj_thresh; 462 __u16 localgain_adj; 463 /* YNR_LOWNR_CTRL0 */ 464 __u16 low_bf_inv1; 465 __u16 low_bf_inv0; 466 /* YNR_LOWNR_CTRL1 */ 467 __u16 low_peak_supress; 468 __u16 low_thred_adj; 469 /* YNR_LOWNR_CTRL2 */ 470 __u16 low_dist_adj; 471 __u16 low_edge_adj_thresh; 472 /* YNR_LOWNR_CTRL3 */ 473 __u16 low_bi_weight; 474 __u16 low_weight; 475 __u16 low_center_weight; 476 /* YNR_LOWNR_CTRL4 */ 477 __u16 frame_full_size; 478 __u16 lbf_weight_thres; 479 /* YNR_GAUSS1_COEFF */ 480 __u16 low_gauss1_coeff2; 481 __u16 low_gauss1_coeff1; 482 __u16 low_gauss1_coeff0; 483 /* YNR_GAUSS2_COEFF */ 484 __u16 low_gauss2_coeff2; 485 __u16 low_gauss2_coeff1; 486 __u16 low_gauss2_coeff0; 487 /* YNR_SGM_DX */ 488 __u16 luma_points_x[ISP32_YNR_XY_NUM]; 489 /* YNR_LSGM_Y */ 490 __u16 lsgm_y[ISP32_YNR_XY_NUM]; 491 /* YNR_NLM_SIGMA_GAIN */ 492 __u16 nlm_min_sigma; 493 __u16 nlm_hi_bf_scale; 494 /* YNR_NLM_WEIGHT */ 495 __u16 nlm_nr_weight; 496 __u16 nlm_weight_offset; 497 /* YNR_NLM_NR_WEIGHT */ 498 __u32 nlm_center_weight; 499 } __attribute__ ((packed)); 500 501 struct isp32_cnr_cfg { 502 /* CNR_CTRL */ 503 __u8 exgain_bypass; 504 __u8 yuv422_mode; 505 __u8 thumb_mode; 506 __u8 bf3x3_wgt0_sel; 507 /* CNR_LBF_WEITD */ 508 __u8 lbf1x7_weit_d0; 509 __u8 lbf1x7_weit_d1; 510 __u8 lbf1x7_weit_d2; 511 __u8 lbf1x7_weit_d3; 512 /* CNR_IIR_PARA1 */ 513 __u8 iir_uvgain; 514 __u8 iir_strength; 515 __u8 exp_shift; 516 /* CNR_IIR_PARA2 */ 517 __u8 chroma_ghost; 518 __u8 iir_uv_clip; 519 /* CNR_GAUS_COE */ 520 __u8 gaus_coe[ISP32_CNR_GAUS_COE_NUM]; 521 /* CNR_GAUS_RATIO */ 522 __u8 bf_wgt_clip; 523 /* CNR_BF_PARA1 */ 524 __u8 uv_gain; 525 __u8 bf_ratio; 526 /* CNR_SIGMA */ 527 __u8 sigma_y[ISP32_CNR_SIGMA_Y_NUM]; 528 /* CNR_IIR_GLOBAL_GAIN */ 529 __u8 iir_gain_alpha; 530 __u8 iir_global_gain; 531 /* CNR_EXGAIN */ 532 __u8 gain_iso; 533 __u8 global_gain_alpha; 534 __u16 global_gain; 535 /* CNR_THUMB1 */ 536 __u16 thumb_sigma_c; 537 __u16 thumb_sigma_y; 538 /* CNR_THUMB_BF_RATIO */ 539 __u16 thumb_bf_ratio; 540 /* CNR_IIR_PARA1 */ 541 __u16 wgt_slope; 542 /* CNR_GAUS_RATIO */ 543 __u16 gaus_ratio; 544 __u16 global_alpha; 545 /* CNR_BF_PARA1 */ 546 __u16 sigma_r; 547 /* CNR_BF_PARA2 */ 548 __u16 adj_offset; 549 __u16 adj_ratio; 550 } __attribute__ ((packed)); 551 552 struct isp32_sharp_cfg { 553 /* SHARP_EN */ 554 __u8 bypass; 555 __u8 center_mode; 556 __u8 exgain_bypass; 557 __u8 radius_ds_mode; 558 __u8 noiseclip_mode; 559 560 /* for isp32_lite */ 561 __u8 clip_hf_mode; 562 __u8 add_mode; 563 564 /* SHARP_RATIO */ 565 __u8 sharp_ratio; 566 __u8 bf_ratio; 567 __u8 gaus_ratio; 568 __u8 pbf_ratio; 569 /* SHARP_LUMA_DX */ 570 __u8 luma_dx[ISP32_SHARP_X_NUM]; 571 /* SHARP_SIGMA_SHIFT */ 572 __u8 bf_sigma_shift; 573 __u8 pbf_sigma_shift; 574 /* SHARP_PBF_COEF */ 575 __u8 pbf_coef2; 576 __u8 pbf_coef1; 577 __u8 pbf_coef0; 578 /* SHARP_BF_COEF */ 579 __u8 bf_coef2; 580 __u8 bf_coef1; 581 __u8 bf_coef0; 582 /* SHARP_GAUS_COEF */ 583 __u8 gaus_coef[ISP32_SHARP_GAUS_COEF_NUM]; 584 /* SHARP_GAIN */ 585 __u8 global_gain_alpha; 586 __u8 local_gainscale; 587 /* SHARP_GAIN_DIS_STRENGTH */ 588 __u8 strength[ISP32_SHARP_STRENGTH_NUM]; 589 /* SHARP_TEXTURE */ 590 __u8 enhance_bit; 591 /* SHARP_PBF_SIGMA_INV */ 592 __u16 pbf_sigma_inv[ISP32_SHARP_Y_NUM]; 593 /* SHARP_BF_SIGMA_INV */ 594 __u16 bf_sigma_inv[ISP32_SHARP_Y_NUM]; 595 /* SHARP_CLIP_HF */ 596 __u16 clip_hf[ISP32_SHARP_Y_NUM]; 597 /* SHARP_GAIN */ 598 __u16 global_gain; 599 /* SHARP_GAIN_ADJUST */ 600 __u16 gain_adj[ISP32_SHARP_GAIN_ADJ_NUM]; 601 /* SHARP_CENTER */ 602 __u16 center_wid; 603 __u16 center_het; 604 /* SHARP_TEXTURE */ 605 __u16 noise_sigma; 606 __u16 noise_strength; 607 608 /* EHF_TH for isp32_lite */ 609 __u16 ehf_th[ISP32_SHARP_Y_NUM]; 610 /* CLIP_NEG for isp32_lite */ 611 __u16 clip_neg[ISP32_SHARP_Y_NUM]; 612 } __attribute__ ((packed)); 613 614 struct isp32_dhaz_cfg { 615 /* DHAZ_CTRL */ 616 __u8 enh_luma_en; 617 __u8 color_deviate_en; 618 __u8 round_en; 619 __u8 soft_wr_en; 620 __u8 enhance_en; 621 __u8 air_lc_en; 622 __u8 hpara_en; 623 __u8 hist_en; 624 __u8 dc_en; 625 /* DHAZ_ADP0 */ 626 __u8 yblk_th; 627 __u8 yhist_th; 628 __u8 dc_max_th; 629 __u8 dc_min_th; 630 /* DHAZ_ADP2 */ 631 __u8 tmax_base; 632 __u8 dark_th; 633 __u8 air_max; 634 __u8 air_min; 635 /* DHAZ_GAUS */ 636 __u8 gaus_h2; 637 __u8 gaus_h1; 638 __u8 gaus_h0; 639 /* DHAZ_GAIN_IDX */ 640 __u8 sigma_idx[ISP32_DHAZ_SIGMA_IDX_NUM]; 641 /* DHAZ_ADP_HIST1 */ 642 __u8 hist_gratio; 643 __u16 hist_scale; 644 /* DHAZ_ADP1 */ 645 __u8 bright_max; 646 __u8 bright_min; 647 __u16 wt_max; 648 /* DHAZ_ADP_TMAX */ 649 __u16 tmax_max; 650 __u16 tmax_off; 651 /* DHAZ_ADP_HIST0 */ 652 __u8 hist_k; 653 __u8 hist_th_off; 654 __u16 hist_min; 655 /* DHAZ_ENHANCE */ 656 __u16 enhance_value; 657 __u16 enhance_chroma; 658 /* DHAZ_IIR0 */ 659 __u16 iir_wt_sigma; 660 __u8 iir_sigma; 661 __u8 stab_fnum; 662 /* DHAZ_IIR1 */ 663 __u16 iir_tmax_sigma; 664 __u8 iir_air_sigma; 665 __u8 iir_pre_wet; 666 /* DHAZ_SOFT_CFG0 */ 667 __u16 cfg_wt; 668 __u8 cfg_air; 669 __u8 cfg_alpha; 670 /* DHAZ_SOFT_CFG1 */ 671 __u16 cfg_gratio; 672 __u16 cfg_tmax; 673 /* DHAZ_BF_SIGMA */ 674 __u16 range_sima; 675 __u8 space_sigma_pre; 676 __u8 space_sigma_cur; 677 /* DHAZ_BF_WET */ 678 __u16 dc_weitcur; 679 __u16 bf_weight; 680 /* DHAZ_ENH_CURVE */ 681 __u16 enh_curve[ISP32_DHAZ_ENH_CURVE_NUM]; 682 683 __u16 sigma_lut[ISP32_DHAZ_SIGMA_LUT_NUM]; 684 685 __u16 hist_wr[ISP32_DHAZ_HIST_WR_NUM]; 686 687 __u16 enh_luma[ISP32_DHAZ_ENH_LUMA_NUM]; 688 } __attribute__ ((packed)); 689 690 struct isp32_drc_cfg { 691 __u8 bypass_en; 692 /* DRC_CTRL1 */ 693 __u8 offset_pow2; 694 __u16 compres_scl; 695 __u16 position; 696 /* DRC_LPRATIO */ 697 __u16 hpdetail_ratio; 698 __u16 lpdetail_ratio; 699 __u8 delta_scalein; 700 /* DRC_EXPLRATIO */ 701 __u8 weicur_pix; 702 __u8 weipre_frame; 703 __u8 bilat_wt_off; 704 /* DRC_SIGMA */ 705 __u8 edge_scl; 706 __u8 motion_scl; 707 __u16 force_sgm_inv0; 708 /* DRC_SPACESGM */ 709 __u16 space_sgm_inv1; 710 __u16 space_sgm_inv0; 711 /* DRC_RANESGM */ 712 __u16 range_sgm_inv1; 713 __u16 range_sgm_inv0; 714 /* DRC_BILAT */ 715 __u16 bilat_soft_thd; 716 __u8 weig_maxl; 717 __u8 weig_bilat; 718 __u8 enable_soft_thd; 719 /* DRC_IIRWG_GAIN */ 720 __u8 iir_weight; 721 __u16 min_ogain; 722 /* DRC_LUM3X2_CTRL */ 723 __u16 gas_t; 724 /* DRC_LUM3X2_GAS */ 725 __u8 gas_l0; 726 __u8 gas_l1; 727 __u8 gas_l2; 728 __u8 gas_l3; 729 730 __u16 gain_y[ISP32_DRC_Y_NUM]; 731 __u16 compres_y[ISP32_DRC_Y_NUM]; 732 __u16 scale_y[ISP32_DRC_Y_NUM]; 733 } __attribute__ ((packed)); 734 735 struct isp32_hdrmge_cfg { 736 __u8 s_base; 737 __u8 mode; 738 __u8 dbg_mode; 739 __u8 each_raw_en; 740 741 __u8 gain2; 742 743 __u8 lm_dif_0p15; 744 __u8 lm_dif_0p9; 745 __u8 ms_diff_0p15; 746 __u8 ms_dif_0p8; 747 748 __u16 gain0_inv; 749 __u16 gain0; 750 __u16 gain1_inv; 751 __u16 gain1; 752 753 __u16 ms_thd1; 754 __u16 ms_thd0; 755 __u16 ms_scl; 756 __u16 lm_thd1; 757 __u16 lm_thd0; 758 __u16 lm_scl; 759 struct isp2x_hdrmge_curve curve; 760 __u16 e_y[ISP32_HDRMGE_E_CURVE_NUM]; 761 __u16 l_raw0[ISP32_HDRMGE_E_CURVE_NUM]; 762 __u16 l_raw1[ISP32_HDRMGE_E_CURVE_NUM]; 763 __u16 each_raw_gain0; 764 __u16 each_raw_gain1; 765 } __attribute__ ((packed)); 766 767 struct isp32_rawawb_meas_cfg { 768 __u8 bls2_en; 769 770 __u8 rawawb_sel; 771 __u8 bnr2awb_sel; 772 __u8 drc2awb_sel; 773 /* RAWAWB_CTRL */ 774 __u8 uv_en0; 775 __u8 xy_en0; 776 __u8 yuv3d_en0; 777 __u8 yuv3d_ls_idx0; 778 __u8 yuv3d_ls_idx1; 779 __u8 yuv3d_ls_idx2; 780 __u8 yuv3d_ls_idx3; 781 __u8 in_rshift_to_12bit_en; 782 __u8 in_overexposure_check_en; 783 __u8 wind_size; 784 __u8 rawlsc_bypass_en; 785 __u8 light_num; 786 __u8 uv_en1; 787 __u8 xy_en1; 788 __u8 yuv3d_en1; 789 __u8 low12bit_val; 790 /* RAWAWB_WEIGHT_CURVE_CTRL */ 791 __u8 wp_luma_wei_en0; 792 __u8 wp_luma_wei_en1; 793 __u8 wp_blk_wei_en0; 794 __u8 wp_blk_wei_en1; 795 __u8 wp_hist_xytype; 796 /* RAWAWB_MULTIWINDOW_EXC_CTRL */ 797 __u8 exc_wp_region0_excen; 798 __u8 exc_wp_region0_measen; 799 __u8 exc_wp_region0_domain; 800 __u8 exc_wp_region1_excen; 801 __u8 exc_wp_region1_measen; 802 __u8 exc_wp_region1_domain; 803 __u8 exc_wp_region2_excen; 804 __u8 exc_wp_region2_measen; 805 __u8 exc_wp_region2_domain; 806 __u8 exc_wp_region3_excen; 807 __u8 exc_wp_region3_measen; 808 __u8 exc_wp_region3_domain; 809 __u8 exc_wp_region4_excen; 810 __u8 exc_wp_region4_domain; 811 __u8 exc_wp_region5_excen; 812 __u8 exc_wp_region5_domain; 813 __u8 exc_wp_region6_excen; 814 __u8 exc_wp_region6_domain; 815 __u8 multiwindow_en; 816 /* RAWAWB_YWEIGHT_CURVE_XCOOR03 */ 817 __u8 wp_luma_weicurve_y0; 818 __u8 wp_luma_weicurve_y1; 819 __u8 wp_luma_weicurve_y2; 820 __u8 wp_luma_weicurve_y3; 821 /* RAWAWB_YWEIGHT_CURVE_XCOOR47 */ 822 __u8 wp_luma_weicurve_y4; 823 __u8 wp_luma_weicurve_y5; 824 __u8 wp_luma_weicurve_y6; 825 __u8 wp_luma_weicurve_y7; 826 /* RAWAWB_YWEIGHT_CURVE_XCOOR8 */ 827 __u8 wp_luma_weicurve_y8; 828 /* RAWAWB_YWEIGHT_CURVE_YCOOR03 */ 829 __u8 wp_luma_weicurve_w0; 830 __u8 wp_luma_weicurve_w1; 831 __u8 wp_luma_weicurve_w2; 832 __u8 wp_luma_weicurve_w3; 833 /* RAWAWB_YWEIGHT_CURVE_YCOOR47 */ 834 __u8 wp_luma_weicurve_w4; 835 __u8 wp_luma_weicurve_w5; 836 __u8 wp_luma_weicurve_w6; 837 __u8 wp_luma_weicurve_w7; 838 /* RAWAWB_YWEIGHT_CURVE_YCOOR8 */ 839 __u8 wp_luma_weicurve_w8; 840 /* RAWAWB_YUV_X1X2_DIS_0 */ 841 __u8 dis_x1x2_ls0; 842 __u8 rotu0_ls0; 843 __u8 rotu1_ls0; 844 /* RAWAWB_YUV_INTERP_CURVE_UCOOR_0 */ 845 __u8 rotu2_ls0; 846 __u8 rotu3_ls0; 847 __u8 rotu4_ls0; 848 __u8 rotu5_ls0; 849 /* RAWAWB_YUV_X1X2_DIS_1 */ 850 __u8 dis_x1x2_ls1; 851 __u8 rotu0_ls1; 852 __u8 rotu1_ls1; 853 /* YUV_INTERP_CURVE_UCOOR_1 */ 854 __u8 rotu2_ls1; 855 __u8 rotu3_ls1; 856 __u8 rotu4_ls1; 857 __u8 rotu5_ls1; 858 /* RAWAWB_YUV_X1X2_DIS_2 */ 859 __u8 dis_x1x2_ls2; 860 __u8 rotu0_ls2; 861 __u8 rotu1_ls2; 862 /* YUV_INTERP_CURVE_UCOOR_2 */ 863 __u8 rotu2_ls2; 864 __u8 rotu3_ls2; 865 __u8 rotu4_ls2; 866 __u8 rotu5_ls2; 867 /* RAWAWB_YUV_X1X2_DIS_3 */ 868 __u8 dis_x1x2_ls3; 869 __u8 rotu0_ls3; 870 __u8 rotu1_ls3; 871 __u8 rotu2_ls3; 872 __u8 rotu3_ls3; 873 __u8 rotu4_ls3; 874 __u8 rotu5_ls3; 875 /* RAWAWB_EXC_WP_WEIGHT */ 876 __u8 exc_wp_region0_weight; 877 __u8 exc_wp_region1_weight; 878 __u8 exc_wp_region2_weight; 879 __u8 exc_wp_region3_weight; 880 __u8 exc_wp_region4_weight; 881 __u8 exc_wp_region5_weight; 882 __u8 exc_wp_region6_weight; 883 /* RAWAWB_WRAM_DATA */ 884 __u8 wp_blk_wei_w[ISP32_RAWAWB_WEIGHT_NUM]; 885 /* RAWAWB_BLK_CTRL */ 886 __u8 blk_measure_enable; 887 __u8 blk_measure_mode; 888 __u8 blk_measure_xytype; 889 __u8 blk_rtdw_measure_en; 890 __u8 blk_measure_illu_idx; 891 892 /* for isp32_lite */ 893 __u8 ds16x8_mode_en; 894 895 __u8 blk_with_luma_wei_en; 896 __u16 in_overexposure_threshold; 897 /* RAWAWB_LIMIT_RG_MAX*/ 898 __u16 r_max; 899 __u16 g_max; 900 /* RAWAWB_LIMIT_BY_MAX */ 901 __u16 b_max; 902 __u16 y_max; 903 /* RAWAWB_LIMIT_RG_MIN */ 904 __u16 r_min; 905 __u16 g_min; 906 /* RAWAWB_LIMIT_BY_MIN */ 907 __u16 b_min; 908 __u16 y_min; 909 /* RAWAWB_WIN_OFFS */ 910 __u16 h_offs; 911 __u16 v_offs; 912 /* RAWAWB_WIN_SIZE */ 913 __u16 h_size; 914 __u16 v_size; 915 /* RAWAWB_YWEIGHT_CURVE_YCOOR8 */ 916 __u16 pre_wbgain_inv_r; 917 /* RAWAWB_PRE_WBGAIN_INV */ 918 __u16 pre_wbgain_inv_g; 919 __u16 pre_wbgain_inv_b; 920 /* RAWAWB_UV_DETC_VERTEX */ 921 __u16 vertex0_u_0; 922 __u16 vertex0_v_0; 923 924 __u16 vertex1_u_0; 925 __u16 vertex1_v_0; 926 927 __u16 vertex2_u_0; 928 __u16 vertex2_v_0; 929 930 __u16 vertex3_u_0; 931 __u16 vertex3_v_0; 932 933 __u16 vertex0_u_1; 934 __u16 vertex0_v_1; 935 936 __u16 vertex1_u_1; 937 __u16 vertex1_v_1; 938 939 __u16 vertex2_u_1; 940 __u16 vertex2_v_1; 941 942 __u16 vertex3_u_1; 943 __u16 vertex3_v_1; 944 945 __u16 vertex0_u_2; 946 __u16 vertex0_v_2; 947 948 __u16 vertex1_u_2; 949 __u16 vertex1_v_2; 950 951 __u16 vertex2_u_2; 952 __u16 vertex2_v_2; 953 954 __u16 vertex3_u_2; 955 __u16 vertex3_v_2; 956 957 __u16 vertex0_u_3; 958 __u16 vertex0_v_3; 959 960 __u16 vertex1_u_3; 961 __u16 vertex1_v_3; 962 963 __u16 vertex2_u_3; 964 __u16 vertex2_v_3; 965 966 __u16 vertex3_u_3; 967 __u16 vertex3_v_3; 968 /* RAWAWB_RGB2XY_WT */ 969 __u16 wt0; 970 __u16 wt1; 971 __u16 wt2; 972 /* RAWAWB_RGB2XY_MAT */ 973 __u16 mat0_x; 974 __u16 mat0_y; 975 976 __u16 mat1_x; 977 __u16 mat1_y; 978 979 __u16 mat2_x; 980 __u16 mat2_y; 981 /* RAWAWB_XY_DETC_NOR */ 982 __u16 nor_x0_0; 983 __u16 nor_x1_0; 984 __u16 nor_y0_0; 985 __u16 nor_y1_0; 986 987 __u16 nor_x0_1; 988 __u16 nor_x1_1; 989 __u16 nor_y0_1; 990 __u16 nor_y1_1; 991 992 __u16 nor_x0_2; 993 __u16 nor_x1_2; 994 __u16 nor_y0_2; 995 __u16 nor_y1_2; 996 997 __u16 nor_x0_3; 998 __u16 nor_x1_3; 999 __u16 nor_y0_3; 1000 __u16 nor_y1_3; 1001 /* RAWAWB_XY_DETC_BIG */ 1002 __u16 big_x0_0; 1003 __u16 big_x1_0; 1004 __u16 big_y0_0; 1005 __u16 big_y1_0; 1006 1007 __u16 big_x0_1; 1008 __u16 big_x1_1; 1009 __u16 big_y0_1; 1010 __u16 big_y1_1; 1011 1012 __u16 big_x0_2; 1013 __u16 big_x1_2; 1014 __u16 big_y0_2; 1015 __u16 big_y1_2; 1016 1017 __u16 big_x0_3; 1018 __u16 big_x1_3; 1019 __u16 big_y0_3; 1020 __u16 big_y1_3; 1021 /* RAWAWB_MULTIWINDOW */ 1022 __u16 multiwindow0_v_offs; 1023 __u16 multiwindow0_h_offs; 1024 __u16 multiwindow0_v_size; 1025 __u16 multiwindow0_h_size; 1026 1027 __u16 multiwindow1_v_offs; 1028 __u16 multiwindow1_h_offs; 1029 __u16 multiwindow1_v_size; 1030 __u16 multiwindow1_h_size; 1031 1032 __u16 multiwindow2_v_offs; 1033 __u16 multiwindow2_h_offs; 1034 __u16 multiwindow2_v_size; 1035 __u16 multiwindow2_h_size; 1036 1037 __u16 multiwindow3_v_offs; 1038 __u16 multiwindow3_h_offs; 1039 __u16 multiwindow3_v_size; 1040 __u16 multiwindow3_h_size; 1041 /* RAWAWB_EXC_WP_REGION */ 1042 __u16 exc_wp_region0_xu0; 1043 __u16 exc_wp_region0_xu1; 1044 1045 __u16 exc_wp_region0_yv0; 1046 __u16 exc_wp_region0_yv1; 1047 1048 __u16 exc_wp_region1_xu0; 1049 __u16 exc_wp_region1_xu1; 1050 1051 __u16 exc_wp_region1_yv0; 1052 __u16 exc_wp_region1_yv1; 1053 1054 __u16 exc_wp_region2_xu0; 1055 __u16 exc_wp_region2_xu1; 1056 1057 __u16 exc_wp_region2_yv0; 1058 __u16 exc_wp_region2_yv1; 1059 1060 __u16 exc_wp_region3_xu0; 1061 __u16 exc_wp_region3_xu1; 1062 1063 __u16 exc_wp_region3_yv0; 1064 __u16 exc_wp_region3_yv1; 1065 1066 __u16 exc_wp_region4_xu0; 1067 __u16 exc_wp_region4_xu1; 1068 1069 __u16 exc_wp_region4_yv0; 1070 __u16 exc_wp_region4_yv1; 1071 1072 __u16 exc_wp_region5_xu0; 1073 __u16 exc_wp_region5_xu1; 1074 1075 __u16 exc_wp_region5_yv0; 1076 __u16 exc_wp_region5_yv1; 1077 1078 __u16 exc_wp_region6_xu0; 1079 __u16 exc_wp_region6_xu1; 1080 1081 __u16 exc_wp_region6_yv0; 1082 __u16 exc_wp_region6_yv1; 1083 /* RAWAWB_YUV_RGB2ROTY */ 1084 __u16 rgb2ryuvmat0_y; 1085 __u16 rgb2ryuvmat1_y; 1086 __u16 rgb2ryuvmat2_y; 1087 __u16 rgb2ryuvofs_y; 1088 /* RAWAWB_YUV_RGB2ROTU */ 1089 __u16 rgb2ryuvmat0_u; 1090 __u16 rgb2ryuvmat1_u; 1091 __u16 rgb2ryuvmat2_u; 1092 __u16 rgb2ryuvofs_u; 1093 /* RAWAWB_YUV_RGB2ROTV */ 1094 __u16 rgb2ryuvmat0_v; 1095 __u16 rgb2ryuvmat1_v; 1096 __u16 rgb2ryuvmat2_v; 1097 __u16 rgb2ryuvofs_v; 1098 /* RAWAWB_YUV_X_COOR */ 1099 __u16 coor_x1_ls0_y; 1100 __u16 vec_x21_ls0_y; 1101 __u16 coor_x1_ls0_u; 1102 __u16 vec_x21_ls0_u; 1103 __u16 coor_x1_ls0_v; 1104 __u16 vec_x21_ls0_v; 1105 1106 __u16 coor_x1_ls1_y; 1107 __u16 vec_x21_ls1_y; 1108 __u16 coor_x1_ls1_u; 1109 __u16 vec_x21_ls1_u; 1110 __u16 coor_x1_ls1_v; 1111 __u16 vec_x21_ls1_v; 1112 1113 __u16 coor_x1_ls2_y; 1114 __u16 vec_x21_ls2_y; 1115 __u16 coor_x1_ls2_u; 1116 __u16 vec_x21_ls2_v; 1117 __u16 coor_x1_ls2_v; 1118 __u16 vec_x21_ls2_u; 1119 1120 __u16 coor_x1_ls3_y; 1121 __u16 vec_x21_ls3_y; 1122 __u16 coor_x1_ls3_u; 1123 __u16 vec_x21_ls3_u; 1124 __u16 coor_x1_ls3_v; 1125 __u16 vec_x21_ls3_v; 1126 /* RAWAWB_YUV_INTERP_CURVE_TH */ 1127 __u16 th0_ls0; 1128 __u16 th1_ls0; 1129 __u16 th2_ls0; 1130 __u16 th3_ls0; 1131 __u16 th4_ls0; 1132 __u16 th5_ls0; 1133 1134 __u16 th0_ls1; 1135 __u16 th1_ls1; 1136 __u16 th2_ls1; 1137 __u16 th3_ls1; 1138 __u16 th4_ls1; 1139 __u16 th5_ls1; 1140 1141 __u16 th0_ls2; 1142 __u16 th1_ls2; 1143 __u16 th2_ls2; 1144 __u16 th3_ls2; 1145 __u16 th4_ls2; 1146 __u16 th5_ls2; 1147 1148 __u16 th0_ls3; 1149 __u16 th1_ls3; 1150 __u16 th2_ls3; 1151 __u16 th3_ls3; 1152 __u16 th4_ls3; 1153 __u16 th5_ls3; 1154 /* RAWAWB_UV_DETC_ISLOPE */ 1155 __u32 islope01_0; 1156 __u32 islope12_0; 1157 __u32 islope23_0; 1158 __u32 islope30_0; 1159 __u32 islope01_1; 1160 __u32 islope12_1; 1161 __u32 islope23_1; 1162 __u32 islope30_1; 1163 __u32 islope01_2; 1164 __u32 islope12_2; 1165 __u32 islope23_2; 1166 __u32 islope30_2; 1167 __u32 islope01_3; 1168 __u32 islope12_3; 1169 __u32 islope23_3; 1170 __u32 islope30_3; 1171 1172 /* WIN_WEIGHT for isp32_lite */ 1173 __u32 win_weight[ISP32L_RAWAWB_WEIGHT_NUM]; 1174 struct isp2x_bls_fixed_val bls2_val; 1175 } __attribute__ ((packed)); 1176 1177 struct isp32_rawaf_meas_cfg { 1178 __u8 rawaf_sel; 1179 __u8 num_afm_win; 1180 /* for isp32_lite */ 1181 __u8 bnr2af_sel; 1182 1183 /* CTRL */ 1184 __u8 gamma_en; 1185 __u8 gaus_en; 1186 __u8 v1_fir_sel; 1187 __u8 hiir_en; 1188 __u8 viir_en; 1189 __u8 accu_8bit_mode; 1190 __u8 ldg_en; 1191 __u8 h1_fv_mode; 1192 __u8 h2_fv_mode; 1193 __u8 v1_fv_mode; 1194 __u8 v2_fv_mode; 1195 __u8 ae_mode; 1196 __u8 y_mode; 1197 __u8 vldg_sel; 1198 __u8 sobel_sel; 1199 __u8 v_dnscl_mode; 1200 __u8 from_awb; 1201 __u8 from_ynr; 1202 __u8 ae_config_use; 1203 /* for isp32_lite */ 1204 __u8 ae_sel; 1205 1206 /* for isp32_lite */ 1207 __u8 hiir_left_border_mode; 1208 __u8 avg_ds_en; 1209 __u8 avg_ds_mode; 1210 __u8 h1_acc_mode; 1211 __u8 h2_acc_mode; 1212 __u8 v1_acc_mode; 1213 __u8 v2_acc_mode; 1214 1215 /* CTRL1 for isp32_lite */ 1216 __s16 bls_offset; 1217 __u8 bls_en; 1218 __u8 hldg_dilate_num; 1219 1220 /* WINA_B */ 1221 struct isp2x_window win[ISP32_RAWAF_WIN_NUM]; 1222 /* INT_LINE */ 1223 __u8 line_num[ISP32_RAWAF_LINE_NUM]; 1224 __u8 line_en[ISP32_RAWAF_LINE_NUM]; 1225 /* THRES */ 1226 __u16 afm_thres; 1227 /* VAR_SHIFT */ 1228 __u8 afm_var_shift[ISP32_RAWAF_WIN_NUM]; 1229 __u8 lum_var_shift[ISP32_RAWAF_WIN_NUM]; 1230 /* for isp32_lite */ 1231 __u8 tnrin_shift; 1232 1233 /* HVIIR_VAR_SHIFT */ 1234 __u8 h1iir_var_shift; 1235 __u8 h2iir_var_shift; 1236 __u8 v1iir_var_shift; 1237 __u8 v2iir_var_shift; 1238 /* GAUS_COE */ 1239 __s8 gaus_coe[ISP32_RAWAF_GAUS_COE_NUM]; 1240 1241 /* GAMMA_Y */ 1242 __u16 gamma_y[ISP32_RAWAF_GAMMA_NUM]; 1243 /* HIIR_THRESH */ 1244 __u16 h_fv_thresh; 1245 __u16 v_fv_thresh; 1246 struct isp3x_rawaf_curve curve_h[ISP32_RAWAF_CURVE_NUM]; 1247 struct isp3x_rawaf_curve curve_v[ISP32_RAWAF_CURVE_NUM]; 1248 __s16 h1iir1_coe[ISP32_RAWAF_HIIR_COE_NUM]; 1249 __s16 h1iir2_coe[ISP32_RAWAF_HIIR_COE_NUM]; 1250 __s16 h2iir1_coe[ISP32_RAWAF_HIIR_COE_NUM]; 1251 __s16 h2iir2_coe[ISP32_RAWAF_HIIR_COE_NUM]; 1252 __s16 v1iir_coe[ISP32_RAWAF_VIIR_COE_NUM]; 1253 __s16 v2iir_coe[ISP32_RAWAF_VIIR_COE_NUM]; 1254 __s16 v1fir_coe[ISP32_RAWAF_VFIR_COE_NUM]; 1255 __s16 v2fir_coe[ISP32_RAWAF_VFIR_COE_NUM]; 1256 __u16 highlit_thresh; 1257 1258 /* CORING_H for isp32_lite */ 1259 __u16 h_fv_limit; 1260 __u16 h_fv_slope; 1261 /* CORING_V for isp32_lite */ 1262 __u16 v_fv_limit; 1263 __u16 v_fv_slope; 1264 } __attribute__ ((packed)); 1265 1266 struct isp32_cac_cfg { 1267 __u8 bypass_en; 1268 __u8 center_en; 1269 __u8 clip_g_mode; 1270 __u8 edge_detect_en; 1271 __u8 neg_clip0_en; 1272 1273 __u8 flat_thed_b; 1274 __u8 flat_thed_r; 1275 1276 __u8 psf_sft_bit; 1277 __u16 cfg_num; 1278 1279 __u16 center_width; 1280 __u16 center_height; 1281 1282 __u16 strength[ISP32_CAC_STRENGTH_NUM]; 1283 1284 __u16 offset_b; 1285 __u16 offset_r; 1286 1287 __u32 expo_thed_b; 1288 __u32 expo_thed_r; 1289 __u32 expo_adj_b; 1290 __u32 expo_adj_r; 1291 1292 __u32 hsize; 1293 __u32 vsize; 1294 __s32 buf_fd; 1295 } __attribute__ ((packed)); 1296 1297 struct isp32_vsm_cfg { 1298 __u8 h_segments; 1299 __u8 v_segments; 1300 __u16 h_offs; 1301 __u16 v_offs; 1302 __u16 h_size; 1303 __u16 v_size; 1304 } __attribute__ ((packed)); 1305 1306 struct isp32_isp_other_cfg { 1307 struct isp32_bls_cfg bls_cfg; 1308 struct isp2x_dpcc_cfg dpcc_cfg; 1309 struct isp3x_lsc_cfg lsc_cfg; 1310 struct isp32_awb_gain_cfg awb_gain_cfg; 1311 struct isp21_gic_cfg gic_cfg; 1312 struct isp32_debayer_cfg debayer_cfg; 1313 struct isp32_ccm_cfg ccm_cfg; 1314 struct isp3x_gammaout_cfg gammaout_cfg; 1315 struct isp2x_cproc_cfg cproc_cfg; 1316 struct isp2x_ie_cfg ie_cfg; 1317 struct isp2x_sdg_cfg sdg_cfg; 1318 struct isp32_drc_cfg drc_cfg; 1319 struct isp32_hdrmge_cfg hdrmge_cfg; 1320 struct isp32_dhaz_cfg dhaz_cfg; 1321 struct isp2x_3dlut_cfg isp3dlut_cfg; 1322 struct isp32_ldch_cfg ldch_cfg; 1323 struct isp32_baynr_cfg baynr_cfg; 1324 struct isp32_bay3d_cfg bay3d_cfg; 1325 struct isp32_ynr_cfg ynr_cfg; 1326 struct isp32_cnr_cfg cnr_cfg; 1327 struct isp32_sharp_cfg sharp_cfg; 1328 struct isp32_cac_cfg cac_cfg; 1329 struct isp3x_gain_cfg gain_cfg; 1330 struct isp21_csm_cfg csm_cfg; 1331 struct isp21_cgc_cfg cgc_cfg; 1332 struct isp32_vsm_cfg vsm_cfg; 1333 } __attribute__ ((packed)); 1334 1335 struct isp32_isp_meas_cfg { 1336 struct isp32_rawaf_meas_cfg rawaf; 1337 struct isp32_rawawb_meas_cfg rawawb; 1338 struct isp2x_rawaelite_meas_cfg rawae0; 1339 struct isp2x_rawaebig_meas_cfg rawae1; 1340 struct isp2x_rawaebig_meas_cfg rawae2; 1341 struct isp2x_rawaebig_meas_cfg rawae3; 1342 struct isp2x_rawhistlite_cfg rawhist0; 1343 struct isp2x_rawhistbig_cfg rawhist1; 1344 struct isp2x_rawhistbig_cfg rawhist2; 1345 struct isp2x_rawhistbig_cfg rawhist3; 1346 } __attribute__ ((packed)); 1347 1348 struct isp32_rawae_meas_data { 1349 __u32 channelg_xy:12; 1350 __u32 channelb_xy:10; 1351 __u32 channelr_xy:10; 1352 } __attribute__ ((packed)); 1353 1354 struct isp32_rawaebig_stat0 { 1355 struct isp32_rawae_meas_data data[ISP32_RAWAEBIG_MEAN_NUM]; 1356 __u32 reserved[3]; 1357 } __attribute__ ((packed)); 1358 1359 struct isp32_rawaebig_stat1 { 1360 __u32 sumr[ISP32_RAWAEBIG_SUBWIN_NUM]; 1361 __u32 sumg[ISP32_RAWAEBIG_SUBWIN_NUM]; 1362 __u32 sumb[ISP32_RAWAEBIG_SUBWIN_NUM]; 1363 } __attribute__ ((packed)); 1364 1365 struct isp32_rawaelite_stat { 1366 struct isp32_rawae_meas_data data[ISP32_RAWAELITE_MEAN_NUM]; 1367 __u32 reserved[21]; 1368 } __attribute__ ((packed)); 1369 1370 struct isp32_rawaf_stat { 1371 struct isp3x_rawaf_ramdata ramdata[ISP32_RAWAF_SUMDATA_NUM]; 1372 __u32 int_state; 1373 __u32 afm_sum_b; 1374 __u32 afm_lum_b; 1375 __u32 highlit_cnt_winb; 1376 __u32 reserved[18]; 1377 } __attribute__ ((packed)); 1378 1379 struct isp32_rawawb_ramdata { 1380 __u64 b:18; 1381 __u64 g:18; 1382 __u64 r:18; 1383 __u64 wp:10; 1384 } __attribute__ ((packed)); 1385 1386 struct isp32_rawawb_sum { 1387 __u32 rgain_nor; 1388 __u32 bgain_nor; 1389 __u32 wp_num_nor; 1390 __u32 wp_num2; 1391 1392 __u32 rgain_big; 1393 __u32 bgain_big; 1394 __u32 wp_num_big; 1395 __u32 reserved; 1396 } __attribute__ ((packed)); 1397 1398 struct isp32_rawawb_sum_exc { 1399 __u32 rgain_exc; 1400 __u32 bgain_exc; 1401 __u32 wp_num_exc; 1402 __u32 reserved; 1403 } __attribute__ ((packed)); 1404 1405 struct isp32_rawawb_meas_stat { 1406 struct isp32_rawawb_ramdata ramdata[ISP32_RAWAWB_RAMDATA_NUM]; 1407 __u64 reserved; 1408 struct isp32_rawawb_sum sum[ISP32_RAWAWB_SUM_NUM]; 1409 __u16 yhist_bin[ISP32_RAWAWB_HSTBIN_NUM]; 1410 struct isp32_rawawb_sum_exc sum_exc[ISP32_RAWAWB_EXCL_STAT_NUM]; 1411 } __attribute__ ((packed)); 1412 1413 struct isp32_vsm_stat { 1414 __u16 delta_h; 1415 __u16 delta_v; 1416 } __attribute__ ((packed)); 1417 1418 struct isp32_info2ddr_stat { 1419 __u32 owner; 1420 __s32 buf_fd; 1421 } __attribute__ ((packed)); 1422 1423 struct isp32_isp_params_cfg { 1424 __u64 module_en_update; 1425 __u64 module_ens; 1426 __u64 module_cfg_update; 1427 1428 __u32 frame_id; 1429 struct isp32_isp_meas_cfg meas; 1430 struct isp32_isp_other_cfg others; 1431 } __attribute__ ((packed)); 1432 1433 struct isp32_stat { 1434 struct isp32_rawaebig_stat0 rawae3_0; /* offset 0 */ 1435 struct isp32_rawaebig_stat0 rawae1_0; /* offset 0x390 */ 1436 struct isp32_rawaebig_stat0 rawae2_0; /* offset 0x720 */ 1437 struct isp32_rawaelite_stat rawae0; /* offset 0xab0 */ 1438 struct isp32_rawaebig_stat1 rawae3_1; 1439 struct isp32_rawaebig_stat1 rawae1_1; 1440 struct isp32_rawaebig_stat1 rawae2_1; 1441 struct isp2x_bls_stat bls; 1442 struct isp2x_rawhistbig_stat rawhist3; /* offset 0xc00 */ 1443 struct isp2x_rawhistlite_stat rawhist0; /* offset 0x1000 */ 1444 struct isp2x_rawhistbig_stat rawhist1; /* offset 0x1400 */ 1445 struct isp2x_rawhistbig_stat rawhist2; /* offset 0x1800 */ 1446 struct isp32_rawaf_stat rawaf; /* offset 0x1c00 */ 1447 struct isp3x_dhaz_stat dhaz; 1448 struct isp32_vsm_stat vsm; 1449 struct isp32_info2ddr_stat info2ddr; 1450 struct isp32_rawawb_meas_stat rawawb; /* offset 0x2b00 */ 1451 } __attribute__ ((packed)); 1452 1453 /** 1454 * struct rkisp32_isp_stat_buffer - Rockchip ISP32 Statistics Meta Data 1455 * 1456 * @meas_type: measurement types (ISP3X_STAT_ definitions) 1457 * @frame_id: frame ID for sync 1458 * @params: statistics data 1459 */ 1460 struct rkisp32_isp_stat_buffer { 1461 struct isp32_stat params; 1462 __u32 meas_type; 1463 __u32 frame_id; 1464 __u32 params_id; 1465 } __attribute__ ((packed)); 1466 1467 struct rkisp32_thunderboot_resmem_head { 1468 struct rkisp_thunderboot_resmem_head head; 1469 struct isp32_isp_params_cfg cfg; 1470 } __attribute__ ((packed)); 1471 1472 /****************isp32 lite********************/ 1473 1474 struct isp32_lite_rawaebig_stat { 1475 __u32 sumr; 1476 __u32 sumg; 1477 __u32 sumb; 1478 struct isp2x_rawae_meas_data data[ISP32_RAWAEBIG_MEAN_NUM]; 1479 } __attribute__ ((packed)); 1480 1481 struct isp32_lite_rawawb_meas_stat { 1482 __u32 ramdata_r[ISP32L_RAWAWB_RAMDATA_RGB_NUM]; 1483 __u32 ramdata_g[ISP32L_RAWAWB_RAMDATA_RGB_NUM]; 1484 __u32 ramdata_b[ISP32L_RAWAWB_RAMDATA_RGB_NUM]; 1485 __u32 ramdata_wpnum0[ISP32L_RAWAWB_RAMDATA_WP_NUM]; 1486 __u32 ramdata_wpnum1[ISP32L_RAWAWB_RAMDATA_WP_NUM]; 1487 struct isp32_rawawb_sum sum[ISP32_RAWAWB_SUM_NUM]; 1488 __u16 yhist_bin[ISP32_RAWAWB_HSTBIN_NUM]; 1489 struct isp32_rawawb_sum_exc sum_exc[ISP32_RAWAWB_EXCL_STAT_NUM]; 1490 } __attribute__ ((packed)); 1491 1492 struct isp32_lite_rawaf_ramdata { 1493 __u32 hiir_wnd_data[ISP32L_RAWAF_WND_DATA]; 1494 __u32 viir_wnd_data[ISP32L_RAWAF_WND_DATA]; 1495 } __attribute__ ((packed)); 1496 1497 struct isp32_lite_rawaf_stat { 1498 struct isp32_lite_rawaf_ramdata ramdata; 1499 __u32 int_state; 1500 __u32 afm_sum_b; 1501 __u32 afm_lum_b; 1502 __u32 highlit_cnt_winb; 1503 } __attribute__ ((packed)); 1504 1505 struct isp32_lite_rawhistlite_stat { 1506 __u32 hist_bin[ISP32L_HIST_LITE_BIN_N_MAX]; 1507 } __attribute__ ((packed)); 1508 1509 struct isp32_lite_stat { 1510 struct isp2x_bls_stat bls; 1511 struct isp3x_dhaz_stat dhaz; 1512 struct isp32_info2ddr_stat info2ddr; 1513 struct isp2x_rawaelite_stat rawae0; 1514 struct isp32_lite_rawaebig_stat rawae3; 1515 struct isp32_lite_rawhistlite_stat rawhist0; 1516 struct isp2x_rawhistbig_stat rawhist3; 1517 struct isp32_lite_rawaf_stat rawaf; 1518 struct isp32_lite_rawawb_meas_stat rawawb; 1519 } __attribute__ ((packed)); 1520 1521 struct rkisp32_lite_stat_buffer { 1522 struct isp32_lite_stat params; 1523 __u32 meas_type; 1524 __u32 frame_id; 1525 __u32 params_id; 1526 } __attribute__ ((packed)); 1527 #endif /* _UAPI_RK_ISP32_CONFIG_H */ 1528