1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * ARM Power State and Coordination Interface (PSCI) header 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This header holds common PSCI defines and macros shared 6*4882a593Smuzhiyun * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2014 Linaro Ltd. 9*4882a593Smuzhiyun * Author: Anup Patel <anup.patel@linaro.org> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef _UAPI_LINUX_PSCI_H 13*4882a593Smuzhiyun #define _UAPI_LINUX_PSCI_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * PSCI v0.1 interface 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * The PSCI v0.1 function numbers are implementation defined. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, 21*4882a593Smuzhiyun * INVALID_PARAMS, and DENIED defined below are applicable 22*4882a593Smuzhiyun * to PSCI v0.1. 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* PSCI v0.2 interface */ 26*4882a593Smuzhiyun #define PSCI_0_2_FN_BASE 0x84000000 27*4882a593Smuzhiyun #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) 28*4882a593Smuzhiyun #define PSCI_0_2_64BIT 0x40000000 29*4882a593Smuzhiyun #define PSCI_0_2_FN64_BASE \ 30*4882a593Smuzhiyun (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) 31*4882a593Smuzhiyun #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) 34*4882a593Smuzhiyun #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) 35*4882a593Smuzhiyun #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) 36*4882a593Smuzhiyun #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) 37*4882a593Smuzhiyun #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) 38*4882a593Smuzhiyun #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) 39*4882a593Smuzhiyun #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) 40*4882a593Smuzhiyun #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) 41*4882a593Smuzhiyun #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) 42*4882a593Smuzhiyun #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) 45*4882a593Smuzhiyun #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) 46*4882a593Smuzhiyun #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) 47*4882a593Smuzhiyun #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) 48*4882a593Smuzhiyun #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) 51*4882a593Smuzhiyun #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) 52*4882a593Smuzhiyun #define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) 53*4882a593Smuzhiyun #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) 56*4882a593Smuzhiyun #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ 59*4882a593Smuzhiyun #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff 60*4882a593Smuzhiyun #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 61*4882a593Smuzhiyun #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 62*4882a593Smuzhiyun #define PSCI_0_2_POWER_STATE_TYPE_MASK \ 63*4882a593Smuzhiyun (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) 64*4882a593Smuzhiyun #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 65*4882a593Smuzhiyun #define PSCI_0_2_POWER_STATE_AFFL_MASK \ 66*4882a593Smuzhiyun (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* PSCI extended power state encoding for CPU_SUSPEND function */ 69*4882a593Smuzhiyun #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff 70*4882a593Smuzhiyun #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 71*4882a593Smuzhiyun #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 72*4882a593Smuzhiyun #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ 73*4882a593Smuzhiyun (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ 76*4882a593Smuzhiyun #define PSCI_0_2_AFFINITY_LEVEL_ON 0 77*4882a593Smuzhiyun #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 78*4882a593Smuzhiyun #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ 81*4882a593Smuzhiyun #define PSCI_0_2_TOS_UP_MIGRATE 0 82*4882a593Smuzhiyun #define PSCI_0_2_TOS_UP_NO_MIGRATE 1 83*4882a593Smuzhiyun #define PSCI_0_2_TOS_MP 2 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* PSCI version decoding (independent of PSCI version) */ 86*4882a593Smuzhiyun #define PSCI_VERSION_MAJOR_SHIFT 16 87*4882a593Smuzhiyun #define PSCI_VERSION_MINOR_MASK \ 88*4882a593Smuzhiyun ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) 89*4882a593Smuzhiyun #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK 90*4882a593Smuzhiyun #define PSCI_VERSION_MAJOR(ver) \ 91*4882a593Smuzhiyun (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) 92*4882a593Smuzhiyun #define PSCI_VERSION_MINOR(ver) \ 93*4882a593Smuzhiyun ((ver) & PSCI_VERSION_MINOR_MASK) 94*4882a593Smuzhiyun #define PSCI_VERSION(maj, min) \ 95*4882a593Smuzhiyun ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \ 96*4882a593Smuzhiyun ((min) & PSCI_VERSION_MINOR_MASK)) 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /* PSCI features decoding (>=1.0) */ 99*4882a593Smuzhiyun #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 100*4882a593Smuzhiyun #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ 101*4882a593Smuzhiyun (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define PSCI_1_0_OS_INITIATED BIT(0) 104*4882a593Smuzhiyun #define PSCI_1_0_SUSPEND_MODE_PC 0 105*4882a593Smuzhiyun #define PSCI_1_0_SUSPEND_MODE_OSI 1 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* PSCI return values (inclusive of all PSCI versions) */ 108*4882a593Smuzhiyun #define PSCI_RET_SUCCESS 0 109*4882a593Smuzhiyun #define PSCI_RET_NOT_SUPPORTED -1 110*4882a593Smuzhiyun #define PSCI_RET_INVALID_PARAMS -2 111*4882a593Smuzhiyun #define PSCI_RET_DENIED -3 112*4882a593Smuzhiyun #define PSCI_RET_ALREADY_ON -4 113*4882a593Smuzhiyun #define PSCI_RET_ON_PENDING -5 114*4882a593Smuzhiyun #define PSCI_RET_INTERNAL_FAILURE -6 115*4882a593Smuzhiyun #define PSCI_RET_NOT_PRESENT -7 116*4882a593Smuzhiyun #define PSCI_RET_DISABLED -8 117*4882a593Smuzhiyun #define PSCI_RET_INVALID_ADDRESS -9 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #endif /* _UAPI_LINUX_PSCI_H */ 120