xref: /OK3568_Linux_fs/kernel/include/uapi/linux/ppdev.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * linux/include/linux/ppdev.h
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * User-space parallel port device driver (header file).
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 1998-9 Tim Waugh <tim@cyberelk.demon.co.uk>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
10*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License
11*4882a593Smuzhiyun  * as published by the Free Software Foundation; either version
12*4882a593Smuzhiyun  * 2 of the License, or (at your option) any later version.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * Added PPGETTIME/PPSETTIME, Fred Barnes, 1999
15*4882a593Smuzhiyun  * Added PPGETMODES/PPGETMODE/PPGETPHASE, Fred Barnes <frmb2@ukc.ac.uk>, 03/01/2001
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #ifndef _UAPI_LINUX_PPDEV_H
19*4882a593Smuzhiyun #define _UAPI_LINUX_PPDEV_H
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define PP_IOCTL	'p'
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Set mode for read/write (e.g. IEEE1284_MODE_EPP) */
24*4882a593Smuzhiyun #define PPSETMODE	_IOW(PP_IOCTL, 0x80, int)
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* Read status */
27*4882a593Smuzhiyun #define PPRSTATUS	_IOR(PP_IOCTL, 0x81, unsigned char)
28*4882a593Smuzhiyun #define PPWSTATUS	OBSOLETE__IOW(PP_IOCTL, 0x82, unsigned char)
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* Read/write control */
31*4882a593Smuzhiyun #define PPRCONTROL	_IOR(PP_IOCTL, 0x83, unsigned char)
32*4882a593Smuzhiyun #define PPWCONTROL	_IOW(PP_IOCTL, 0x84, unsigned char)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun struct ppdev_frob_struct {
35*4882a593Smuzhiyun 	unsigned char mask;
36*4882a593Smuzhiyun 	unsigned char val;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun #define PPFCONTROL      _IOW(PP_IOCTL, 0x8e, struct ppdev_frob_struct)
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* Read/write data */
41*4882a593Smuzhiyun #define PPRDATA		_IOR(PP_IOCTL, 0x85, unsigned char)
42*4882a593Smuzhiyun #define PPWDATA		_IOW(PP_IOCTL, 0x86, unsigned char)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* Read/write econtrol (not used) */
45*4882a593Smuzhiyun #define PPRECONTROL	OBSOLETE__IOR(PP_IOCTL, 0x87, unsigned char)
46*4882a593Smuzhiyun #define PPWECONTROL	OBSOLETE__IOW(PP_IOCTL, 0x88, unsigned char)
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* Read/write FIFO (not used) */
49*4882a593Smuzhiyun #define PPRFIFO		OBSOLETE__IOR(PP_IOCTL, 0x89, unsigned char)
50*4882a593Smuzhiyun #define PPWFIFO		OBSOLETE__IOW(PP_IOCTL, 0x8a, unsigned char)
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* Claim the port to start using it */
53*4882a593Smuzhiyun #define PPCLAIM		_IO(PP_IOCTL, 0x8b)
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* Release the port when you aren't using it */
56*4882a593Smuzhiyun #define PPRELEASE	_IO(PP_IOCTL, 0x8c)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /* Yield the port (release it if another driver is waiting,
59*4882a593Smuzhiyun  * then reclaim) */
60*4882a593Smuzhiyun #define PPYIELD		_IO(PP_IOCTL, 0x8d)
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* Register device exclusively (must be before PPCLAIM). */
63*4882a593Smuzhiyun #define PPEXCL		_IO(PP_IOCTL, 0x8f)
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* Data line direction: non-zero for input mode. */
66*4882a593Smuzhiyun #define PPDATADIR	_IOW(PP_IOCTL, 0x90, int)
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* Negotiate a particular IEEE 1284 mode. */
69*4882a593Smuzhiyun #define PPNEGOT		_IOW(PP_IOCTL, 0x91, int)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* Set control lines when an interrupt occurs. */
72*4882a593Smuzhiyun #define PPWCTLONIRQ	_IOW(PP_IOCTL, 0x92, unsigned char)
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* Clear (and return) interrupt count. */
75*4882a593Smuzhiyun #define PPCLRIRQ	_IOR(PP_IOCTL, 0x93, int)
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* Set the IEEE 1284 phase that we're in (e.g. IEEE1284_PH_FWD_IDLE) */
78*4882a593Smuzhiyun #define PPSETPHASE	_IOW(PP_IOCTL, 0x94, int)
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* Set and get port timeout (struct timeval's) */
81*4882a593Smuzhiyun #define PPGETTIME	_IOR(PP_IOCTL, 0x95, struct timeval)
82*4882a593Smuzhiyun #define PPSETTIME	_IOW(PP_IOCTL, 0x96, struct timeval)
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* Get available modes (what the hardware can do) */
85*4882a593Smuzhiyun #define PPGETMODES	_IOR(PP_IOCTL, 0x97, unsigned int)
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* Get the current mode and phaze */
88*4882a593Smuzhiyun #define PPGETMODE	_IOR(PP_IOCTL, 0x98, int)
89*4882a593Smuzhiyun #define PPGETPHASE	_IOR(PP_IOCTL, 0x99, int)
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun /* get/set flags */
92*4882a593Smuzhiyun #define PPGETFLAGS	_IOR(PP_IOCTL, 0x9a, int)
93*4882a593Smuzhiyun #define PPSETFLAGS	_IOW(PP_IOCTL, 0x9b, int)
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /* flags visible to the world */
96*4882a593Smuzhiyun #define PP_FASTWRITE	(1<<2)
97*4882a593Smuzhiyun #define PP_FASTREAD	(1<<3)
98*4882a593Smuzhiyun #define PP_W91284PIC	(1<<4)
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun /* only masks user-visible flags */
101*4882a593Smuzhiyun #define PP_FLAGMASK	(PP_FASTWRITE | PP_FASTREAD | PP_W91284PIC)
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #endif /* _UAPI_LINUX_PPDEV_H */
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