xref: /OK3568_Linux_fs/kernel/include/uapi/linux/mrp_bridge.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun #ifndef _UAPI_LINUX_MRP_BRIDGE_H_
4*4882a593Smuzhiyun #define _UAPI_LINUX_MRP_BRIDGE_H_
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/types.h>
7*4882a593Smuzhiyun #include <linux/if_ether.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #define MRP_MAX_FRAME_LENGTH		200
10*4882a593Smuzhiyun #define MRP_DEFAULT_PRIO		0x8000
11*4882a593Smuzhiyun #define MRP_DOMAIN_UUID_LENGTH		16
12*4882a593Smuzhiyun #define MRP_VERSION			1
13*4882a593Smuzhiyun #define MRP_FRAME_PRIO			7
14*4882a593Smuzhiyun #define MRP_OUI_LENGTH			3
15*4882a593Smuzhiyun #define MRP_MANUFACTURE_DATA_LENGTH	2
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun enum br_mrp_ring_role_type {
18*4882a593Smuzhiyun 	BR_MRP_RING_ROLE_DISABLED,
19*4882a593Smuzhiyun 	BR_MRP_RING_ROLE_MRC,
20*4882a593Smuzhiyun 	BR_MRP_RING_ROLE_MRM,
21*4882a593Smuzhiyun 	BR_MRP_RING_ROLE_MRA,
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun enum br_mrp_in_role_type {
25*4882a593Smuzhiyun 	BR_MRP_IN_ROLE_DISABLED,
26*4882a593Smuzhiyun 	BR_MRP_IN_ROLE_MIC,
27*4882a593Smuzhiyun 	BR_MRP_IN_ROLE_MIM,
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun enum br_mrp_ring_state_type {
31*4882a593Smuzhiyun 	BR_MRP_RING_STATE_OPEN,
32*4882a593Smuzhiyun 	BR_MRP_RING_STATE_CLOSED,
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun enum br_mrp_in_state_type {
36*4882a593Smuzhiyun 	BR_MRP_IN_STATE_OPEN,
37*4882a593Smuzhiyun 	BR_MRP_IN_STATE_CLOSED,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun enum br_mrp_port_state_type {
41*4882a593Smuzhiyun 	BR_MRP_PORT_STATE_DISABLED,
42*4882a593Smuzhiyun 	BR_MRP_PORT_STATE_BLOCKED,
43*4882a593Smuzhiyun 	BR_MRP_PORT_STATE_FORWARDING,
44*4882a593Smuzhiyun 	BR_MRP_PORT_STATE_NOT_CONNECTED,
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun enum br_mrp_port_role_type {
48*4882a593Smuzhiyun 	BR_MRP_PORT_ROLE_PRIMARY,
49*4882a593Smuzhiyun 	BR_MRP_PORT_ROLE_SECONDARY,
50*4882a593Smuzhiyun 	BR_MRP_PORT_ROLE_INTER,
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun enum br_mrp_tlv_header_type {
54*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_END = 0x0,
55*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_COMMON = 0x1,
56*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_RING_TEST = 0x2,
57*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_RING_TOPO = 0x3,
58*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_RING_LINK_DOWN = 0x4,
59*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_RING_LINK_UP = 0x5,
60*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_IN_TEST = 0x6,
61*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_IN_TOPO = 0x7,
62*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_IN_LINK_DOWN = 0x8,
63*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_IN_LINK_UP = 0x9,
64*4882a593Smuzhiyun 	BR_MRP_TLV_HEADER_OPTION = 0x7f,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun enum br_mrp_sub_tlv_header_type {
68*4882a593Smuzhiyun 	BR_MRP_SUB_TLV_HEADER_TEST_MGR_NACK = 0x1,
69*4882a593Smuzhiyun 	BR_MRP_SUB_TLV_HEADER_TEST_PROPAGATE = 0x2,
70*4882a593Smuzhiyun 	BR_MRP_SUB_TLV_HEADER_TEST_AUTO_MGR = 0x3,
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun struct br_mrp_tlv_hdr {
74*4882a593Smuzhiyun 	__u8 type;
75*4882a593Smuzhiyun 	__u8 length;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun struct br_mrp_sub_tlv_hdr {
79*4882a593Smuzhiyun 	__u8 type;
80*4882a593Smuzhiyun 	__u8 length;
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun struct br_mrp_end_hdr {
84*4882a593Smuzhiyun 	struct br_mrp_tlv_hdr hdr;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun struct br_mrp_common_hdr {
88*4882a593Smuzhiyun 	__be16 seq_id;
89*4882a593Smuzhiyun 	__u8 domain[MRP_DOMAIN_UUID_LENGTH];
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun struct br_mrp_ring_test_hdr {
93*4882a593Smuzhiyun 	__be16 prio;
94*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
95*4882a593Smuzhiyun 	__be16 port_role;
96*4882a593Smuzhiyun 	__be16 state;
97*4882a593Smuzhiyun 	__be16 transitions;
98*4882a593Smuzhiyun 	__be32 timestamp;
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct br_mrp_ring_topo_hdr {
102*4882a593Smuzhiyun 	__be16 prio;
103*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
104*4882a593Smuzhiyun 	__be16 interval;
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun struct br_mrp_ring_link_hdr {
108*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
109*4882a593Smuzhiyun 	__be16 port_role;
110*4882a593Smuzhiyun 	__be16 interval;
111*4882a593Smuzhiyun 	__be16 blocked;
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun struct br_mrp_sub_opt_hdr {
115*4882a593Smuzhiyun 	__u8 type;
116*4882a593Smuzhiyun 	__u8 manufacture_data[MRP_MANUFACTURE_DATA_LENGTH];
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun struct br_mrp_test_mgr_nack_hdr {
120*4882a593Smuzhiyun 	__be16 prio;
121*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
122*4882a593Smuzhiyun 	__be16 other_prio;
123*4882a593Smuzhiyun 	__u8 other_sa[ETH_ALEN];
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun struct br_mrp_test_prop_hdr {
127*4882a593Smuzhiyun 	__be16 prio;
128*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
129*4882a593Smuzhiyun 	__be16 other_prio;
130*4882a593Smuzhiyun 	__u8 other_sa[ETH_ALEN];
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun struct br_mrp_oui_hdr {
134*4882a593Smuzhiyun 	__u8 oui[MRP_OUI_LENGTH];
135*4882a593Smuzhiyun };
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun struct br_mrp_in_test_hdr {
138*4882a593Smuzhiyun 	__be16 id;
139*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
140*4882a593Smuzhiyun 	__be16 port_role;
141*4882a593Smuzhiyun 	__be16 state;
142*4882a593Smuzhiyun 	__be16 transitions;
143*4882a593Smuzhiyun 	__be32 timestamp;
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun struct br_mrp_in_topo_hdr {
147*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
148*4882a593Smuzhiyun 	__be16 id;
149*4882a593Smuzhiyun 	__be16 interval;
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun struct br_mrp_in_link_hdr {
153*4882a593Smuzhiyun 	__u8 sa[ETH_ALEN];
154*4882a593Smuzhiyun 	__be16 port_role;
155*4882a593Smuzhiyun 	__be16 id;
156*4882a593Smuzhiyun 	__be16 interval;
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #endif
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