xref: /OK3568_Linux_fs/kernel/include/uapi/linux/i2c.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
3*4882a593Smuzhiyun /*									     */
4*4882a593Smuzhiyun /* i2c.h - definitions for the i2c-bus interface			     */
5*4882a593Smuzhiyun /*									     */
6*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
7*4882a593Smuzhiyun /*   Copyright (C) 1995-2000 Simon G. Vogl
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun     This program is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun     it under the terms of the GNU General Public License as published by
11*4882a593Smuzhiyun     the Free Software Foundation; either version 2 of the License, or
12*4882a593Smuzhiyun     (at your option) any later version.
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun     This program is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun     GNU General Public License for more details.
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun     You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun     along with this program; if not, write to the Free Software
21*4882a593Smuzhiyun     Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22*4882a593Smuzhiyun     MA 02110-1301 USA.							     */
23*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
26*4882a593Smuzhiyun    Frodo Looijaard <frodol@dds.nl> */
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #ifndef _UAPI_LINUX_I2C_H
29*4882a593Smuzhiyun #define _UAPI_LINUX_I2C_H
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #include <linux/types.h>
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /**
34*4882a593Smuzhiyun  * struct i2c_msg - an I2C transaction segment beginning with START
35*4882a593Smuzhiyun  * @addr: Slave address, either seven or ten bits.  When this is a ten
36*4882a593Smuzhiyun  *	bit address, I2C_M_TEN must be set in @flags and the adapter
37*4882a593Smuzhiyun  *	must support I2C_FUNC_10BIT_ADDR.
38*4882a593Smuzhiyun  * @flags: I2C_M_RD is handled by all adapters.  No other flags may be
39*4882a593Smuzhiyun  *	provided unless the adapter exported the relevant I2C_FUNC_*
40*4882a593Smuzhiyun  *	flags through i2c_check_functionality().
41*4882a593Smuzhiyun  * @len: Number of data bytes in @buf being read from or written to the
42*4882a593Smuzhiyun  *	I2C slave address.  For read transactions where I2C_M_RECV_LEN
43*4882a593Smuzhiyun  *	is set, the caller guarantees that this buffer can hold up to
44*4882a593Smuzhiyun  *	32 bytes in addition to the initial length byte sent by the
45*4882a593Smuzhiyun  *	slave (plus, if used, the SMBus PEC); and this value will be
46*4882a593Smuzhiyun  *	incremented by the number of block data bytes received.
47*4882a593Smuzhiyun  * @buf: The buffer into which data is read, or from which it's written.
48*4882a593Smuzhiyun  *
49*4882a593Smuzhiyun  * An i2c_msg is the low level representation of one segment of an I2C
50*4882a593Smuzhiyun  * transaction.  It is visible to drivers in the @i2c_transfer() procedure,
51*4882a593Smuzhiyun  * to userspace from i2c-dev, and to I2C adapter drivers through the
52*4882a593Smuzhiyun  * @i2c_adapter.@master_xfer() method.
53*4882a593Smuzhiyun  *
54*4882a593Smuzhiyun  * Except when I2C "protocol mangling" is used, all I2C adapters implement
55*4882a593Smuzhiyun  * the standard rules for I2C transactions.  Each transaction begins with a
56*4882a593Smuzhiyun  * START.  That is followed by the slave address, and a bit encoding read
57*4882a593Smuzhiyun  * versus write.  Then follow all the data bytes, possibly including a byte
58*4882a593Smuzhiyun  * with SMBus PEC.  The transfer terminates with a NAK, or when all those
59*4882a593Smuzhiyun  * bytes have been transferred and ACKed.  If this is the last message in a
60*4882a593Smuzhiyun  * group, it is followed by a STOP.  Otherwise it is followed by the next
61*4882a593Smuzhiyun  * @i2c_msg transaction segment, beginning with a (repeated) START.
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then
64*4882a593Smuzhiyun  * passing certain @flags may have changed those standard protocol behaviors.
65*4882a593Smuzhiyun  * Those flags are only for use with broken/nonconforming slaves, and with
66*4882a593Smuzhiyun  * adapters which are known to support the specific mangling options they
67*4882a593Smuzhiyun  * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).
68*4882a593Smuzhiyun  */
69*4882a593Smuzhiyun struct i2c_msg {
70*4882a593Smuzhiyun 	__u16 addr;	/* slave address			*/
71*4882a593Smuzhiyun 	__u16 flags;
72*4882a593Smuzhiyun #define I2C_M_RD		0x0001	/* read data, from slave to master */
73*4882a593Smuzhiyun 					/* I2C_M_RD is guaranteed to be 0x0001! */
74*4882a593Smuzhiyun #define I2C_M_TEN		0x0010	/* this is a ten bit chip address */
75*4882a593Smuzhiyun #define I2C_M_DMA_SAFE		0x0200	/* the buffer of this message is DMA safe */
76*4882a593Smuzhiyun 					/* makes only sense in kernelspace */
77*4882a593Smuzhiyun 					/* userspace buffers are copied anyway */
78*4882a593Smuzhiyun #define I2C_M_RECV_LEN		0x0400	/* length will be first received byte */
79*4882a593Smuzhiyun #define I2C_M_NO_RD_ACK		0x0800	/* if I2C_FUNC_PROTOCOL_MANGLING */
80*4882a593Smuzhiyun #define I2C_M_IGNORE_NAK	0x1000	/* if I2C_FUNC_PROTOCOL_MANGLING */
81*4882a593Smuzhiyun #define I2C_M_REV_DIR_ADDR	0x2000	/* if I2C_FUNC_PROTOCOL_MANGLING */
82*4882a593Smuzhiyun #define I2C_M_NOSTART		0x4000	/* if I2C_FUNC_NOSTART */
83*4882a593Smuzhiyun #define I2C_M_STOP		0x8000	/* if I2C_FUNC_PROTOCOL_MANGLING */
84*4882a593Smuzhiyun 	__u16 len;		/* msg length				*/
85*4882a593Smuzhiyun 	__u8 *buf;		/* pointer to msg data			*/
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /* To determine what functionality is present */
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #define I2C_FUNC_I2C			0x00000001
91*4882a593Smuzhiyun #define I2C_FUNC_10BIT_ADDR		0x00000002
92*4882a593Smuzhiyun #define I2C_FUNC_PROTOCOL_MANGLING	0x00000004 /* I2C_M_IGNORE_NAK etc. */
93*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_PEC		0x00000008
94*4882a593Smuzhiyun #define I2C_FUNC_NOSTART		0x00000010 /* I2C_M_NOSTART */
95*4882a593Smuzhiyun #define I2C_FUNC_SLAVE			0x00000020
96*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_BLOCK_PROC_CALL	0x00008000 /* SMBus 2.0 */
97*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_QUICK		0x00010000
98*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_READ_BYTE	0x00020000
99*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_WRITE_BYTE	0x00040000
100*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_READ_BYTE_DATA	0x00080000
101*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_WRITE_BYTE_DATA	0x00100000
102*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_READ_WORD_DATA	0x00200000
103*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_WRITE_WORD_DATA	0x00400000
104*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_PROC_CALL	0x00800000
105*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_READ_BLOCK_DATA	0x01000000
106*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
107*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_READ_I2C_BLOCK	0x04000000 /* I2C-like block xfer  */
108*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK	0x08000000 /* w/ 1-byte reg. addr. */
109*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_HOST_NOTIFY	0x10000000
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_BYTE		(I2C_FUNC_SMBUS_READ_BYTE | \
112*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WRITE_BYTE)
113*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_BYTE_DATA	(I2C_FUNC_SMBUS_READ_BYTE_DATA | \
114*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
115*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_WORD_DATA	(I2C_FUNC_SMBUS_READ_WORD_DATA | \
116*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WRITE_WORD_DATA)
117*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_BLOCK_DATA	(I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
118*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
119*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_I2C_BLOCK	(I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
120*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun #define I2C_FUNC_SMBUS_EMUL		(I2C_FUNC_SMBUS_QUICK | \
123*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_BYTE | \
124*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_BYTE_DATA | \
125*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WORD_DATA | \
126*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_PROC_CALL | \
127*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
128*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_I2C_BLOCK | \
129*4882a593Smuzhiyun 					 I2C_FUNC_SMBUS_PEC)
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /*
132*4882a593Smuzhiyun  * Data for SMBus Messages
133*4882a593Smuzhiyun  */
134*4882a593Smuzhiyun #define I2C_SMBUS_BLOCK_MAX	32	/* As specified in SMBus standard */
135*4882a593Smuzhiyun union i2c_smbus_data {
136*4882a593Smuzhiyun 	__u8 byte;
137*4882a593Smuzhiyun 	__u16 word;
138*4882a593Smuzhiyun 	__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
139*4882a593Smuzhiyun 			       /* and one more for user-space compatibility */
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /* i2c_smbus_xfer read or write markers */
143*4882a593Smuzhiyun #define I2C_SMBUS_READ	1
144*4882a593Smuzhiyun #define I2C_SMBUS_WRITE	0
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /* SMBus transaction types (size parameter in the above functions)
147*4882a593Smuzhiyun    Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
148*4882a593Smuzhiyun #define I2C_SMBUS_QUICK		    0
149*4882a593Smuzhiyun #define I2C_SMBUS_BYTE		    1
150*4882a593Smuzhiyun #define I2C_SMBUS_BYTE_DATA	    2
151*4882a593Smuzhiyun #define I2C_SMBUS_WORD_DATA	    3
152*4882a593Smuzhiyun #define I2C_SMBUS_PROC_CALL	    4
153*4882a593Smuzhiyun #define I2C_SMBUS_BLOCK_DATA	    5
154*4882a593Smuzhiyun #define I2C_SMBUS_I2C_BLOCK_BROKEN  6
155*4882a593Smuzhiyun #define I2C_SMBUS_BLOCK_PROC_CALL   7		/* SMBus 2.0 */
156*4882a593Smuzhiyun #define I2C_SMBUS_I2C_BLOCK_DATA    8
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #endif /* _UAPI_LINUX_I2C_H */
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