1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun #ifndef __HDLC_IOCTL_H__ 3*4882a593Smuzhiyun #define __HDLC_IOCTL_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #define GENERIC_HDLC_VERSION 4 /* For synchronization with sethdlc utility */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define CLOCK_DEFAULT 0 /* Default setting */ 9*4882a593Smuzhiyun #define CLOCK_EXT 1 /* External TX and RX clock - DTE */ 10*4882a593Smuzhiyun #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ 11*4882a593Smuzhiyun #define CLOCK_TXINT 3 /* Internal TX and external RX clock */ 12*4882a593Smuzhiyun #define CLOCK_TXFROMRX 4 /* TX clock derived from external RX clock */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define ENCODING_DEFAULT 0 /* Default setting */ 16*4882a593Smuzhiyun #define ENCODING_NRZ 1 17*4882a593Smuzhiyun #define ENCODING_NRZI 2 18*4882a593Smuzhiyun #define ENCODING_FM_MARK 3 19*4882a593Smuzhiyun #define ENCODING_FM_SPACE 4 20*4882a593Smuzhiyun #define ENCODING_MANCHESTER 5 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define PARITY_DEFAULT 0 /* Default setting */ 24*4882a593Smuzhiyun #define PARITY_NONE 1 /* No parity */ 25*4882a593Smuzhiyun #define PARITY_CRC16_PR0 2 /* CRC16, initial value 0x0000 */ 26*4882a593Smuzhiyun #define PARITY_CRC16_PR1 3 /* CRC16, initial value 0xFFFF */ 27*4882a593Smuzhiyun #define PARITY_CRC16_PR0_CCITT 4 /* CRC16, initial 0x0000, ITU-T version */ 28*4882a593Smuzhiyun #define PARITY_CRC16_PR1_CCITT 5 /* CRC16, initial 0xFFFF, ITU-T version */ 29*4882a593Smuzhiyun #define PARITY_CRC32_PR0_CCITT 6 /* CRC32, initial value 0x00000000 */ 30*4882a593Smuzhiyun #define PARITY_CRC32_PR1_CCITT 7 /* CRC32, initial value 0xFFFFFFFF */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define LMI_DEFAULT 0 /* Default setting */ 33*4882a593Smuzhiyun #define LMI_NONE 1 /* No LMI, all PVCs are static */ 34*4882a593Smuzhiyun #define LMI_ANSI 2 /* ANSI Annex D */ 35*4882a593Smuzhiyun #define LMI_CCITT 3 /* ITU-T Annex A */ 36*4882a593Smuzhiyun #define LMI_CISCO 4 /* The "original" LMI, aka Gang of Four */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun typedef struct { 41*4882a593Smuzhiyun unsigned int clock_rate; /* bits per second */ 42*4882a593Smuzhiyun unsigned int clock_type; /* internal, external, TX-internal etc. */ 43*4882a593Smuzhiyun unsigned short loopback; 44*4882a593Smuzhiyun } sync_serial_settings; /* V.35, V.24, X.21 */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun typedef struct { 47*4882a593Smuzhiyun unsigned int clock_rate; /* bits per second */ 48*4882a593Smuzhiyun unsigned int clock_type; /* internal, external, TX-internal etc. */ 49*4882a593Smuzhiyun unsigned short loopback; 50*4882a593Smuzhiyun unsigned int slot_map; 51*4882a593Smuzhiyun } te1_settings; /* T1, E1 */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun typedef struct { 54*4882a593Smuzhiyun unsigned short encoding; 55*4882a593Smuzhiyun unsigned short parity; 56*4882a593Smuzhiyun } raw_hdlc_proto; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun typedef struct { 59*4882a593Smuzhiyun unsigned int t391; 60*4882a593Smuzhiyun unsigned int t392; 61*4882a593Smuzhiyun unsigned int n391; 62*4882a593Smuzhiyun unsigned int n392; 63*4882a593Smuzhiyun unsigned int n393; 64*4882a593Smuzhiyun unsigned short lmi; 65*4882a593Smuzhiyun unsigned short dce; /* 1 for DCE (network side) operation */ 66*4882a593Smuzhiyun } fr_proto; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun typedef struct { 69*4882a593Smuzhiyun unsigned int dlci; 70*4882a593Smuzhiyun } fr_proto_pvc; /* for creating/deleting FR PVCs */ 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun typedef struct { 73*4882a593Smuzhiyun unsigned int dlci; 74*4882a593Smuzhiyun char master[IFNAMSIZ]; /* Name of master FRAD device */ 75*4882a593Smuzhiyun }fr_proto_pvc_info; /* for returning PVC information only */ 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun typedef struct { 78*4882a593Smuzhiyun unsigned int interval; 79*4882a593Smuzhiyun unsigned int timeout; 80*4882a593Smuzhiyun } cisco_proto; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun typedef struct { 83*4882a593Smuzhiyun unsigned short dce; /* 1 for DCE (network side) operation */ 84*4882a593Smuzhiyun unsigned int modulo; /* modulo (8 = basic / 128 = extended) */ 85*4882a593Smuzhiyun unsigned int window; /* frame window size */ 86*4882a593Smuzhiyun unsigned int t1; /* timeout t1 */ 87*4882a593Smuzhiyun unsigned int t2; /* timeout t2 */ 88*4882a593Smuzhiyun unsigned int n2; /* frame retry counter */ 89*4882a593Smuzhiyun } x25_hdlc_proto; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* PPP doesn't need any info now - supply length = 0 to ioctl */ 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 94*4882a593Smuzhiyun #endif /* __HDLC_IOCTL_H__ */ 95