1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun #ifndef _LINUX_FDREG_H 3*4882a593Smuzhiyun #define _LINUX_FDREG_H 4*4882a593Smuzhiyun /* 5*4882a593Smuzhiyun * This file contains some defines for the floppy disk controller. 6*4882a593Smuzhiyun * Various sources. Mostly "IBM Microcomputers: A Programmers 7*4882a593Smuzhiyun * Handbook", Sanches and Canton. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* 82077's auxiliary status registers A & B (R) */ 11*4882a593Smuzhiyun #define FD_SRA 0 12*4882a593Smuzhiyun #define FD_SRB 1 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* Digital Output Register */ 15*4882a593Smuzhiyun #define FD_DOR 2 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* 82077's tape drive register (R/W) */ 18*4882a593Smuzhiyun #define FD_TDR 3 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 82077's data rate select register (W) */ 21*4882a593Smuzhiyun #define FD_DSR 4 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* Fd controller regs. S&C, about page 340 */ 24*4882a593Smuzhiyun #define FD_STATUS 4 25*4882a593Smuzhiyun #define FD_DATA 5 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Digital Input Register (read) */ 28*4882a593Smuzhiyun #define FD_DIR 7 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* Diskette Control Register (write)*/ 31*4882a593Smuzhiyun #define FD_DCR 7 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Bits of main status register */ 34*4882a593Smuzhiyun #define STATUS_BUSYMASK 0x0F /* drive busy mask */ 35*4882a593Smuzhiyun #define STATUS_BUSY 0x10 /* FDC busy */ 36*4882a593Smuzhiyun #define STATUS_DMA 0x20 /* 0- DMA mode */ 37*4882a593Smuzhiyun #define STATUS_DIR 0x40 /* 0- cpu->fdc */ 38*4882a593Smuzhiyun #define STATUS_READY 0x80 /* Data reg ready */ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* Bits of FD_ST0 */ 41*4882a593Smuzhiyun #define ST0_DS 0x03 /* drive select mask */ 42*4882a593Smuzhiyun #define ST0_HA 0x04 /* Head (Address) */ 43*4882a593Smuzhiyun #define ST0_NR 0x08 /* Not Ready */ 44*4882a593Smuzhiyun #define ST0_ECE 0x10 /* Equipment check error */ 45*4882a593Smuzhiyun #define ST0_SE 0x20 /* Seek end */ 46*4882a593Smuzhiyun #define ST0_INTR 0xC0 /* Interrupt code mask */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Bits of FD_ST1 */ 49*4882a593Smuzhiyun #define ST1_MAM 0x01 /* Missing Address Mark */ 50*4882a593Smuzhiyun #define ST1_WP 0x02 /* Write Protect */ 51*4882a593Smuzhiyun #define ST1_ND 0x04 /* No Data - unreadable */ 52*4882a593Smuzhiyun #define ST1_OR 0x10 /* OverRun */ 53*4882a593Smuzhiyun #define ST1_CRC 0x20 /* CRC error in data or addr */ 54*4882a593Smuzhiyun #define ST1_EOC 0x80 /* End Of Cylinder */ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* Bits of FD_ST2 */ 57*4882a593Smuzhiyun #define ST2_MAM 0x01 /* Missing Address Mark (again) */ 58*4882a593Smuzhiyun #define ST2_BC 0x02 /* Bad Cylinder */ 59*4882a593Smuzhiyun #define ST2_SNS 0x04 /* Scan Not Satisfied */ 60*4882a593Smuzhiyun #define ST2_SEH 0x08 /* Scan Equal Hit */ 61*4882a593Smuzhiyun #define ST2_WC 0x10 /* Wrong Cylinder */ 62*4882a593Smuzhiyun #define ST2_CRC 0x20 /* CRC error in data field */ 63*4882a593Smuzhiyun #define ST2_CM 0x40 /* Control Mark = deleted */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* Bits of FD_ST3 */ 66*4882a593Smuzhiyun #define ST3_HA 0x04 /* Head (Address) */ 67*4882a593Smuzhiyun #define ST3_DS 0x08 /* drive is double-sided */ 68*4882a593Smuzhiyun #define ST3_TZ 0x10 /* Track Zero signal (1=track 0) */ 69*4882a593Smuzhiyun #define ST3_RY 0x20 /* drive is ready */ 70*4882a593Smuzhiyun #define ST3_WP 0x40 /* Write Protect */ 71*4882a593Smuzhiyun #define ST3_FT 0x80 /* Drive Fault */ 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* Values for FD_COMMAND */ 74*4882a593Smuzhiyun #define FD_RECALIBRATE 0x07 /* move to track 0 */ 75*4882a593Smuzhiyun #define FD_SEEK 0x0F /* seek track */ 76*4882a593Smuzhiyun #define FD_READ 0xE6 /* read with MT, MFM, SKip deleted */ 77*4882a593Smuzhiyun #define FD_WRITE 0xC5 /* write with MT, MFM */ 78*4882a593Smuzhiyun #define FD_SENSEI 0x08 /* Sense Interrupt Status */ 79*4882a593Smuzhiyun #define FD_SPECIFY 0x03 /* specify HUT etc */ 80*4882a593Smuzhiyun #define FD_FORMAT 0x4D /* format one track */ 81*4882a593Smuzhiyun #define FD_VERSION 0x10 /* get version code */ 82*4882a593Smuzhiyun #define FD_CONFIGURE 0x13 /* configure FIFO operation */ 83*4882a593Smuzhiyun #define FD_PERPENDICULAR 0x12 /* perpendicular r/w mode */ 84*4882a593Smuzhiyun #define FD_GETSTATUS 0x04 /* read ST3 */ 85*4882a593Smuzhiyun #define FD_DUMPREGS 0x0E /* dump the contents of the fdc regs */ 86*4882a593Smuzhiyun #define FD_READID 0xEA /* prints the header of a sector */ 87*4882a593Smuzhiyun #define FD_UNLOCK 0x14 /* Fifo config unlock */ 88*4882a593Smuzhiyun #define FD_LOCK 0x94 /* Fifo config lock */ 89*4882a593Smuzhiyun #define FD_RSEEK_OUT 0x8f /* seek out (i.e. to lower tracks) */ 90*4882a593Smuzhiyun #define FD_RSEEK_IN 0xcf /* seek in (i.e. to higher tracks) */ 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* the following commands are new in the 82078. They are not used in the 93*4882a593Smuzhiyun * floppy driver, except the first three. These commands may be useful for apps 94*4882a593Smuzhiyun * which use the FDRAWCMD interface. For doc, get the 82078 spec sheets at 95*4882a593Smuzhiyun * http://www.intel.com/design/archives/periphrl/docs/29046803.htm */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define FD_PARTID 0x18 /* part id ("extended" version cmd) */ 98*4882a593Smuzhiyun #define FD_SAVE 0x2e /* save fdc regs for later restore */ 99*4882a593Smuzhiyun #define FD_DRIVESPEC 0x8e /* drive specification: Access to the 100*4882a593Smuzhiyun * 2 Mbps data transfer rate for tape 101*4882a593Smuzhiyun * drives */ 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define FD_RESTORE 0x4e /* later restore */ 104*4882a593Smuzhiyun #define FD_POWERDOWN 0x27 /* configure FDC's powersave features */ 105*4882a593Smuzhiyun #define FD_FORMAT_N_WRITE 0xef /* format and write in one go. */ 106*4882a593Smuzhiyun #define FD_OPTION 0x33 /* ISO format (which is a clean way to 107*4882a593Smuzhiyun * pack more sectors on a track) */ 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* DMA commands */ 110*4882a593Smuzhiyun #define DMA_READ 0x46 111*4882a593Smuzhiyun #define DMA_WRITE 0x4A 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /* FDC version return types */ 114*4882a593Smuzhiyun #define FDC_NONE 0x00 115*4882a593Smuzhiyun #define FDC_UNKNOWN 0x10 /* DO NOT USE THIS TYPE EXCEPT IF IDENTIFICATION 116*4882a593Smuzhiyun FAILS EARLY */ 117*4882a593Smuzhiyun #define FDC_8272A 0x20 /* Intel 8272a, NEC 765 */ 118*4882a593Smuzhiyun #define FDC_765ED 0x30 /* Non-Intel 1MB-compatible FDC, can't detect */ 119*4882a593Smuzhiyun #define FDC_82072 0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */ 120*4882a593Smuzhiyun #define FDC_82072A 0x45 /* 82072A (on Sparcs) */ 121*4882a593Smuzhiyun #define FDC_82077_ORIG 0x51 /* Original version of 82077AA, sans LOCK */ 122*4882a593Smuzhiyun #define FDC_82077 0x52 /* 82077AA-1 */ 123*4882a593Smuzhiyun #define FDC_82078_UNKN 0x5f /* Unknown 82078 variant */ 124*4882a593Smuzhiyun #define FDC_82078 0x60 /* 44pin 82078 or 64pin 82078SL */ 125*4882a593Smuzhiyun #define FDC_82078_1 0x61 /* 82078-1 (2Mbps fdc) */ 126*4882a593Smuzhiyun #define FDC_S82078B 0x62 /* S82078B (first seen on Adaptec AVA-2825 VLB 127*4882a593Smuzhiyun * SCSI/EIDE/Floppy controller) */ 128*4882a593Smuzhiyun #define FDC_87306 0x63 /* National Semiconductor PC 87306 */ 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /* 131*4882a593Smuzhiyun * Beware: the fdc type list is roughly sorted by increasing features. 132*4882a593Smuzhiyun * Presence of features is tested by comparing the FDC version id with the 133*4882a593Smuzhiyun * "oldest" version that has the needed feature. 134*4882a593Smuzhiyun * If during FDC detection, an obscure test fails late in the sequence, don't 135*4882a593Smuzhiyun * assign FDC_UNKNOWN. Else the FDC will be treated as a dumb 8272a, or worse. 136*4882a593Smuzhiyun * This is especially true if the tests are unneeded. 137*4882a593Smuzhiyun */ 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define FD_RESET_DELAY 20 140*4882a593Smuzhiyun #endif 141