1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * linux/can/netlink.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Definitions for the CAN netlink interface 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2009 Wolfgang Grandegger <wg@grandegger.com> 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 10*4882a593Smuzhiyun * it under the terms of the version 2 of the GNU General Public License 11*4882a593Smuzhiyun * as published by the Free Software Foundation 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*4882a593Smuzhiyun * GNU General Public License for more details. 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifndef _UAPI_CAN_NETLINK_H 20*4882a593Smuzhiyun #define _UAPI_CAN_NETLINK_H 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #include <linux/types.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * CAN bit-timing parameters 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * For further information, please read chapter "8 BIT TIMING 28*4882a593Smuzhiyun * REQUIREMENTS" of the "Bosch CAN Specification version 2.0" 29*4882a593Smuzhiyun * at http://www.semiconductors.bosch.de/pdf/can2spec.pdf. 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun struct can_bittiming { 32*4882a593Smuzhiyun __u32 bitrate; /* Bit-rate in bits/second */ 33*4882a593Smuzhiyun __u32 sample_point; /* Sample point in one-tenth of a percent */ 34*4882a593Smuzhiyun __u32 tq; /* Time quanta (TQ) in nanoseconds */ 35*4882a593Smuzhiyun __u32 prop_seg; /* Propagation segment in TQs */ 36*4882a593Smuzhiyun __u32 phase_seg1; /* Phase buffer segment 1 in TQs */ 37*4882a593Smuzhiyun __u32 phase_seg2; /* Phase buffer segment 2 in TQs */ 38*4882a593Smuzhiyun __u32 sjw; /* Synchronisation jump width in TQs */ 39*4882a593Smuzhiyun __u32 brp; /* Bit-rate prescaler */ 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* 43*4882a593Smuzhiyun * CAN hardware-dependent bit-timing constant 44*4882a593Smuzhiyun * 45*4882a593Smuzhiyun * Used for calculating and checking bit-timing parameters 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun struct can_bittiming_const { 48*4882a593Smuzhiyun char name[16]; /* Name of the CAN controller hardware */ 49*4882a593Smuzhiyun __u32 tseg1_min; /* Time segment 1 = prop_seg + phase_seg1 */ 50*4882a593Smuzhiyun __u32 tseg1_max; 51*4882a593Smuzhiyun __u32 tseg2_min; /* Time segment 2 = phase_seg2 */ 52*4882a593Smuzhiyun __u32 tseg2_max; 53*4882a593Smuzhiyun __u32 sjw_max; /* Synchronisation jump width */ 54*4882a593Smuzhiyun __u32 brp_min; /* Bit-rate prescaler */ 55*4882a593Smuzhiyun __u32 brp_max; 56*4882a593Smuzhiyun __u32 brp_inc; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * CAN clock parameters 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun struct can_clock { 63*4882a593Smuzhiyun __u32 freq; /* CAN system clock frequency in Hz */ 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* 67*4882a593Smuzhiyun * CAN operational and error states 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun enum can_state { 70*4882a593Smuzhiyun CAN_STATE_ERROR_ACTIVE = 0, /* RX/TX error count < 96 */ 71*4882a593Smuzhiyun CAN_STATE_ERROR_WARNING, /* RX/TX error count < 128 */ 72*4882a593Smuzhiyun CAN_STATE_ERROR_PASSIVE, /* RX/TX error count < 256 */ 73*4882a593Smuzhiyun CAN_STATE_BUS_OFF, /* RX/TX error count >= 256 */ 74*4882a593Smuzhiyun CAN_STATE_STOPPED, /* Device is stopped */ 75*4882a593Smuzhiyun CAN_STATE_SLEEPING, /* Device is sleeping */ 76*4882a593Smuzhiyun CAN_STATE_MAX 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* 80*4882a593Smuzhiyun * CAN bus error counters 81*4882a593Smuzhiyun */ 82*4882a593Smuzhiyun struct can_berr_counter { 83*4882a593Smuzhiyun __u16 txerr; 84*4882a593Smuzhiyun __u16 rxerr; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* 88*4882a593Smuzhiyun * CAN controller mode 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun struct can_ctrlmode { 91*4882a593Smuzhiyun __u32 mask; 92*4882a593Smuzhiyun __u32 flags; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define CAN_CTRLMODE_LOOPBACK 0x01 /* Loopback mode */ 96*4882a593Smuzhiyun #define CAN_CTRLMODE_LISTENONLY 0x02 /* Listen-only mode */ 97*4882a593Smuzhiyun #define CAN_CTRLMODE_3_SAMPLES 0x04 /* Triple sampling mode */ 98*4882a593Smuzhiyun #define CAN_CTRLMODE_ONE_SHOT 0x08 /* One-Shot mode */ 99*4882a593Smuzhiyun #define CAN_CTRLMODE_BERR_REPORTING 0x10 /* Bus-error reporting */ 100*4882a593Smuzhiyun #define CAN_CTRLMODE_FD 0x20 /* CAN FD mode */ 101*4882a593Smuzhiyun #define CAN_CTRLMODE_PRESUME_ACK 0x40 /* Ignore missing CAN ACKs */ 102*4882a593Smuzhiyun #define CAN_CTRLMODE_FD_NON_ISO 0x80 /* CAN FD in non-ISO mode */ 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* 105*4882a593Smuzhiyun * CAN device statistics 106*4882a593Smuzhiyun */ 107*4882a593Smuzhiyun struct can_device_stats { 108*4882a593Smuzhiyun __u32 bus_error; /* Bus errors */ 109*4882a593Smuzhiyun __u32 error_warning; /* Changes to error warning state */ 110*4882a593Smuzhiyun __u32 error_passive; /* Changes to error passive state */ 111*4882a593Smuzhiyun __u32 bus_off; /* Changes to bus off state */ 112*4882a593Smuzhiyun __u32 arbitration_lost; /* Arbitration lost errors */ 113*4882a593Smuzhiyun __u32 restarts; /* CAN controller re-starts */ 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* 117*4882a593Smuzhiyun * CAN netlink interface 118*4882a593Smuzhiyun */ 119*4882a593Smuzhiyun enum { 120*4882a593Smuzhiyun IFLA_CAN_UNSPEC, 121*4882a593Smuzhiyun IFLA_CAN_BITTIMING, 122*4882a593Smuzhiyun IFLA_CAN_BITTIMING_CONST, 123*4882a593Smuzhiyun IFLA_CAN_CLOCK, 124*4882a593Smuzhiyun IFLA_CAN_STATE, 125*4882a593Smuzhiyun IFLA_CAN_CTRLMODE, 126*4882a593Smuzhiyun IFLA_CAN_RESTART_MS, 127*4882a593Smuzhiyun IFLA_CAN_RESTART, 128*4882a593Smuzhiyun IFLA_CAN_BERR_COUNTER, 129*4882a593Smuzhiyun IFLA_CAN_DATA_BITTIMING, 130*4882a593Smuzhiyun IFLA_CAN_DATA_BITTIMING_CONST, 131*4882a593Smuzhiyun IFLA_CAN_TERMINATION, 132*4882a593Smuzhiyun IFLA_CAN_TERMINATION_CONST, 133*4882a593Smuzhiyun IFLA_CAN_BITRATE_CONST, 134*4882a593Smuzhiyun IFLA_CAN_DATA_BITRATE_CONST, 135*4882a593Smuzhiyun IFLA_CAN_BITRATE_MAX, 136*4882a593Smuzhiyun __IFLA_CAN_MAX 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define IFLA_CAN_MAX (__IFLA_CAN_MAX - 1) 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* u16 termination range: 1..65535 Ohms */ 142*4882a593Smuzhiyun #define CAN_TERMINATION_DISABLED 0 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #endif /* !_UAPI_CAN_NETLINK_H */ 145