1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2013 Red Hat 3*4882a593Smuzhiyun * All Rights Reserved. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 6*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 7*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 8*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 10*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next 13*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the 14*4882a593Smuzhiyun * Software. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19*4882a593Smuzhiyun * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 20*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun #ifndef QXL_DRM_H 25*4882a593Smuzhiyun #define QXL_DRM_H 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #include "drm.h" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #if defined(__cplusplus) 30*4882a593Smuzhiyun extern "C" { 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Please note that modifications to all structs defined here are 34*4882a593Smuzhiyun * subject to backwards-compatibility constraints. 35*4882a593Smuzhiyun * 36*4882a593Smuzhiyun * Do not use pointers, use __u64 instead for 32 bit / 64 bit user/kernel 37*4882a593Smuzhiyun * compatibility Keep fields aligned to their size 38*4882a593Smuzhiyun */ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define QXL_GEM_DOMAIN_CPU 0 41*4882a593Smuzhiyun #define QXL_GEM_DOMAIN_VRAM 1 42*4882a593Smuzhiyun #define QXL_GEM_DOMAIN_SURFACE 2 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define DRM_QXL_ALLOC 0x00 45*4882a593Smuzhiyun #define DRM_QXL_MAP 0x01 46*4882a593Smuzhiyun #define DRM_QXL_EXECBUFFER 0x02 47*4882a593Smuzhiyun #define DRM_QXL_UPDATE_AREA 0x03 48*4882a593Smuzhiyun #define DRM_QXL_GETPARAM 0x04 49*4882a593Smuzhiyun #define DRM_QXL_CLIENTCAP 0x05 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define DRM_QXL_ALLOC_SURF 0x06 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun struct drm_qxl_alloc { 54*4882a593Smuzhiyun __u32 size; 55*4882a593Smuzhiyun __u32 handle; /* 0 is an invalid handle */ 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct drm_qxl_map { 59*4882a593Smuzhiyun __u64 offset; /* use for mmap system call */ 60*4882a593Smuzhiyun __u32 handle; 61*4882a593Smuzhiyun __u32 pad; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* 65*4882a593Smuzhiyun * dest is the bo we are writing the relocation into 66*4882a593Smuzhiyun * src is bo we are relocating. 67*4882a593Smuzhiyun * *(dest_handle.base_addr + dest_offset) = physical_address(src_handle.addr + 68*4882a593Smuzhiyun * src_offset) 69*4882a593Smuzhiyun */ 70*4882a593Smuzhiyun #define QXL_RELOC_TYPE_BO 1 71*4882a593Smuzhiyun #define QXL_RELOC_TYPE_SURF 2 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun struct drm_qxl_reloc { 74*4882a593Smuzhiyun __u64 src_offset; /* offset into src_handle or src buffer */ 75*4882a593Smuzhiyun __u64 dst_offset; /* offset in dest handle */ 76*4882a593Smuzhiyun __u32 src_handle; /* dest handle to compute address from */ 77*4882a593Smuzhiyun __u32 dst_handle; /* 0 if to command buffer */ 78*4882a593Smuzhiyun __u32 reloc_type; 79*4882a593Smuzhiyun __u32 pad; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun struct drm_qxl_command { 83*4882a593Smuzhiyun __u64 command; /* void* */ 84*4882a593Smuzhiyun __u64 relocs; /* struct drm_qxl_reloc* */ 85*4882a593Smuzhiyun __u32 type; 86*4882a593Smuzhiyun __u32 command_size; 87*4882a593Smuzhiyun __u32 relocs_num; 88*4882a593Smuzhiyun __u32 pad; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun struct drm_qxl_execbuffer { 92*4882a593Smuzhiyun __u32 flags; /* for future use */ 93*4882a593Smuzhiyun __u32 commands_num; 94*4882a593Smuzhiyun __u64 commands; /* struct drm_qxl_command* */ 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun struct drm_qxl_update_area { 98*4882a593Smuzhiyun __u32 handle; 99*4882a593Smuzhiyun __u32 top; 100*4882a593Smuzhiyun __u32 left; 101*4882a593Smuzhiyun __u32 bottom; 102*4882a593Smuzhiyun __u32 right; 103*4882a593Smuzhiyun __u32 pad; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define QXL_PARAM_NUM_SURFACES 1 /* rom->n_surfaces */ 107*4882a593Smuzhiyun #define QXL_PARAM_MAX_RELOCS 2 108*4882a593Smuzhiyun struct drm_qxl_getparam { 109*4882a593Smuzhiyun __u64 param; 110*4882a593Smuzhiyun __u64 value; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /* these are one bit values */ 114*4882a593Smuzhiyun struct drm_qxl_clientcap { 115*4882a593Smuzhiyun __u32 index; 116*4882a593Smuzhiyun __u32 pad; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun struct drm_qxl_alloc_surf { 120*4882a593Smuzhiyun __u32 format; 121*4882a593Smuzhiyun __u32 width; 122*4882a593Smuzhiyun __u32 height; 123*4882a593Smuzhiyun __s32 stride; 124*4882a593Smuzhiyun __u32 handle; 125*4882a593Smuzhiyun __u32 pad; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define DRM_IOCTL_QXL_ALLOC \ 129*4882a593Smuzhiyun DRM_IOWR(DRM_COMMAND_BASE + DRM_QXL_ALLOC, struct drm_qxl_alloc) 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #define DRM_IOCTL_QXL_MAP \ 132*4882a593Smuzhiyun DRM_IOWR(DRM_COMMAND_BASE + DRM_QXL_MAP, struct drm_qxl_map) 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define DRM_IOCTL_QXL_EXECBUFFER \ 135*4882a593Smuzhiyun DRM_IOW(DRM_COMMAND_BASE + DRM_QXL_EXECBUFFER,\ 136*4882a593Smuzhiyun struct drm_qxl_execbuffer) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #define DRM_IOCTL_QXL_UPDATE_AREA \ 139*4882a593Smuzhiyun DRM_IOW(DRM_COMMAND_BASE + DRM_QXL_UPDATE_AREA,\ 140*4882a593Smuzhiyun struct drm_qxl_update_area) 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun #define DRM_IOCTL_QXL_GETPARAM \ 143*4882a593Smuzhiyun DRM_IOWR(DRM_COMMAND_BASE + DRM_QXL_GETPARAM,\ 144*4882a593Smuzhiyun struct drm_qxl_getparam) 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #define DRM_IOCTL_QXL_CLIENTCAP \ 147*4882a593Smuzhiyun DRM_IOW(DRM_COMMAND_BASE + DRM_QXL_CLIENTCAP,\ 148*4882a593Smuzhiyun struct drm_qxl_clientcap) 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun #define DRM_IOCTL_QXL_ALLOC_SURF \ 151*4882a593Smuzhiyun DRM_IOWR(DRM_COMMAND_BASE + DRM_QXL_ALLOC_SURF,\ 152*4882a593Smuzhiyun struct drm_qxl_alloc_surf) 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #if defined(__cplusplus) 155*4882a593Smuzhiyun } 156*4882a593Smuzhiyun #endif 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun #endif 159