1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> 3*4882a593Smuzhiyun * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com> 4*4882a593Smuzhiyun * Copyright (c) 2008 Red Hat Inc. 5*4882a593Smuzhiyun * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6*4882a593Smuzhiyun * Copyright (c) 2007-2008 Intel Corporation 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 9*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 10*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 11*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 13*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 16*4882a593Smuzhiyun * all copies or substantial portions of the Software. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21*4882a593Smuzhiyun * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24*4882a593Smuzhiyun * IN THE SOFTWARE. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #ifndef _DRM_MODE_H 28*4882a593Smuzhiyun #define _DRM_MODE_H 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #include "drm.h" 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #if defined(__cplusplus) 33*4882a593Smuzhiyun extern "C" { 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /** 37*4882a593Smuzhiyun * DOC: overview 38*4882a593Smuzhiyun * 39*4882a593Smuzhiyun * DRM exposes many UAPI and structure definition to have a consistent 40*4882a593Smuzhiyun * and standardized interface with user. 41*4882a593Smuzhiyun * Userspace can refer to these structure definitions and UAPI formats 42*4882a593Smuzhiyun * to communicate to driver 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define DRM_CONNECTOR_NAME_LEN 32 46*4882a593Smuzhiyun #define DRM_DISPLAY_MODE_LEN 32 47*4882a593Smuzhiyun #define DRM_PROP_NAME_LEN 32 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define DRM_MODE_TYPE_BUILTIN (1<<0) /* deprecated */ 50*4882a593Smuzhiyun #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */ 51*4882a593Smuzhiyun #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */ 52*4882a593Smuzhiyun #define DRM_MODE_TYPE_PREFERRED (1<<3) 53*4882a593Smuzhiyun #define DRM_MODE_TYPE_DEFAULT (1<<4) /* deprecated */ 54*4882a593Smuzhiyun #define DRM_MODE_TYPE_USERDEF (1<<5) 55*4882a593Smuzhiyun #define DRM_MODE_TYPE_DRIVER (1<<6) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | \ 58*4882a593Smuzhiyun DRM_MODE_TYPE_USERDEF | \ 59*4882a593Smuzhiyun DRM_MODE_TYPE_DRIVER) 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* Video mode flags */ 62*4882a593Smuzhiyun /* bit compatible with the xrandr RR_ definitions (bits 0-13) 63*4882a593Smuzhiyun * 64*4882a593Smuzhiyun * ABI warning: Existing userspace really expects 65*4882a593Smuzhiyun * the mode flags to match the xrandr definitions. Any 66*4882a593Smuzhiyun * changes that don't match the xrandr definitions will 67*4882a593Smuzhiyun * likely need a new client cap or some other mechanism 68*4882a593Smuzhiyun * to avoid breaking existing userspace. This includes 69*4882a593Smuzhiyun * allocating new flags in the previously unused bits! 70*4882a593Smuzhiyun */ 71*4882a593Smuzhiyun #define DRM_MODE_FLAG_PHSYNC (1<<0) 72*4882a593Smuzhiyun #define DRM_MODE_FLAG_NHSYNC (1<<1) 73*4882a593Smuzhiyun #define DRM_MODE_FLAG_PVSYNC (1<<2) 74*4882a593Smuzhiyun #define DRM_MODE_FLAG_NVSYNC (1<<3) 75*4882a593Smuzhiyun #define DRM_MODE_FLAG_INTERLACE (1<<4) 76*4882a593Smuzhiyun #define DRM_MODE_FLAG_DBLSCAN (1<<5) 77*4882a593Smuzhiyun #define DRM_MODE_FLAG_CSYNC (1<<6) 78*4882a593Smuzhiyun #define DRM_MODE_FLAG_PCSYNC (1<<7) 79*4882a593Smuzhiyun #define DRM_MODE_FLAG_NCSYNC (1<<8) 80*4882a593Smuzhiyun #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ 81*4882a593Smuzhiyun #define DRM_MODE_FLAG_BCAST (1<<10) /* deprecated */ 82*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIXMUX (1<<11) /* deprecated */ 83*4882a593Smuzhiyun #define DRM_MODE_FLAG_DBLCLK (1<<12) 84*4882a593Smuzhiyun #define DRM_MODE_FLAG_CLKDIV2 (1<<13) 85*4882a593Smuzhiyun /* 86*4882a593Smuzhiyun * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX 87*4882a593Smuzhiyun * (define not exposed to user space). 88*4882a593Smuzhiyun */ 89*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 90*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_NONE (0<<14) 91*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 92*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 93*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 94*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 95*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 96*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 97*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 98*4882a593Smuzhiyun #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* Picture aspect ratio options */ 101*4882a593Smuzhiyun #define DRM_MODE_PICTURE_ASPECT_NONE 0 102*4882a593Smuzhiyun #define DRM_MODE_PICTURE_ASPECT_4_3 1 103*4882a593Smuzhiyun #define DRM_MODE_PICTURE_ASPECT_16_9 2 104*4882a593Smuzhiyun #define DRM_MODE_PICTURE_ASPECT_64_27 3 105*4882a593Smuzhiyun #define DRM_MODE_PICTURE_ASPECT_256_135 4 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* Content type options */ 108*4882a593Smuzhiyun #define DRM_MODE_CONTENT_TYPE_NO_DATA 0 109*4882a593Smuzhiyun #define DRM_MODE_CONTENT_TYPE_GRAPHICS 1 110*4882a593Smuzhiyun #define DRM_MODE_CONTENT_TYPE_PHOTO 2 111*4882a593Smuzhiyun #define DRM_MODE_CONTENT_TYPE_CINEMA 3 112*4882a593Smuzhiyun #define DRM_MODE_CONTENT_TYPE_GAME 4 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* Aspect ratio flag bitmask (4 bits 22:19) */ 115*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19) 116*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIC_AR_NONE \ 117*4882a593Smuzhiyun (DRM_MODE_PICTURE_ASPECT_NONE<<19) 118*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIC_AR_4_3 \ 119*4882a593Smuzhiyun (DRM_MODE_PICTURE_ASPECT_4_3<<19) 120*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIC_AR_16_9 \ 121*4882a593Smuzhiyun (DRM_MODE_PICTURE_ASPECT_16_9<<19) 122*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIC_AR_64_27 \ 123*4882a593Smuzhiyun (DRM_MODE_PICTURE_ASPECT_64_27<<19) 124*4882a593Smuzhiyun #define DRM_MODE_FLAG_PIC_AR_256_135 \ 125*4882a593Smuzhiyun (DRM_MODE_PICTURE_ASPECT_256_135<<19) 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \ 128*4882a593Smuzhiyun DRM_MODE_FLAG_NHSYNC | \ 129*4882a593Smuzhiyun DRM_MODE_FLAG_PVSYNC | \ 130*4882a593Smuzhiyun DRM_MODE_FLAG_NVSYNC | \ 131*4882a593Smuzhiyun DRM_MODE_FLAG_INTERLACE | \ 132*4882a593Smuzhiyun DRM_MODE_FLAG_DBLSCAN | \ 133*4882a593Smuzhiyun DRM_MODE_FLAG_CSYNC | \ 134*4882a593Smuzhiyun DRM_MODE_FLAG_PCSYNC | \ 135*4882a593Smuzhiyun DRM_MODE_FLAG_NCSYNC | \ 136*4882a593Smuzhiyun DRM_MODE_FLAG_HSKEW | \ 137*4882a593Smuzhiyun DRM_MODE_FLAG_DBLCLK | \ 138*4882a593Smuzhiyun DRM_MODE_FLAG_CLKDIV2 | \ 139*4882a593Smuzhiyun DRM_MODE_FLAG_3D_MASK) 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* DPMS flags */ 142*4882a593Smuzhiyun /* bit compatible with the xorg definitions. */ 143*4882a593Smuzhiyun #define DRM_MODE_DPMS_ON 0 144*4882a593Smuzhiyun #define DRM_MODE_DPMS_STANDBY 1 145*4882a593Smuzhiyun #define DRM_MODE_DPMS_SUSPEND 2 146*4882a593Smuzhiyun #define DRM_MODE_DPMS_OFF 3 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* Scaling mode options */ 149*4882a593Smuzhiyun #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or 150*4882a593Smuzhiyun software can still scale) */ 151*4882a593Smuzhiyun #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ 152*4882a593Smuzhiyun #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ 153*4882a593Smuzhiyun #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* Dithering mode options */ 156*4882a593Smuzhiyun #define DRM_MODE_DITHERING_OFF 0 157*4882a593Smuzhiyun #define DRM_MODE_DITHERING_ON 1 158*4882a593Smuzhiyun #define DRM_MODE_DITHERING_AUTO 2 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun /* Dirty info options */ 161*4882a593Smuzhiyun #define DRM_MODE_DIRTY_OFF 0 162*4882a593Smuzhiyun #define DRM_MODE_DIRTY_ON 1 163*4882a593Smuzhiyun #define DRM_MODE_DIRTY_ANNOTATE 2 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* Link Status options */ 166*4882a593Smuzhiyun #define DRM_MODE_LINK_STATUS_GOOD 0 167*4882a593Smuzhiyun #define DRM_MODE_LINK_STATUS_BAD 1 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun /* 170*4882a593Smuzhiyun * DRM_MODE_ROTATE_<degrees> 171*4882a593Smuzhiyun * 172*4882a593Smuzhiyun * Signals that a drm plane is been rotated <degrees> degrees in counter 173*4882a593Smuzhiyun * clockwise direction. 174*4882a593Smuzhiyun * 175*4882a593Smuzhiyun * This define is provided as a convenience, looking up the property id 176*4882a593Smuzhiyun * using the name->prop id lookup is the preferred method. 177*4882a593Smuzhiyun */ 178*4882a593Smuzhiyun #define DRM_MODE_ROTATE_0 (1<<0) 179*4882a593Smuzhiyun #define DRM_MODE_ROTATE_90 (1<<1) 180*4882a593Smuzhiyun #define DRM_MODE_ROTATE_180 (1<<2) 181*4882a593Smuzhiyun #define DRM_MODE_ROTATE_270 (1<<3) 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /* 184*4882a593Smuzhiyun * DRM_MODE_ROTATE_MASK 185*4882a593Smuzhiyun * 186*4882a593Smuzhiyun * Bitmask used to look for drm plane rotations. 187*4882a593Smuzhiyun */ 188*4882a593Smuzhiyun #define DRM_MODE_ROTATE_MASK (\ 189*4882a593Smuzhiyun DRM_MODE_ROTATE_0 | \ 190*4882a593Smuzhiyun DRM_MODE_ROTATE_90 | \ 191*4882a593Smuzhiyun DRM_MODE_ROTATE_180 | \ 192*4882a593Smuzhiyun DRM_MODE_ROTATE_270) 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* 195*4882a593Smuzhiyun * DRM_MODE_REFLECT_<axis> 196*4882a593Smuzhiyun * 197*4882a593Smuzhiyun * Signals that the contents of a drm plane is reflected along the <axis> axis, 198*4882a593Smuzhiyun * in the same way as mirroring. 199*4882a593Smuzhiyun * See kerneldoc chapter "Plane Composition Properties" for more details. 200*4882a593Smuzhiyun * 201*4882a593Smuzhiyun * This define is provided as a convenience, looking up the property id 202*4882a593Smuzhiyun * using the name->prop id lookup is the preferred method. 203*4882a593Smuzhiyun */ 204*4882a593Smuzhiyun #define DRM_MODE_REFLECT_X (1<<4) 205*4882a593Smuzhiyun #define DRM_MODE_REFLECT_Y (1<<5) 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun /* 208*4882a593Smuzhiyun * DRM_MODE_REFLECT_MASK 209*4882a593Smuzhiyun * 210*4882a593Smuzhiyun * Bitmask used to look for drm plane reflections. 211*4882a593Smuzhiyun */ 212*4882a593Smuzhiyun #define DRM_MODE_REFLECT_MASK (\ 213*4882a593Smuzhiyun DRM_MODE_REFLECT_X | \ 214*4882a593Smuzhiyun DRM_MODE_REFLECT_Y) 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun /* Content Protection Flags */ 217*4882a593Smuzhiyun #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0 218*4882a593Smuzhiyun #define DRM_MODE_CONTENT_PROTECTION_DESIRED 1 219*4882a593Smuzhiyun #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun struct drm_mode_modeinfo { 222*4882a593Smuzhiyun __u32 clock; 223*4882a593Smuzhiyun __u16 hdisplay; 224*4882a593Smuzhiyun __u16 hsync_start; 225*4882a593Smuzhiyun __u16 hsync_end; 226*4882a593Smuzhiyun __u16 htotal; 227*4882a593Smuzhiyun __u16 hskew; 228*4882a593Smuzhiyun __u16 vdisplay; 229*4882a593Smuzhiyun __u16 vsync_start; 230*4882a593Smuzhiyun __u16 vsync_end; 231*4882a593Smuzhiyun __u16 vtotal; 232*4882a593Smuzhiyun __u16 vscan; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun __u32 vrefresh; 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun __u32 flags; 237*4882a593Smuzhiyun __u32 type; 238*4882a593Smuzhiyun char name[DRM_DISPLAY_MODE_LEN]; 239*4882a593Smuzhiyun }; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun struct drm_mode_card_res { 242*4882a593Smuzhiyun __u64 fb_id_ptr; 243*4882a593Smuzhiyun __u64 crtc_id_ptr; 244*4882a593Smuzhiyun __u64 connector_id_ptr; 245*4882a593Smuzhiyun __u64 encoder_id_ptr; 246*4882a593Smuzhiyun __u32 count_fbs; 247*4882a593Smuzhiyun __u32 count_crtcs; 248*4882a593Smuzhiyun __u32 count_connectors; 249*4882a593Smuzhiyun __u32 count_encoders; 250*4882a593Smuzhiyun __u32 min_width; 251*4882a593Smuzhiyun __u32 max_width; 252*4882a593Smuzhiyun __u32 min_height; 253*4882a593Smuzhiyun __u32 max_height; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun struct drm_mode_crtc { 257*4882a593Smuzhiyun __u64 set_connectors_ptr; 258*4882a593Smuzhiyun __u32 count_connectors; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun __u32 crtc_id; /**< Id */ 261*4882a593Smuzhiyun __u32 fb_id; /**< Id of framebuffer */ 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun __u32 x; /**< x Position on the framebuffer */ 264*4882a593Smuzhiyun __u32 y; /**< y Position on the framebuffer */ 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun __u32 gamma_size; 267*4882a593Smuzhiyun __u32 mode_valid; 268*4882a593Smuzhiyun struct drm_mode_modeinfo mode; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun #define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 272*4882a593Smuzhiyun #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun /* Planes blend with or override other bits on the CRTC */ 275*4882a593Smuzhiyun struct drm_mode_set_plane { 276*4882a593Smuzhiyun __u32 plane_id; 277*4882a593Smuzhiyun __u32 crtc_id; 278*4882a593Smuzhiyun __u32 fb_id; /* fb object contains surface format type */ 279*4882a593Smuzhiyun __u32 flags; /* see above flags */ 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun /* Signed dest location allows it to be partially off screen */ 282*4882a593Smuzhiyun __s32 crtc_x; 283*4882a593Smuzhiyun __s32 crtc_y; 284*4882a593Smuzhiyun __u32 crtc_w; 285*4882a593Smuzhiyun __u32 crtc_h; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun /* Source values are 16.16 fixed point */ 288*4882a593Smuzhiyun __u32 src_x; 289*4882a593Smuzhiyun __u32 src_y; 290*4882a593Smuzhiyun __u32 src_h; 291*4882a593Smuzhiyun __u32 src_w; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun struct drm_mode_get_plane { 295*4882a593Smuzhiyun __u32 plane_id; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun __u32 crtc_id; 298*4882a593Smuzhiyun __u32 fb_id; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun __u32 possible_crtcs; 301*4882a593Smuzhiyun __u32 gamma_size; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun __u32 count_format_types; 304*4882a593Smuzhiyun __u64 format_type_ptr; 305*4882a593Smuzhiyun }; 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun struct drm_mode_get_plane_res { 308*4882a593Smuzhiyun __u64 plane_id_ptr; 309*4882a593Smuzhiyun __u32 count_planes; 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun #define DRM_MODE_ENCODER_NONE 0 313*4882a593Smuzhiyun #define DRM_MODE_ENCODER_DAC 1 314*4882a593Smuzhiyun #define DRM_MODE_ENCODER_TMDS 2 315*4882a593Smuzhiyun #define DRM_MODE_ENCODER_LVDS 3 316*4882a593Smuzhiyun #define DRM_MODE_ENCODER_TVDAC 4 317*4882a593Smuzhiyun #define DRM_MODE_ENCODER_VIRTUAL 5 318*4882a593Smuzhiyun #define DRM_MODE_ENCODER_DSI 6 319*4882a593Smuzhiyun #define DRM_MODE_ENCODER_DPMST 7 320*4882a593Smuzhiyun #define DRM_MODE_ENCODER_DPI 8 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun struct drm_mode_get_encoder { 323*4882a593Smuzhiyun __u32 encoder_id; 324*4882a593Smuzhiyun __u32 encoder_type; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun __u32 crtc_id; /**< Id of crtc */ 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun __u32 possible_crtcs; 329*4882a593Smuzhiyun __u32 possible_clones; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun /* This is for connectors with multiple signal types. */ 333*4882a593Smuzhiyun /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ 334*4882a593Smuzhiyun enum drm_mode_subconnector { 335*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_Automatic = 0, /* DVI-I, TV */ 336*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_Unknown = 0, /* DVI-I, TV, DP */ 337*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_VGA = 1, /* DP */ 338*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_DVID = 3, /* DVI-I DP */ 339*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_DVIA = 4, /* DVI-I */ 340*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_Composite = 5, /* TV */ 341*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_SVIDEO = 6, /* TV */ 342*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_Component = 8, /* TV */ 343*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_SCART = 9, /* TV */ 344*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_DisplayPort = 10, /* DP */ 345*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_HDMIA = 11, /* DP */ 346*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_Native = 15, /* DP */ 347*4882a593Smuzhiyun DRM_MODE_SUBCONNECTOR_Wireless = 18, /* DP */ 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_Unknown 0 351*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_VGA 1 352*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_DVII 2 353*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_DVID 3 354*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_DVIA 4 355*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_Composite 5 356*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_SVIDEO 6 357*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_LVDS 7 358*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_Component 8 359*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_9PinDIN 9 360*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_DisplayPort 10 361*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_HDMIA 11 362*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_HDMIB 12 363*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_TV 13 364*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_eDP 14 365*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_VIRTUAL 15 366*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_DSI 16 367*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_DPI 17 368*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_WRITEBACK 18 369*4882a593Smuzhiyun #define DRM_MODE_CONNECTOR_SPI 19 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun struct drm_mode_get_connector { 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun __u64 encoders_ptr; 374*4882a593Smuzhiyun __u64 modes_ptr; 375*4882a593Smuzhiyun __u64 props_ptr; 376*4882a593Smuzhiyun __u64 prop_values_ptr; 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun __u32 count_modes; 379*4882a593Smuzhiyun __u32 count_props; 380*4882a593Smuzhiyun __u32 count_encoders; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun __u32 encoder_id; /**< Current Encoder */ 383*4882a593Smuzhiyun __u32 connector_id; /**< Id */ 384*4882a593Smuzhiyun __u32 connector_type; 385*4882a593Smuzhiyun __u32 connector_type_id; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun __u32 connection; 388*4882a593Smuzhiyun __u32 mm_width; /**< width in millimeters */ 389*4882a593Smuzhiyun __u32 mm_height; /**< height in millimeters */ 390*4882a593Smuzhiyun __u32 subpixel; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun __u32 pad; 393*4882a593Smuzhiyun }; 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun #define DRM_MODE_PROP_PENDING (1<<0) /* deprecated, do not use */ 396*4882a593Smuzhiyun #define DRM_MODE_PROP_RANGE (1<<1) 397*4882a593Smuzhiyun #define DRM_MODE_PROP_IMMUTABLE (1<<2) 398*4882a593Smuzhiyun #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ 399*4882a593Smuzhiyun #define DRM_MODE_PROP_BLOB (1<<4) 400*4882a593Smuzhiyun #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun /* non-extended types: legacy bitmask, one bit per type: */ 403*4882a593Smuzhiyun #define DRM_MODE_PROP_LEGACY_TYPE ( \ 404*4882a593Smuzhiyun DRM_MODE_PROP_RANGE | \ 405*4882a593Smuzhiyun DRM_MODE_PROP_ENUM | \ 406*4882a593Smuzhiyun DRM_MODE_PROP_BLOB | \ 407*4882a593Smuzhiyun DRM_MODE_PROP_BITMASK) 408*4882a593Smuzhiyun 409*4882a593Smuzhiyun /* extended-types: rather than continue to consume a bit per type, 410*4882a593Smuzhiyun * grab a chunk of the bits to use as integer type id. 411*4882a593Smuzhiyun */ 412*4882a593Smuzhiyun #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 413*4882a593Smuzhiyun #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 414*4882a593Smuzhiyun #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 415*4882a593Smuzhiyun #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun /* the PROP_ATOMIC flag is used to hide properties from userspace that 418*4882a593Smuzhiyun * is not aware of atomic properties. This is mostly to work around 419*4882a593Smuzhiyun * older userspace (DDX drivers) that read/write each prop they find, 420*4882a593Smuzhiyun * witout being aware that this could be triggering a lengthy modeset. 421*4882a593Smuzhiyun */ 422*4882a593Smuzhiyun #define DRM_MODE_PROP_ATOMIC 0x80000000 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun struct drm_mode_property_enum { 425*4882a593Smuzhiyun __u64 value; 426*4882a593Smuzhiyun char name[DRM_PROP_NAME_LEN]; 427*4882a593Smuzhiyun }; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun struct drm_mode_get_property { 430*4882a593Smuzhiyun __u64 values_ptr; /* values and blob lengths */ 431*4882a593Smuzhiyun __u64 enum_blob_ptr; /* enum and blob id ptrs */ 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun __u32 prop_id; 434*4882a593Smuzhiyun __u32 flags; 435*4882a593Smuzhiyun char name[DRM_PROP_NAME_LEN]; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun __u32 count_values; 438*4882a593Smuzhiyun /* This is only used to count enum values, not blobs. The _blobs is 439*4882a593Smuzhiyun * simply because of a historical reason, i.e. backwards compat. */ 440*4882a593Smuzhiyun __u32 count_enum_blobs; 441*4882a593Smuzhiyun }; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun struct drm_mode_connector_set_property { 444*4882a593Smuzhiyun __u64 value; 445*4882a593Smuzhiyun __u32 prop_id; 446*4882a593Smuzhiyun __u32 connector_id; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun #define DRM_MODE_OBJECT_CRTC 0xcccccccc 450*4882a593Smuzhiyun #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 451*4882a593Smuzhiyun #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 452*4882a593Smuzhiyun #define DRM_MODE_OBJECT_MODE 0xdededede 453*4882a593Smuzhiyun #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 454*4882a593Smuzhiyun #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 455*4882a593Smuzhiyun #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 456*4882a593Smuzhiyun #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 457*4882a593Smuzhiyun #define DRM_MODE_OBJECT_ANY 0 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun struct drm_mode_obj_get_properties { 460*4882a593Smuzhiyun __u64 props_ptr; 461*4882a593Smuzhiyun __u64 prop_values_ptr; 462*4882a593Smuzhiyun __u32 count_props; 463*4882a593Smuzhiyun __u32 obj_id; 464*4882a593Smuzhiyun __u32 obj_type; 465*4882a593Smuzhiyun }; 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun struct drm_mode_obj_set_property { 468*4882a593Smuzhiyun __u64 value; 469*4882a593Smuzhiyun __u32 prop_id; 470*4882a593Smuzhiyun __u32 obj_id; 471*4882a593Smuzhiyun __u32 obj_type; 472*4882a593Smuzhiyun }; 473*4882a593Smuzhiyun 474*4882a593Smuzhiyun struct drm_mode_get_blob { 475*4882a593Smuzhiyun __u32 blob_id; 476*4882a593Smuzhiyun __u32 length; 477*4882a593Smuzhiyun __u64 data; 478*4882a593Smuzhiyun }; 479*4882a593Smuzhiyun 480*4882a593Smuzhiyun struct drm_mode_fb_cmd { 481*4882a593Smuzhiyun __u32 fb_id; 482*4882a593Smuzhiyun __u32 width; 483*4882a593Smuzhiyun __u32 height; 484*4882a593Smuzhiyun __u32 pitch; 485*4882a593Smuzhiyun __u32 bpp; 486*4882a593Smuzhiyun __u32 depth; 487*4882a593Smuzhiyun /* driver specific handle */ 488*4882a593Smuzhiyun __u32 handle; 489*4882a593Smuzhiyun }; 490*4882a593Smuzhiyun 491*4882a593Smuzhiyun #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ 492*4882a593Smuzhiyun #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */ 493*4882a593Smuzhiyun 494*4882a593Smuzhiyun struct drm_mode_fb_cmd2 { 495*4882a593Smuzhiyun __u32 fb_id; 496*4882a593Smuzhiyun __u32 width; 497*4882a593Smuzhiyun __u32 height; 498*4882a593Smuzhiyun __u32 pixel_format; /* fourcc code from drm_fourcc.h */ 499*4882a593Smuzhiyun __u32 flags; /* see above flags */ 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun /* 502*4882a593Smuzhiyun * In case of planar formats, this ioctl allows up to 4 503*4882a593Smuzhiyun * buffer objects with offsets and pitches per plane. 504*4882a593Smuzhiyun * The pitch and offset order is dictated by the fourcc, 505*4882a593Smuzhiyun * e.g. NV12 (https://fourcc.org/yuv.php#NV12) is described as: 506*4882a593Smuzhiyun * 507*4882a593Smuzhiyun * YUV 4:2:0 image with a plane of 8 bit Y samples 508*4882a593Smuzhiyun * followed by an interleaved U/V plane containing 509*4882a593Smuzhiyun * 8 bit 2x2 subsampled colour difference samples. 510*4882a593Smuzhiyun * 511*4882a593Smuzhiyun * So it would consist of Y as offsets[0] and UV as 512*4882a593Smuzhiyun * offsets[1]. Note that offsets[0] will generally 513*4882a593Smuzhiyun * be 0 (but this is not required). 514*4882a593Smuzhiyun * 515*4882a593Smuzhiyun * To accommodate tiled, compressed, etc formats, a 516*4882a593Smuzhiyun * modifier can be specified. The default value of zero 517*4882a593Smuzhiyun * indicates "native" format as specified by the fourcc. 518*4882a593Smuzhiyun * Vendor specific modifier token. Note that even though 519*4882a593Smuzhiyun * it looks like we have a modifier per-plane, we in fact 520*4882a593Smuzhiyun * do not. The modifier for each plane must be identical. 521*4882a593Smuzhiyun * Thus all combinations of different data layouts for 522*4882a593Smuzhiyun * multi plane formats must be enumerated as separate 523*4882a593Smuzhiyun * modifiers. 524*4882a593Smuzhiyun */ 525*4882a593Smuzhiyun __u32 handles[4]; 526*4882a593Smuzhiyun __u32 pitches[4]; /* pitch for each plane */ 527*4882a593Smuzhiyun __u32 offsets[4]; /* offset of each plane */ 528*4882a593Smuzhiyun __u64 modifier[4]; /* ie, tiling, compress */ 529*4882a593Smuzhiyun }; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 532*4882a593Smuzhiyun #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 533*4882a593Smuzhiyun #define DRM_MODE_FB_DIRTY_FLAGS 0x03 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun /* 538*4882a593Smuzhiyun * Mark a region of a framebuffer as dirty. 539*4882a593Smuzhiyun * 540*4882a593Smuzhiyun * Some hardware does not automatically update display contents 541*4882a593Smuzhiyun * as a hardware or software draw to a framebuffer. This ioctl 542*4882a593Smuzhiyun * allows userspace to tell the kernel and the hardware what 543*4882a593Smuzhiyun * regions of the framebuffer have changed. 544*4882a593Smuzhiyun * 545*4882a593Smuzhiyun * The kernel or hardware is free to update more then just the 546*4882a593Smuzhiyun * region specified by the clip rects. The kernel or hardware 547*4882a593Smuzhiyun * may also delay and/or coalesce several calls to dirty into a 548*4882a593Smuzhiyun * single update. 549*4882a593Smuzhiyun * 550*4882a593Smuzhiyun * Userspace may annotate the updates, the annotates are a 551*4882a593Smuzhiyun * promise made by the caller that the change is either a copy 552*4882a593Smuzhiyun * of pixels or a fill of a single color in the region specified. 553*4882a593Smuzhiyun * 554*4882a593Smuzhiyun * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then 555*4882a593Smuzhiyun * the number of updated regions are half of num_clips given, 556*4882a593Smuzhiyun * where the clip rects are paired in src and dst. The width and 557*4882a593Smuzhiyun * height of each one of the pairs must match. 558*4882a593Smuzhiyun * 559*4882a593Smuzhiyun * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller 560*4882a593Smuzhiyun * promises that the region specified of the clip rects is filled 561*4882a593Smuzhiyun * completely with a single color as given in the color argument. 562*4882a593Smuzhiyun */ 563*4882a593Smuzhiyun 564*4882a593Smuzhiyun struct drm_mode_fb_dirty_cmd { 565*4882a593Smuzhiyun __u32 fb_id; 566*4882a593Smuzhiyun __u32 flags; 567*4882a593Smuzhiyun __u32 color; 568*4882a593Smuzhiyun __u32 num_clips; 569*4882a593Smuzhiyun __u64 clips_ptr; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun 572*4882a593Smuzhiyun struct drm_mode_mode_cmd { 573*4882a593Smuzhiyun __u32 connector_id; 574*4882a593Smuzhiyun struct drm_mode_modeinfo mode; 575*4882a593Smuzhiyun }; 576*4882a593Smuzhiyun 577*4882a593Smuzhiyun #define DRM_MODE_CURSOR_BO 0x01 578*4882a593Smuzhiyun #define DRM_MODE_CURSOR_MOVE 0x02 579*4882a593Smuzhiyun #define DRM_MODE_CURSOR_FLAGS 0x03 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun /* 582*4882a593Smuzhiyun * depending on the value in flags different members are used. 583*4882a593Smuzhiyun * 584*4882a593Smuzhiyun * CURSOR_BO uses 585*4882a593Smuzhiyun * crtc_id 586*4882a593Smuzhiyun * width 587*4882a593Smuzhiyun * height 588*4882a593Smuzhiyun * handle - if 0 turns the cursor off 589*4882a593Smuzhiyun * 590*4882a593Smuzhiyun * CURSOR_MOVE uses 591*4882a593Smuzhiyun * crtc_id 592*4882a593Smuzhiyun * x 593*4882a593Smuzhiyun * y 594*4882a593Smuzhiyun */ 595*4882a593Smuzhiyun struct drm_mode_cursor { 596*4882a593Smuzhiyun __u32 flags; 597*4882a593Smuzhiyun __u32 crtc_id; 598*4882a593Smuzhiyun __s32 x; 599*4882a593Smuzhiyun __s32 y; 600*4882a593Smuzhiyun __u32 width; 601*4882a593Smuzhiyun __u32 height; 602*4882a593Smuzhiyun /* driver specific handle */ 603*4882a593Smuzhiyun __u32 handle; 604*4882a593Smuzhiyun }; 605*4882a593Smuzhiyun 606*4882a593Smuzhiyun struct drm_mode_cursor2 { 607*4882a593Smuzhiyun __u32 flags; 608*4882a593Smuzhiyun __u32 crtc_id; 609*4882a593Smuzhiyun __s32 x; 610*4882a593Smuzhiyun __s32 y; 611*4882a593Smuzhiyun __u32 width; 612*4882a593Smuzhiyun __u32 height; 613*4882a593Smuzhiyun /* driver specific handle */ 614*4882a593Smuzhiyun __u32 handle; 615*4882a593Smuzhiyun __s32 hot_x; 616*4882a593Smuzhiyun __s32 hot_y; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun struct drm_mode_crtc_lut { 620*4882a593Smuzhiyun __u32 crtc_id; 621*4882a593Smuzhiyun __u32 gamma_size; 622*4882a593Smuzhiyun 623*4882a593Smuzhiyun /* pointers to arrays */ 624*4882a593Smuzhiyun __u64 red; 625*4882a593Smuzhiyun __u64 green; 626*4882a593Smuzhiyun __u64 blue; 627*4882a593Smuzhiyun }; 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun struct drm_color_ctm { 630*4882a593Smuzhiyun /* 631*4882a593Smuzhiyun * Conversion matrix in S31.32 sign-magnitude 632*4882a593Smuzhiyun * (not two's complement!) format. 633*4882a593Smuzhiyun */ 634*4882a593Smuzhiyun __u64 matrix[9]; 635*4882a593Smuzhiyun }; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun struct drm_color_lut { 638*4882a593Smuzhiyun /* 639*4882a593Smuzhiyun * Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and 640*4882a593Smuzhiyun * 0xffff == 1.0. 641*4882a593Smuzhiyun */ 642*4882a593Smuzhiyun __u16 red; 643*4882a593Smuzhiyun __u16 green; 644*4882a593Smuzhiyun __u16 blue; 645*4882a593Smuzhiyun __u16 reserved; 646*4882a593Smuzhiyun }; 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun /** 649*4882a593Smuzhiyun * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data. 650*4882a593Smuzhiyun * 651*4882a593Smuzhiyun * HDR Metadata Infoframe as per CTA 861.G spec. This is expected 652*4882a593Smuzhiyun * to match exactly with the spec. 653*4882a593Smuzhiyun * 654*4882a593Smuzhiyun * Userspace is expected to pass the metadata information as per 655*4882a593Smuzhiyun * the format described in this structure. 656*4882a593Smuzhiyun */ 657*4882a593Smuzhiyun struct hdr_metadata_infoframe { 658*4882a593Smuzhiyun /** 659*4882a593Smuzhiyun * @eotf: Electro-Optical Transfer Function (EOTF) 660*4882a593Smuzhiyun * used in the stream. 661*4882a593Smuzhiyun */ 662*4882a593Smuzhiyun __u8 eotf; 663*4882a593Smuzhiyun /** 664*4882a593Smuzhiyun * @metadata_type: Static_Metadata_Descriptor_ID. 665*4882a593Smuzhiyun */ 666*4882a593Smuzhiyun __u8 metadata_type; 667*4882a593Smuzhiyun /** 668*4882a593Smuzhiyun * @display_primaries: Color Primaries of the Data. 669*4882a593Smuzhiyun * These are coded as unsigned 16-bit values in units of 670*4882a593Smuzhiyun * 0.00002, where 0x0000 represents zero and 0xC350 671*4882a593Smuzhiyun * represents 1.0000. 672*4882a593Smuzhiyun * @display_primaries.x: X cordinate of color primary. 673*4882a593Smuzhiyun * @display_primaries.y: Y cordinate of color primary. 674*4882a593Smuzhiyun */ 675*4882a593Smuzhiyun struct { 676*4882a593Smuzhiyun __u16 x, y; 677*4882a593Smuzhiyun } display_primaries[3]; 678*4882a593Smuzhiyun /** 679*4882a593Smuzhiyun * @white_point: White Point of Colorspace Data. 680*4882a593Smuzhiyun * These are coded as unsigned 16-bit values in units of 681*4882a593Smuzhiyun * 0.00002, where 0x0000 represents zero and 0xC350 682*4882a593Smuzhiyun * represents 1.0000. 683*4882a593Smuzhiyun * @white_point.x: X cordinate of whitepoint of color primary. 684*4882a593Smuzhiyun * @white_point.y: Y cordinate of whitepoint of color primary. 685*4882a593Smuzhiyun */ 686*4882a593Smuzhiyun struct { 687*4882a593Smuzhiyun __u16 x, y; 688*4882a593Smuzhiyun } white_point; 689*4882a593Smuzhiyun /** 690*4882a593Smuzhiyun * @max_display_mastering_luminance: Max Mastering Display Luminance. 691*4882a593Smuzhiyun * This value is coded as an unsigned 16-bit value in units of 1 cd/m2, 692*4882a593Smuzhiyun * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2. 693*4882a593Smuzhiyun */ 694*4882a593Smuzhiyun __u16 max_display_mastering_luminance; 695*4882a593Smuzhiyun /** 696*4882a593Smuzhiyun * @min_display_mastering_luminance: Min Mastering Display Luminance. 697*4882a593Smuzhiyun * This value is coded as an unsigned 16-bit value in units of 698*4882a593Smuzhiyun * 0.0001 cd/m2, where 0x0001 represents 0.0001 cd/m2 and 0xFFFF 699*4882a593Smuzhiyun * represents 6.5535 cd/m2. 700*4882a593Smuzhiyun */ 701*4882a593Smuzhiyun __u16 min_display_mastering_luminance; 702*4882a593Smuzhiyun /** 703*4882a593Smuzhiyun * @max_cll: Max Content Light Level. 704*4882a593Smuzhiyun * This value is coded as an unsigned 16-bit value in units of 1 cd/m2, 705*4882a593Smuzhiyun * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2. 706*4882a593Smuzhiyun */ 707*4882a593Smuzhiyun __u16 max_cll; 708*4882a593Smuzhiyun /** 709*4882a593Smuzhiyun * @max_fall: Max Frame Average Light Level. 710*4882a593Smuzhiyun * This value is coded as an unsigned 16-bit value in units of 1 cd/m2, 711*4882a593Smuzhiyun * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2. 712*4882a593Smuzhiyun */ 713*4882a593Smuzhiyun __u16 max_fall; 714*4882a593Smuzhiyun }; 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun /** 717*4882a593Smuzhiyun * struct hdr_output_metadata - HDR output metadata 718*4882a593Smuzhiyun * 719*4882a593Smuzhiyun * Metadata Information to be passed from userspace 720*4882a593Smuzhiyun */ 721*4882a593Smuzhiyun struct hdr_output_metadata { 722*4882a593Smuzhiyun /** 723*4882a593Smuzhiyun * @metadata_type: Static_Metadata_Descriptor_ID. 724*4882a593Smuzhiyun */ 725*4882a593Smuzhiyun __u32 metadata_type; 726*4882a593Smuzhiyun /** 727*4882a593Smuzhiyun * @hdmi_metadata_type1: HDR Metadata Infoframe. 728*4882a593Smuzhiyun */ 729*4882a593Smuzhiyun union { 730*4882a593Smuzhiyun struct hdr_metadata_infoframe hdmi_metadata_type1; 731*4882a593Smuzhiyun }; 732*4882a593Smuzhiyun }; 733*4882a593Smuzhiyun 734*4882a593Smuzhiyun #define DRM_MODE_PAGE_FLIP_EVENT 0x01 735*4882a593Smuzhiyun #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 736*4882a593Smuzhiyun #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 737*4882a593Smuzhiyun #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 738*4882a593Smuzhiyun #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \ 739*4882a593Smuzhiyun DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 740*4882a593Smuzhiyun #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \ 741*4882a593Smuzhiyun DRM_MODE_PAGE_FLIP_ASYNC | \ 742*4882a593Smuzhiyun DRM_MODE_PAGE_FLIP_TARGET) 743*4882a593Smuzhiyun 744*4882a593Smuzhiyun /* 745*4882a593Smuzhiyun * Request a page flip on the specified crtc. 746*4882a593Smuzhiyun * 747*4882a593Smuzhiyun * This ioctl will ask KMS to schedule a page flip for the specified 748*4882a593Smuzhiyun * crtc. Once any pending rendering targeting the specified fb (as of 749*4882a593Smuzhiyun * ioctl time) has completed, the crtc will be reprogrammed to display 750*4882a593Smuzhiyun * that fb after the next vertical refresh. The ioctl returns 751*4882a593Smuzhiyun * immediately, but subsequent rendering to the current fb will block 752*4882a593Smuzhiyun * in the execbuffer ioctl until the page flip happens. If a page 753*4882a593Smuzhiyun * flip is already pending as the ioctl is called, EBUSY will be 754*4882a593Smuzhiyun * returned. 755*4882a593Smuzhiyun * 756*4882a593Smuzhiyun * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank 757*4882a593Smuzhiyun * event (see drm.h: struct drm_event_vblank) when the page flip is 758*4882a593Smuzhiyun * done. The user_data field passed in with this ioctl will be 759*4882a593Smuzhiyun * returned as the user_data field in the vblank event struct. 760*4882a593Smuzhiyun * 761*4882a593Smuzhiyun * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen 762*4882a593Smuzhiyun * 'as soon as possible', meaning that it not delay waiting for vblank. 763*4882a593Smuzhiyun * This may cause tearing on the screen. 764*4882a593Smuzhiyun * 765*4882a593Smuzhiyun * The reserved field must be zero. 766*4882a593Smuzhiyun */ 767*4882a593Smuzhiyun 768*4882a593Smuzhiyun struct drm_mode_crtc_page_flip { 769*4882a593Smuzhiyun __u32 crtc_id; 770*4882a593Smuzhiyun __u32 fb_id; 771*4882a593Smuzhiyun __u32 flags; 772*4882a593Smuzhiyun __u32 reserved; 773*4882a593Smuzhiyun __u64 user_data; 774*4882a593Smuzhiyun }; 775*4882a593Smuzhiyun 776*4882a593Smuzhiyun /* 777*4882a593Smuzhiyun * Request a page flip on the specified crtc. 778*4882a593Smuzhiyun * 779*4882a593Smuzhiyun * Same as struct drm_mode_crtc_page_flip, but supports new flags and 780*4882a593Smuzhiyun * re-purposes the reserved field: 781*4882a593Smuzhiyun * 782*4882a593Smuzhiyun * The sequence field must be zero unless either of the 783*4882a593Smuzhiyun * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When 784*4882a593Smuzhiyun * the ABSOLUTE flag is specified, the sequence field denotes the absolute 785*4882a593Smuzhiyun * vblank sequence when the flip should take effect. When the RELATIVE 786*4882a593Smuzhiyun * flag is specified, the sequence field denotes the relative (to the 787*4882a593Smuzhiyun * current one when the ioctl is called) vblank sequence when the flip 788*4882a593Smuzhiyun * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to 789*4882a593Smuzhiyun * make sure the vblank sequence before the target one has passed before 790*4882a593Smuzhiyun * calling this ioctl. The purpose of the 791*4882a593Smuzhiyun * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify 792*4882a593Smuzhiyun * the target for when code dealing with a page flip runs during a 793*4882a593Smuzhiyun * vertical blank period. 794*4882a593Smuzhiyun */ 795*4882a593Smuzhiyun 796*4882a593Smuzhiyun struct drm_mode_crtc_page_flip_target { 797*4882a593Smuzhiyun __u32 crtc_id; 798*4882a593Smuzhiyun __u32 fb_id; 799*4882a593Smuzhiyun __u32 flags; 800*4882a593Smuzhiyun __u32 sequence; 801*4882a593Smuzhiyun __u64 user_data; 802*4882a593Smuzhiyun }; 803*4882a593Smuzhiyun 804*4882a593Smuzhiyun /* create a dumb scanout buffer */ 805*4882a593Smuzhiyun struct drm_mode_create_dumb { 806*4882a593Smuzhiyun __u32 height; 807*4882a593Smuzhiyun __u32 width; 808*4882a593Smuzhiyun __u32 bpp; 809*4882a593Smuzhiyun __u32 flags; 810*4882a593Smuzhiyun /* handle, pitch, size will be returned */ 811*4882a593Smuzhiyun __u32 handle; 812*4882a593Smuzhiyun __u32 pitch; 813*4882a593Smuzhiyun __u64 size; 814*4882a593Smuzhiyun }; 815*4882a593Smuzhiyun 816*4882a593Smuzhiyun /* set up for mmap of a dumb scanout buffer */ 817*4882a593Smuzhiyun struct drm_mode_map_dumb { 818*4882a593Smuzhiyun /** Handle for the object being mapped. */ 819*4882a593Smuzhiyun __u32 handle; 820*4882a593Smuzhiyun __u32 pad; 821*4882a593Smuzhiyun /** 822*4882a593Smuzhiyun * Fake offset to use for subsequent mmap call 823*4882a593Smuzhiyun * 824*4882a593Smuzhiyun * This is a fixed-size type for 32/64 compatibility. 825*4882a593Smuzhiyun */ 826*4882a593Smuzhiyun __u64 offset; 827*4882a593Smuzhiyun }; 828*4882a593Smuzhiyun 829*4882a593Smuzhiyun struct drm_mode_destroy_dumb { 830*4882a593Smuzhiyun __u32 handle; 831*4882a593Smuzhiyun }; 832*4882a593Smuzhiyun 833*4882a593Smuzhiyun /* page-flip flags are valid, plus: */ 834*4882a593Smuzhiyun #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 835*4882a593Smuzhiyun #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 836*4882a593Smuzhiyun #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 837*4882a593Smuzhiyun 838*4882a593Smuzhiyun #define DRM_MODE_ATOMIC_FLAGS (\ 839*4882a593Smuzhiyun DRM_MODE_PAGE_FLIP_EVENT |\ 840*4882a593Smuzhiyun DRM_MODE_PAGE_FLIP_ASYNC |\ 841*4882a593Smuzhiyun DRM_MODE_ATOMIC_TEST_ONLY |\ 842*4882a593Smuzhiyun DRM_MODE_ATOMIC_NONBLOCK |\ 843*4882a593Smuzhiyun DRM_MODE_ATOMIC_ALLOW_MODESET) 844*4882a593Smuzhiyun 845*4882a593Smuzhiyun struct drm_mode_atomic { 846*4882a593Smuzhiyun __u32 flags; 847*4882a593Smuzhiyun __u32 count_objs; 848*4882a593Smuzhiyun __u64 objs_ptr; 849*4882a593Smuzhiyun __u64 count_props_ptr; 850*4882a593Smuzhiyun __u64 props_ptr; 851*4882a593Smuzhiyun __u64 prop_values_ptr; 852*4882a593Smuzhiyun __u64 reserved; 853*4882a593Smuzhiyun __u64 user_data; 854*4882a593Smuzhiyun }; 855*4882a593Smuzhiyun 856*4882a593Smuzhiyun struct drm_format_modifier_blob { 857*4882a593Smuzhiyun #define FORMAT_BLOB_CURRENT 1 858*4882a593Smuzhiyun /* Version of this blob format */ 859*4882a593Smuzhiyun __u32 version; 860*4882a593Smuzhiyun 861*4882a593Smuzhiyun /* Flags */ 862*4882a593Smuzhiyun __u32 flags; 863*4882a593Smuzhiyun 864*4882a593Smuzhiyun /* Number of fourcc formats supported */ 865*4882a593Smuzhiyun __u32 count_formats; 866*4882a593Smuzhiyun 867*4882a593Smuzhiyun /* Where in this blob the formats exist (in bytes) */ 868*4882a593Smuzhiyun __u32 formats_offset; 869*4882a593Smuzhiyun 870*4882a593Smuzhiyun /* Number of drm_format_modifiers */ 871*4882a593Smuzhiyun __u32 count_modifiers; 872*4882a593Smuzhiyun 873*4882a593Smuzhiyun /* Where in this blob the modifiers exist (in bytes) */ 874*4882a593Smuzhiyun __u32 modifiers_offset; 875*4882a593Smuzhiyun 876*4882a593Smuzhiyun /* __u32 formats[] */ 877*4882a593Smuzhiyun /* struct drm_format_modifier modifiers[] */ 878*4882a593Smuzhiyun }; 879*4882a593Smuzhiyun 880*4882a593Smuzhiyun struct drm_format_modifier { 881*4882a593Smuzhiyun /* Bitmask of formats in get_plane format list this info applies to. The 882*4882a593Smuzhiyun * offset allows a sliding window of which 64 formats (bits). 883*4882a593Smuzhiyun * 884*4882a593Smuzhiyun * Some examples: 885*4882a593Smuzhiyun * In today's world with < 65 formats, and formats 0, and 2 are 886*4882a593Smuzhiyun * supported 887*4882a593Smuzhiyun * 0x0000000000000005 888*4882a593Smuzhiyun * ^-offset = 0, formats = 5 889*4882a593Smuzhiyun * 890*4882a593Smuzhiyun * If the number formats grew to 128, and formats 98-102 are 891*4882a593Smuzhiyun * supported with the modifier: 892*4882a593Smuzhiyun * 893*4882a593Smuzhiyun * 0x0000007c00000000 0000000000000000 894*4882a593Smuzhiyun * ^ 895*4882a593Smuzhiyun * |__offset = 64, formats = 0x7c00000000 896*4882a593Smuzhiyun * 897*4882a593Smuzhiyun */ 898*4882a593Smuzhiyun __u64 formats; 899*4882a593Smuzhiyun __u32 offset; 900*4882a593Smuzhiyun __u32 pad; 901*4882a593Smuzhiyun 902*4882a593Smuzhiyun /* The modifier that applies to the >get_plane format list bitmask. */ 903*4882a593Smuzhiyun __u64 modifier; 904*4882a593Smuzhiyun }; 905*4882a593Smuzhiyun 906*4882a593Smuzhiyun /** 907*4882a593Smuzhiyun * struct drm_mode_create_blob - Create New block property 908*4882a593Smuzhiyun * @data: Pointer to data to copy. 909*4882a593Smuzhiyun * @length: Length of data to copy. 910*4882a593Smuzhiyun * @blob_id: new property ID. 911*4882a593Smuzhiyun * Create a new 'blob' data property, copying length bytes from data pointer, 912*4882a593Smuzhiyun * and returning new blob ID. 913*4882a593Smuzhiyun */ 914*4882a593Smuzhiyun struct drm_mode_create_blob { 915*4882a593Smuzhiyun /** Pointer to data to copy. */ 916*4882a593Smuzhiyun __u64 data; 917*4882a593Smuzhiyun /** Length of data to copy. */ 918*4882a593Smuzhiyun __u32 length; 919*4882a593Smuzhiyun /** Return: new property ID. */ 920*4882a593Smuzhiyun __u32 blob_id; 921*4882a593Smuzhiyun }; 922*4882a593Smuzhiyun 923*4882a593Smuzhiyun /** 924*4882a593Smuzhiyun * struct drm_mode_destroy_blob - Destroy user blob 925*4882a593Smuzhiyun * @blob_id: blob_id to destroy 926*4882a593Smuzhiyun * Destroy a user-created blob property. 927*4882a593Smuzhiyun */ 928*4882a593Smuzhiyun struct drm_mode_destroy_blob { 929*4882a593Smuzhiyun __u32 blob_id; 930*4882a593Smuzhiyun }; 931*4882a593Smuzhiyun 932*4882a593Smuzhiyun /** 933*4882a593Smuzhiyun * struct drm_mode_create_lease - Create lease 934*4882a593Smuzhiyun * @object_ids: Pointer to array of object ids. 935*4882a593Smuzhiyun * @object_count: Number of object ids. 936*4882a593Smuzhiyun * @flags: flags for new FD. 937*4882a593Smuzhiyun * @lessee_id: unique identifier for lessee. 938*4882a593Smuzhiyun * @fd: file descriptor to new drm_master file. 939*4882a593Smuzhiyun * Lease mode resources, creating another drm_master. 940*4882a593Smuzhiyun */ 941*4882a593Smuzhiyun struct drm_mode_create_lease { 942*4882a593Smuzhiyun /** Pointer to array of object ids (__u32) */ 943*4882a593Smuzhiyun __u64 object_ids; 944*4882a593Smuzhiyun /** Number of object ids */ 945*4882a593Smuzhiyun __u32 object_count; 946*4882a593Smuzhiyun /** flags for new FD (O_CLOEXEC, etc) */ 947*4882a593Smuzhiyun __u32 flags; 948*4882a593Smuzhiyun 949*4882a593Smuzhiyun /** Return: unique identifier for lessee. */ 950*4882a593Smuzhiyun __u32 lessee_id; 951*4882a593Smuzhiyun /** Return: file descriptor to new drm_master file */ 952*4882a593Smuzhiyun __u32 fd; 953*4882a593Smuzhiyun }; 954*4882a593Smuzhiyun 955*4882a593Smuzhiyun /** 956*4882a593Smuzhiyun * struct drm_mode_list_lessees - List lessees 957*4882a593Smuzhiyun * @count_lessees: Number of lessees. 958*4882a593Smuzhiyun * @pad: pad. 959*4882a593Smuzhiyun * @lessees_ptr: Pointer to lessess. 960*4882a593Smuzhiyun * List lesses from a drm_master 961*4882a593Smuzhiyun */ 962*4882a593Smuzhiyun struct drm_mode_list_lessees { 963*4882a593Smuzhiyun /** Number of lessees. 964*4882a593Smuzhiyun * On input, provides length of the array. 965*4882a593Smuzhiyun * On output, provides total number. No 966*4882a593Smuzhiyun * more than the input number will be written 967*4882a593Smuzhiyun * back, so two calls can be used to get 968*4882a593Smuzhiyun * the size and then the data. 969*4882a593Smuzhiyun */ 970*4882a593Smuzhiyun __u32 count_lessees; 971*4882a593Smuzhiyun __u32 pad; 972*4882a593Smuzhiyun 973*4882a593Smuzhiyun /** Pointer to lessees. 974*4882a593Smuzhiyun * pointer to __u64 array of lessee ids 975*4882a593Smuzhiyun */ 976*4882a593Smuzhiyun __u64 lessees_ptr; 977*4882a593Smuzhiyun }; 978*4882a593Smuzhiyun 979*4882a593Smuzhiyun /** 980*4882a593Smuzhiyun * struct drm_mode_get_lease - Get Lease 981*4882a593Smuzhiyun * @count_objects: Number of leased objects. 982*4882a593Smuzhiyun * @pad: pad. 983*4882a593Smuzhiyun * @objects_ptr: Pointer to objects. 984*4882a593Smuzhiyun * Get leased objects 985*4882a593Smuzhiyun */ 986*4882a593Smuzhiyun struct drm_mode_get_lease { 987*4882a593Smuzhiyun /** Number of leased objects. 988*4882a593Smuzhiyun * On input, provides length of the array. 989*4882a593Smuzhiyun * On output, provides total number. No 990*4882a593Smuzhiyun * more than the input number will be written 991*4882a593Smuzhiyun * back, so two calls can be used to get 992*4882a593Smuzhiyun * the size and then the data. 993*4882a593Smuzhiyun */ 994*4882a593Smuzhiyun __u32 count_objects; 995*4882a593Smuzhiyun __u32 pad; 996*4882a593Smuzhiyun 997*4882a593Smuzhiyun /** Pointer to objects. 998*4882a593Smuzhiyun * pointer to __u32 array of object ids 999*4882a593Smuzhiyun */ 1000*4882a593Smuzhiyun __u64 objects_ptr; 1001*4882a593Smuzhiyun }; 1002*4882a593Smuzhiyun 1003*4882a593Smuzhiyun /** 1004*4882a593Smuzhiyun * struct drm_mode_revoke_lease - Revoke lease 1005*4882a593Smuzhiyun * @lessee_id: Unique ID of lessee. 1006*4882a593Smuzhiyun * Revoke lease 1007*4882a593Smuzhiyun */ 1008*4882a593Smuzhiyun struct drm_mode_revoke_lease { 1009*4882a593Smuzhiyun /** Unique ID of lessee 1010*4882a593Smuzhiyun */ 1011*4882a593Smuzhiyun __u32 lessee_id; 1012*4882a593Smuzhiyun }; 1013*4882a593Smuzhiyun 1014*4882a593Smuzhiyun /** 1015*4882a593Smuzhiyun * struct drm_mode_rect - Two dimensional rectangle. 1016*4882a593Smuzhiyun * @x1: Horizontal starting coordinate (inclusive). 1017*4882a593Smuzhiyun * @y1: Vertical starting coordinate (inclusive). 1018*4882a593Smuzhiyun * @x2: Horizontal ending coordinate (exclusive). 1019*4882a593Smuzhiyun * @y2: Vertical ending coordinate (exclusive). 1020*4882a593Smuzhiyun * 1021*4882a593Smuzhiyun * With drm subsystem using struct drm_rect to manage rectangular area this 1022*4882a593Smuzhiyun * export it to user-space. 1023*4882a593Smuzhiyun * 1024*4882a593Smuzhiyun * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS. 1025*4882a593Smuzhiyun */ 1026*4882a593Smuzhiyun struct drm_mode_rect { 1027*4882a593Smuzhiyun __s32 x1; 1028*4882a593Smuzhiyun __s32 y1; 1029*4882a593Smuzhiyun __s32 x2; 1030*4882a593Smuzhiyun __s32 y2; 1031*4882a593Smuzhiyun }; 1032*4882a593Smuzhiyun 1033*4882a593Smuzhiyun #if defined(__cplusplus) 1034*4882a593Smuzhiyun } 1035*4882a593Smuzhiyun #endif 1036*4882a593Smuzhiyun 1037*4882a593Smuzhiyun #endif 1038