1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2017 Oracle. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun /* 7*4882a593Smuzhiyun * enum ib_event_type, from include/rdma/ib_verbs.h 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #define IB_EVENT_LIST \ 10*4882a593Smuzhiyun ib_event(CQ_ERR) \ 11*4882a593Smuzhiyun ib_event(QP_FATAL) \ 12*4882a593Smuzhiyun ib_event(QP_REQ_ERR) \ 13*4882a593Smuzhiyun ib_event(QP_ACCESS_ERR) \ 14*4882a593Smuzhiyun ib_event(COMM_EST) \ 15*4882a593Smuzhiyun ib_event(SQ_DRAINED) \ 16*4882a593Smuzhiyun ib_event(PATH_MIG) \ 17*4882a593Smuzhiyun ib_event(PATH_MIG_ERR) \ 18*4882a593Smuzhiyun ib_event(DEVICE_FATAL) \ 19*4882a593Smuzhiyun ib_event(PORT_ACTIVE) \ 20*4882a593Smuzhiyun ib_event(PORT_ERR) \ 21*4882a593Smuzhiyun ib_event(LID_CHANGE) \ 22*4882a593Smuzhiyun ib_event(PKEY_CHANGE) \ 23*4882a593Smuzhiyun ib_event(SM_CHANGE) \ 24*4882a593Smuzhiyun ib_event(SRQ_ERR) \ 25*4882a593Smuzhiyun ib_event(SRQ_LIMIT_REACHED) \ 26*4882a593Smuzhiyun ib_event(QP_LAST_WQE_REACHED) \ 27*4882a593Smuzhiyun ib_event(CLIENT_REREGISTER) \ 28*4882a593Smuzhiyun ib_event(GID_CHANGE) \ 29*4882a593Smuzhiyun ib_event_end(WQ_FATAL) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #undef ib_event 32*4882a593Smuzhiyun #undef ib_event_end 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define ib_event(x) TRACE_DEFINE_ENUM(IB_EVENT_##x); 35*4882a593Smuzhiyun #define ib_event_end(x) TRACE_DEFINE_ENUM(IB_EVENT_##x); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun IB_EVENT_LIST 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #undef ib_event 40*4882a593Smuzhiyun #undef ib_event_end 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define ib_event(x) { IB_EVENT_##x, #x }, 43*4882a593Smuzhiyun #define ib_event_end(x) { IB_EVENT_##x, #x } 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define rdma_show_ib_event(x) \ 46*4882a593Smuzhiyun __print_symbolic(x, IB_EVENT_LIST) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* 49*4882a593Smuzhiyun * enum ib_wc_status type, from include/rdma/ib_verbs.h 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun #define IB_WC_STATUS_LIST \ 52*4882a593Smuzhiyun ib_wc_status(SUCCESS) \ 53*4882a593Smuzhiyun ib_wc_status(LOC_LEN_ERR) \ 54*4882a593Smuzhiyun ib_wc_status(LOC_QP_OP_ERR) \ 55*4882a593Smuzhiyun ib_wc_status(LOC_EEC_OP_ERR) \ 56*4882a593Smuzhiyun ib_wc_status(LOC_PROT_ERR) \ 57*4882a593Smuzhiyun ib_wc_status(WR_FLUSH_ERR) \ 58*4882a593Smuzhiyun ib_wc_status(MW_BIND_ERR) \ 59*4882a593Smuzhiyun ib_wc_status(BAD_RESP_ERR) \ 60*4882a593Smuzhiyun ib_wc_status(LOC_ACCESS_ERR) \ 61*4882a593Smuzhiyun ib_wc_status(REM_INV_REQ_ERR) \ 62*4882a593Smuzhiyun ib_wc_status(REM_ACCESS_ERR) \ 63*4882a593Smuzhiyun ib_wc_status(REM_OP_ERR) \ 64*4882a593Smuzhiyun ib_wc_status(RETRY_EXC_ERR) \ 65*4882a593Smuzhiyun ib_wc_status(RNR_RETRY_EXC_ERR) \ 66*4882a593Smuzhiyun ib_wc_status(LOC_RDD_VIOL_ERR) \ 67*4882a593Smuzhiyun ib_wc_status(REM_INV_RD_REQ_ERR) \ 68*4882a593Smuzhiyun ib_wc_status(REM_ABORT_ERR) \ 69*4882a593Smuzhiyun ib_wc_status(INV_EECN_ERR) \ 70*4882a593Smuzhiyun ib_wc_status(INV_EEC_STATE_ERR) \ 71*4882a593Smuzhiyun ib_wc_status(FATAL_ERR) \ 72*4882a593Smuzhiyun ib_wc_status(RESP_TIMEOUT_ERR) \ 73*4882a593Smuzhiyun ib_wc_status_end(GENERAL_ERR) 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #undef ib_wc_status 76*4882a593Smuzhiyun #undef ib_wc_status_end 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define ib_wc_status(x) TRACE_DEFINE_ENUM(IB_WC_##x); 79*4882a593Smuzhiyun #define ib_wc_status_end(x) TRACE_DEFINE_ENUM(IB_WC_##x); 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun IB_WC_STATUS_LIST 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #undef ib_wc_status 84*4882a593Smuzhiyun #undef ib_wc_status_end 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define ib_wc_status(x) { IB_WC_##x, #x }, 87*4882a593Smuzhiyun #define ib_wc_status_end(x) { IB_WC_##x, #x } 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define rdma_show_wc_status(x) \ 90*4882a593Smuzhiyun __print_symbolic(x, IB_WC_STATUS_LIST) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* 93*4882a593Smuzhiyun * enum ib_cm_event_type, from include/rdma/ib_cm.h 94*4882a593Smuzhiyun */ 95*4882a593Smuzhiyun #define IB_CM_EVENT_LIST \ 96*4882a593Smuzhiyun ib_cm_event(REQ_ERROR) \ 97*4882a593Smuzhiyun ib_cm_event(REQ_RECEIVED) \ 98*4882a593Smuzhiyun ib_cm_event(REP_ERROR) \ 99*4882a593Smuzhiyun ib_cm_event(REP_RECEIVED) \ 100*4882a593Smuzhiyun ib_cm_event(RTU_RECEIVED) \ 101*4882a593Smuzhiyun ib_cm_event(USER_ESTABLISHED) \ 102*4882a593Smuzhiyun ib_cm_event(DREQ_ERROR) \ 103*4882a593Smuzhiyun ib_cm_event(DREQ_RECEIVED) \ 104*4882a593Smuzhiyun ib_cm_event(DREP_RECEIVED) \ 105*4882a593Smuzhiyun ib_cm_event(TIMEWAIT_EXIT) \ 106*4882a593Smuzhiyun ib_cm_event(MRA_RECEIVED) \ 107*4882a593Smuzhiyun ib_cm_event(REJ_RECEIVED) \ 108*4882a593Smuzhiyun ib_cm_event(LAP_ERROR) \ 109*4882a593Smuzhiyun ib_cm_event(LAP_RECEIVED) \ 110*4882a593Smuzhiyun ib_cm_event(APR_RECEIVED) \ 111*4882a593Smuzhiyun ib_cm_event(SIDR_REQ_ERROR) \ 112*4882a593Smuzhiyun ib_cm_event(SIDR_REQ_RECEIVED) \ 113*4882a593Smuzhiyun ib_cm_event_end(SIDR_REP_RECEIVED) 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #undef ib_cm_event 116*4882a593Smuzhiyun #undef ib_cm_event_end 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #define ib_cm_event(x) TRACE_DEFINE_ENUM(IB_CM_##x); 119*4882a593Smuzhiyun #define ib_cm_event_end(x) TRACE_DEFINE_ENUM(IB_CM_##x); 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun IB_CM_EVENT_LIST 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #undef ib_cm_event 124*4882a593Smuzhiyun #undef ib_cm_event_end 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #define ib_cm_event(x) { IB_CM_##x, #x }, 127*4882a593Smuzhiyun #define ib_cm_event_end(x) { IB_CM_##x, #x } 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #define rdma_show_ib_cm_event(x) \ 130*4882a593Smuzhiyun __print_symbolic(x, IB_CM_EVENT_LIST) 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* 133*4882a593Smuzhiyun * enum rdma_cm_event_type, from include/rdma/rdma_cm.h 134*4882a593Smuzhiyun */ 135*4882a593Smuzhiyun #define RDMA_CM_EVENT_LIST \ 136*4882a593Smuzhiyun rdma_cm_event(ADDR_RESOLVED) \ 137*4882a593Smuzhiyun rdma_cm_event(ADDR_ERROR) \ 138*4882a593Smuzhiyun rdma_cm_event(ROUTE_RESOLVED) \ 139*4882a593Smuzhiyun rdma_cm_event(ROUTE_ERROR) \ 140*4882a593Smuzhiyun rdma_cm_event(CONNECT_REQUEST) \ 141*4882a593Smuzhiyun rdma_cm_event(CONNECT_RESPONSE) \ 142*4882a593Smuzhiyun rdma_cm_event(CONNECT_ERROR) \ 143*4882a593Smuzhiyun rdma_cm_event(UNREACHABLE) \ 144*4882a593Smuzhiyun rdma_cm_event(REJECTED) \ 145*4882a593Smuzhiyun rdma_cm_event(ESTABLISHED) \ 146*4882a593Smuzhiyun rdma_cm_event(DISCONNECTED) \ 147*4882a593Smuzhiyun rdma_cm_event(DEVICE_REMOVAL) \ 148*4882a593Smuzhiyun rdma_cm_event(MULTICAST_JOIN) \ 149*4882a593Smuzhiyun rdma_cm_event(MULTICAST_ERROR) \ 150*4882a593Smuzhiyun rdma_cm_event(ADDR_CHANGE) \ 151*4882a593Smuzhiyun rdma_cm_event_end(TIMEWAIT_EXIT) 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun #undef rdma_cm_event 154*4882a593Smuzhiyun #undef rdma_cm_event_end 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define rdma_cm_event(x) TRACE_DEFINE_ENUM(RDMA_CM_EVENT_##x); 157*4882a593Smuzhiyun #define rdma_cm_event_end(x) TRACE_DEFINE_ENUM(RDMA_CM_EVENT_##x); 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun RDMA_CM_EVENT_LIST 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #undef rdma_cm_event 162*4882a593Smuzhiyun #undef rdma_cm_event_end 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun #define rdma_cm_event(x) { RDMA_CM_EVENT_##x, #x }, 165*4882a593Smuzhiyun #define rdma_cm_event_end(x) { RDMA_CM_EVENT_##x, #x } 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun #define rdma_show_cm_event(x) \ 168*4882a593Smuzhiyun __print_symbolic(x, RDMA_CM_EVENT_LIST) 169