1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * tlv320aic32x4.h -- TLV320AIC32X4 Soc Audio driver platform data 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2011 Vista Silicon S.L. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Javier Martin <javier.martin@vista-silicon.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _AIC32X4_PDATA_H 11*4882a593Smuzhiyun #define _AIC32X4_PDATA_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define AIC32X4_PWR_MICBIAS_2075_LDOIN 0x00000001 14*4882a593Smuzhiyun #define AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE 0x00000002 15*4882a593Smuzhiyun #define AIC32X4_PWR_AIC32X4_LDO_ENABLE 0x00000004 16*4882a593Smuzhiyun #define AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 0x00000008 17*4882a593Smuzhiyun #define AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED 0x00000010 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K 0x00000001 20*4882a593Smuzhiyun #define AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K 0x00000002 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* GPIO API */ 23*4882a593Smuzhiyun #define AIC32X4_MFPX_DEFAULT_VALUE 0xff 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define AIC32X4_MFP1_DIN_DISABLED 0 26*4882a593Smuzhiyun #define AIC32X4_MFP1_DIN_ENABLED 0x2 27*4882a593Smuzhiyun #define AIC32X4_MFP1_GPIO_IN 0x4 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define AIC32X4_MFP2_GPIO_OUT_LOW 0x0 30*4882a593Smuzhiyun #define AIC32X4_MFP2_GPIO_OUT_HIGH 0x1 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define AIC32X4_MFP_GPIO_ENABLED 0x4 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define AIC32X4_MFP5_GPIO_DISABLED 0x0 35*4882a593Smuzhiyun #define AIC32X4_MFP5_GPIO_INPUT 0x8 36*4882a593Smuzhiyun #define AIC32X4_MFP5_GPIO_OUTPUT 0xc 37*4882a593Smuzhiyun #define AIC32X4_MFP5_GPIO_OUT_LOW 0x0 38*4882a593Smuzhiyun #define AIC32X4_MFP5_GPIO_OUT_HIGH 0x1 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun struct aic32x4_setup_data { 41*4882a593Smuzhiyun unsigned int gpio_func[5]; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct aic32x4_pdata { 45*4882a593Smuzhiyun struct aic32x4_setup_data *setup; 46*4882a593Smuzhiyun u32 power_cfg; 47*4882a593Smuzhiyun u32 micpga_routing; 48*4882a593Smuzhiyun bool swapdacs; 49*4882a593Smuzhiyun int rstn_gpio; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #endif 53