xref: /OK3568_Linux_fs/kernel/include/sound/sb.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun #ifndef __SOUND_SB_H
3*4882a593Smuzhiyun #define __SOUND_SB_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun /*
6*4882a593Smuzhiyun  *  Header file for SoundBlaster cards
7*4882a593Smuzhiyun  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <sound/pcm.h>
11*4882a593Smuzhiyun #include <sound/rawmidi.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun enum sb_hw_type {
16*4882a593Smuzhiyun 	SB_HW_AUTO,
17*4882a593Smuzhiyun 	SB_HW_10,
18*4882a593Smuzhiyun 	SB_HW_20,
19*4882a593Smuzhiyun 	SB_HW_201,
20*4882a593Smuzhiyun 	SB_HW_PRO,
21*4882a593Smuzhiyun 	SB_HW_JAZZ16,		/* Media Vision Jazz16 */
22*4882a593Smuzhiyun 	SB_HW_16,
23*4882a593Smuzhiyun 	SB_HW_16CSP,		/* SB16 with CSP chip */
24*4882a593Smuzhiyun 	SB_HW_ALS100,		/* Avance Logic ALS100 chip */
25*4882a593Smuzhiyun 	SB_HW_ALS4000,		/* Avance Logic ALS4000 chip */
26*4882a593Smuzhiyun 	SB_HW_DT019X,		/* Diamond Tech. DT-019X / Avance Logic ALS-007 */
27*4882a593Smuzhiyun 	SB_HW_CS5530,		/* Cyrix/NatSemi 5530 VSA1 */
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define SB_OPEN_PCM			0x01
31*4882a593Smuzhiyun #define SB_OPEN_MIDI_INPUT		0x02
32*4882a593Smuzhiyun #define SB_OPEN_MIDI_OUTPUT		0x04
33*4882a593Smuzhiyun #define SB_OPEN_MIDI_INPUT_TRIGGER	0x08
34*4882a593Smuzhiyun #define SB_OPEN_MIDI_OUTPUT_TRIGGER	0x10
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define SB_MODE_HALT		0x00
37*4882a593Smuzhiyun #define SB_MODE_PLAYBACK_8	0x01
38*4882a593Smuzhiyun #define SB_MODE_PLAYBACK_16	0x02
39*4882a593Smuzhiyun #define SB_MODE_PLAYBACK	(SB_MODE_PLAYBACK_8 | SB_MODE_PLAYBACK_16)
40*4882a593Smuzhiyun #define SB_MODE_CAPTURE_8	0x04
41*4882a593Smuzhiyun #define SB_MODE_CAPTURE_16	0x08
42*4882a593Smuzhiyun #define SB_MODE_CAPTURE		(SB_MODE_CAPTURE_8 | SB_MODE_CAPTURE_16)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define SB_RATE_LOCK_PLAYBACK	0x10
45*4882a593Smuzhiyun #define SB_RATE_LOCK_CAPTURE	0x20
46*4882a593Smuzhiyun #define SB_RATE_LOCK		(SB_RATE_LOCK_PLAYBACK | SB_RATE_LOCK_CAPTURE)
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define SB_MPU_INPUT		1
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct snd_sb {
51*4882a593Smuzhiyun 	unsigned long port;		/* base port of DSP chip */
52*4882a593Smuzhiyun 	struct resource *res_port;
53*4882a593Smuzhiyun 	unsigned long mpu_port;		/* MPU port for SB DSP 4.0+ */
54*4882a593Smuzhiyun 	int irq;			/* IRQ number of DSP chip */
55*4882a593Smuzhiyun 	int dma8;			/* 8-bit DMA */
56*4882a593Smuzhiyun 	int dma16;			/* 16-bit DMA */
57*4882a593Smuzhiyun 	unsigned short version;		/* version of DSP chip */
58*4882a593Smuzhiyun 	enum sb_hw_type hardware;	/* see to SB_HW_XXXX */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	unsigned long alt_port;		/* alternate port (ALS4000) */
61*4882a593Smuzhiyun 	struct pci_dev *pci;		/* ALS4000 */
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	unsigned int open;		/* see to SB_OPEN_XXXX for sb8 */
64*4882a593Smuzhiyun 					/* also SNDRV_SB_CSP_MODE_XXX for sb16_csp */
65*4882a593Smuzhiyun 	unsigned int mode;		/* current mode of stream */
66*4882a593Smuzhiyun 	unsigned int force_mode16;	/* force 16-bit mode of streams */
67*4882a593Smuzhiyun 	unsigned int locked_rate;	/* sb16 duplex */
68*4882a593Smuzhiyun 	unsigned int playback_format;
69*4882a593Smuzhiyun 	unsigned int capture_format;
70*4882a593Smuzhiyun 	struct timer_list midi_timer;
71*4882a593Smuzhiyun 	unsigned int p_dma_size;
72*4882a593Smuzhiyun 	unsigned int p_period_size;
73*4882a593Smuzhiyun 	unsigned int c_dma_size;
74*4882a593Smuzhiyun 	unsigned int c_period_size;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	spinlock_t mixer_lock;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	char name[32];
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	void *csp; /* used only when CONFIG_SND_SB16_CSP is set */
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	struct snd_card *card;
83*4882a593Smuzhiyun 	struct snd_pcm *pcm;
84*4882a593Smuzhiyun 	struct snd_pcm_substream *playback_substream;
85*4882a593Smuzhiyun 	struct snd_pcm_substream *capture_substream;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	struct snd_rawmidi *rmidi;
88*4882a593Smuzhiyun 	struct snd_rawmidi_substream *midi_substream_input;
89*4882a593Smuzhiyun 	struct snd_rawmidi_substream *midi_substream_output;
90*4882a593Smuzhiyun 	irq_handler_t rmidi_callback;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	spinlock_t reg_lock;
93*4882a593Smuzhiyun 	spinlock_t open_lock;
94*4882a593Smuzhiyun 	spinlock_t midi_input_lock;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	struct snd_info_entry *proc_entry;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #ifdef CONFIG_PM
99*4882a593Smuzhiyun 	unsigned char saved_regs[0x20];
100*4882a593Smuzhiyun #endif
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /* I/O ports */
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define SBP(chip, x)		((chip)->port + s_b_SB_##x)
106*4882a593Smuzhiyun #define SBP1(port, x)		((port) + s_b_SB_##x)
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define s_b_SB_RESET		0x6
109*4882a593Smuzhiyun #define s_b_SB_READ		0xa
110*4882a593Smuzhiyun #define s_b_SB_WRITE		0xc
111*4882a593Smuzhiyun #define s_b_SB_COMMAND		0xc
112*4882a593Smuzhiyun #define s_b_SB_STATUS		0xc
113*4882a593Smuzhiyun #define s_b_SB_DATA_AVAIL	0xe
114*4882a593Smuzhiyun #define s_b_SB_DATA_AVAIL_16 	0xf
115*4882a593Smuzhiyun #define s_b_SB_MIXER_ADDR	0x4
116*4882a593Smuzhiyun #define s_b_SB_MIXER_DATA	0x5
117*4882a593Smuzhiyun #define s_b_SB_OPL3_LEFT	0x0
118*4882a593Smuzhiyun #define s_b_SB_OPL3_RIGHT	0x2
119*4882a593Smuzhiyun #define s_b_SB_OPL3_BOTH	0x8
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define SB_DSP_OUTPUT		0x14
122*4882a593Smuzhiyun #define SB_DSP_INPUT		0x24
123*4882a593Smuzhiyun #define SB_DSP_BLOCK_SIZE	0x48
124*4882a593Smuzhiyun #define SB_DSP_HI_OUTPUT	0x91
125*4882a593Smuzhiyun #define SB_DSP_HI_INPUT		0x99
126*4882a593Smuzhiyun #define SB_DSP_LO_OUTPUT_AUTO	0x1c
127*4882a593Smuzhiyun #define SB_DSP_LO_INPUT_AUTO	0x2c
128*4882a593Smuzhiyun #define SB_DSP_HI_OUTPUT_AUTO	0x90
129*4882a593Smuzhiyun #define SB_DSP_HI_INPUT_AUTO	0x98
130*4882a593Smuzhiyun #define SB_DSP_IMMED_INT	0xf2
131*4882a593Smuzhiyun #define SB_DSP_GET_VERSION	0xe1
132*4882a593Smuzhiyun #define SB_DSP_SPEAKER_ON	0xd1
133*4882a593Smuzhiyun #define SB_DSP_SPEAKER_OFF	0xd3
134*4882a593Smuzhiyun #define SB_DSP_DMA8_OFF		0xd0
135*4882a593Smuzhiyun #define SB_DSP_DMA8_ON		0xd4
136*4882a593Smuzhiyun #define SB_DSP_DMA8_EXIT	0xda
137*4882a593Smuzhiyun #define SB_DSP_DMA16_OFF	0xd5
138*4882a593Smuzhiyun #define SB_DSP_DMA16_ON		0xd6
139*4882a593Smuzhiyun #define SB_DSP_DMA16_EXIT	0xd9
140*4882a593Smuzhiyun #define SB_DSP_SAMPLE_RATE	0x40
141*4882a593Smuzhiyun #define SB_DSP_SAMPLE_RATE_OUT	0x41
142*4882a593Smuzhiyun #define SB_DSP_SAMPLE_RATE_IN	0x42
143*4882a593Smuzhiyun #define SB_DSP_MONO_8BIT	0xa0
144*4882a593Smuzhiyun #define SB_DSP_MONO_16BIT	0xa4
145*4882a593Smuzhiyun #define SB_DSP_STEREO_8BIT	0xa8
146*4882a593Smuzhiyun #define SB_DSP_STEREO_16BIT	0xac
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #define SB_DSP_MIDI_INPUT_IRQ	0x31
149*4882a593Smuzhiyun #define SB_DSP_MIDI_UART_IRQ	0x35
150*4882a593Smuzhiyun #define SB_DSP_MIDI_OUTPUT	0x38
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #define SB_DSP4_OUT8_AI		0xc6
153*4882a593Smuzhiyun #define SB_DSP4_IN8_AI		0xce
154*4882a593Smuzhiyun #define SB_DSP4_OUT16_AI	0xb6
155*4882a593Smuzhiyun #define SB_DSP4_IN16_AI		0xbe
156*4882a593Smuzhiyun #define SB_DSP4_MODE_UNS_MONO	0x00
157*4882a593Smuzhiyun #define SB_DSP4_MODE_SIGN_MONO	0x10
158*4882a593Smuzhiyun #define SB_DSP4_MODE_UNS_STEREO	0x20
159*4882a593Smuzhiyun #define SB_DSP4_MODE_SIGN_STEREO 0x30
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun #define SB_DSP4_OUTPUT		0x3c
162*4882a593Smuzhiyun #define SB_DSP4_INPUT_LEFT	0x3d
163*4882a593Smuzhiyun #define SB_DSP4_INPUT_RIGHT	0x3e
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun /* registers for SB 2.0 mixer */
166*4882a593Smuzhiyun #define SB_DSP20_MASTER_DEV	0x02
167*4882a593Smuzhiyun #define SB_DSP20_PCM_DEV	0x0A
168*4882a593Smuzhiyun #define SB_DSP20_CD_DEV		0x08
169*4882a593Smuzhiyun #define SB_DSP20_FM_DEV		0x06
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun /* registers for SB PRO mixer */
172*4882a593Smuzhiyun #define SB_DSP_MASTER_DEV	0x22
173*4882a593Smuzhiyun #define SB_DSP_PCM_DEV		0x04
174*4882a593Smuzhiyun #define SB_DSP_LINE_DEV		0x2e
175*4882a593Smuzhiyun #define SB_DSP_CD_DEV		0x28
176*4882a593Smuzhiyun #define SB_DSP_FM_DEV		0x26
177*4882a593Smuzhiyun #define SB_DSP_MIC_DEV		0x0a
178*4882a593Smuzhiyun #define SB_DSP_CAPTURE_SOURCE	0x0c
179*4882a593Smuzhiyun #define SB_DSP_CAPTURE_FILT	0x0c
180*4882a593Smuzhiyun #define SB_DSP_PLAYBACK_FILT	0x0e
181*4882a593Smuzhiyun #define SB_DSP_STEREO_SW	0x0e
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun #define SB_DSP_MIXS_MIC0	0x00	/* same as MIC */
184*4882a593Smuzhiyun #define SB_DSP_MIXS_CD		0x01
185*4882a593Smuzhiyun #define SB_DSP_MIXS_MIC		0x02
186*4882a593Smuzhiyun #define SB_DSP_MIXS_LINE	0x03
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun /* registers (only for left channel) for SB 16 mixer */
189*4882a593Smuzhiyun #define SB_DSP4_MASTER_DEV	0x30
190*4882a593Smuzhiyun #define SB_DSP4_BASS_DEV	0x46
191*4882a593Smuzhiyun #define SB_DSP4_TREBLE_DEV	0x44
192*4882a593Smuzhiyun #define SB_DSP4_SYNTH_DEV	0x34
193*4882a593Smuzhiyun #define SB_DSP4_PCM_DEV		0x32
194*4882a593Smuzhiyun #define SB_DSP4_SPEAKER_DEV	0x3b
195*4882a593Smuzhiyun #define SB_DSP4_LINE_DEV	0x38
196*4882a593Smuzhiyun #define SB_DSP4_MIC_DEV		0x3a
197*4882a593Smuzhiyun #define SB_DSP4_OUTPUT_SW	0x3c
198*4882a593Smuzhiyun #define SB_DSP4_CD_DEV		0x36
199*4882a593Smuzhiyun #define SB_DSP4_IGAIN_DEV	0x3f
200*4882a593Smuzhiyun #define SB_DSP4_OGAIN_DEV	0x41
201*4882a593Smuzhiyun #define SB_DSP4_MIC_AGC		0x43
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun /* additional registers for SB 16 mixer */
204*4882a593Smuzhiyun #define SB_DSP4_IRQSETUP	0x80
205*4882a593Smuzhiyun #define SB_DSP4_DMASETUP	0x81
206*4882a593Smuzhiyun #define SB_DSP4_IRQSTATUS	0x82
207*4882a593Smuzhiyun #define SB_DSP4_MPUSETUP	0x84
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun #define SB_DSP4_3DSE		0x90
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun /* Registers for DT-019x / ALS-007 mixer */
212*4882a593Smuzhiyun #define SB_DT019X_MASTER_DEV	0x62
213*4882a593Smuzhiyun #define SB_DT019X_PCM_DEV	0x64
214*4882a593Smuzhiyun #define SB_DT019X_SYNTH_DEV	0x66
215*4882a593Smuzhiyun #define SB_DT019X_CD_DEV	0x68
216*4882a593Smuzhiyun #define SB_DT019X_MIC_DEV	0x6a
217*4882a593Smuzhiyun #define SB_DT019X_SPKR_DEV	0x6a
218*4882a593Smuzhiyun #define SB_DT019X_LINE_DEV	0x6e
219*4882a593Smuzhiyun #define SB_DT019X_OUTPUT_SW2	0x4c
220*4882a593Smuzhiyun #define SB_DT019X_CAPTURE_SW	0x6c
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun #define SB_DT019X_CAP_CD	0x02
223*4882a593Smuzhiyun #define SB_DT019X_CAP_MIC	0x04
224*4882a593Smuzhiyun #define SB_DT019X_CAP_LINE	0x06
225*4882a593Smuzhiyun #define SB_DT019X_CAP_SYNTH	0x07
226*4882a593Smuzhiyun #define SB_DT019X_CAP_MAIN	0x07
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun #define SB_ALS4000_MONO_IO_CTRL	0x4b
229*4882a593Smuzhiyun #define SB_ALS4000_OUT_MIXER_CTRL_2	0x4c
230*4882a593Smuzhiyun #define SB_ALS4000_MIC_IN_GAIN	0x4d
231*4882a593Smuzhiyun #define SB_ALS4000_ANALOG_REFRNC_VOLT_CTRL 0x4e
232*4882a593Smuzhiyun #define SB_ALS4000_FMDAC	0x4f
233*4882a593Smuzhiyun #define SB_ALS4000_3D_SND_FX	0x50
234*4882a593Smuzhiyun #define SB_ALS4000_3D_TIME_DELAY	0x51
235*4882a593Smuzhiyun #define SB_ALS4000_3D_AUTO_MUTE	0x52
236*4882a593Smuzhiyun #define SB_ALS4000_ANALOG_BLOCK_CTRL 0x53
237*4882a593Smuzhiyun #define SB_ALS4000_3D_DELAYLINE_PATTERN 0x54
238*4882a593Smuzhiyun #define SB_ALS4000_CR3_CONFIGURATION	0xc3 /* bit 7 is Digital Loop Enable */
239*4882a593Smuzhiyun #define SB_ALS4000_QSOUND	0xdb
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun /* IRQ setting bitmap */
242*4882a593Smuzhiyun #define SB_IRQSETUP_IRQ9	0x01
243*4882a593Smuzhiyun #define SB_IRQSETUP_IRQ5	0x02
244*4882a593Smuzhiyun #define SB_IRQSETUP_IRQ7	0x04
245*4882a593Smuzhiyun #define SB_IRQSETUP_IRQ10	0x08
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun /* IRQ types */
248*4882a593Smuzhiyun #define SB_IRQTYPE_8BIT		0x01
249*4882a593Smuzhiyun #define SB_IRQTYPE_16BIT	0x02
250*4882a593Smuzhiyun #define SB_IRQTYPE_MPUIN	0x04
251*4882a593Smuzhiyun #define ALS4K_IRQTYPE_CR1E_DMA	0x20
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun /* DMA setting bitmap */
254*4882a593Smuzhiyun #define SB_DMASETUP_DMA0	0x01
255*4882a593Smuzhiyun #define SB_DMASETUP_DMA1	0x02
256*4882a593Smuzhiyun #define SB_DMASETUP_DMA3	0x08
257*4882a593Smuzhiyun #define SB_DMASETUP_DMA5	0x20
258*4882a593Smuzhiyun #define SB_DMASETUP_DMA6	0x40
259*4882a593Smuzhiyun #define SB_DMASETUP_DMA7	0x80
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun /*
262*4882a593Smuzhiyun  *
263*4882a593Smuzhiyun  */
264*4882a593Smuzhiyun 
snd_sb_ack_8bit(struct snd_sb * chip)265*4882a593Smuzhiyun static inline void snd_sb_ack_8bit(struct snd_sb *chip)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun 	inb(SBP(chip, DATA_AVAIL));
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
snd_sb_ack_16bit(struct snd_sb * chip)270*4882a593Smuzhiyun static inline void snd_sb_ack_16bit(struct snd_sb *chip)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun 	inb(SBP(chip, DATA_AVAIL_16));
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /* sb_common.c */
276*4882a593Smuzhiyun int snd_sbdsp_command(struct snd_sb *chip, unsigned char val);
277*4882a593Smuzhiyun int snd_sbdsp_get_byte(struct snd_sb *chip);
278*4882a593Smuzhiyun int snd_sbdsp_reset(struct snd_sb *chip);
279*4882a593Smuzhiyun int snd_sbdsp_create(struct snd_card *card,
280*4882a593Smuzhiyun 		     unsigned long port,
281*4882a593Smuzhiyun 		     int irq,
282*4882a593Smuzhiyun 		     irq_handler_t irq_handler,
283*4882a593Smuzhiyun 		     int dma8, int dma16,
284*4882a593Smuzhiyun 		     unsigned short hardware,
285*4882a593Smuzhiyun 		     struct snd_sb **r_chip);
286*4882a593Smuzhiyun /* sb_mixer.c */
287*4882a593Smuzhiyun void snd_sbmixer_write(struct snd_sb *chip, unsigned char reg, unsigned char data);
288*4882a593Smuzhiyun unsigned char snd_sbmixer_read(struct snd_sb *chip, unsigned char reg);
289*4882a593Smuzhiyun int snd_sbmixer_new(struct snd_sb *chip);
290*4882a593Smuzhiyun #ifdef CONFIG_PM
291*4882a593Smuzhiyun void snd_sbmixer_suspend(struct snd_sb *chip);
292*4882a593Smuzhiyun void snd_sbmixer_resume(struct snd_sb *chip);
293*4882a593Smuzhiyun #endif
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun /* sb8_init.c */
296*4882a593Smuzhiyun int snd_sb8dsp_pcm(struct snd_sb *chip, int device);
297*4882a593Smuzhiyun /* sb8.c */
298*4882a593Smuzhiyun irqreturn_t snd_sb8dsp_interrupt(struct snd_sb *chip);
299*4882a593Smuzhiyun int snd_sb8_playback_open(struct snd_pcm_substream *substream);
300*4882a593Smuzhiyun int snd_sb8_capture_open(struct snd_pcm_substream *substream);
301*4882a593Smuzhiyun int snd_sb8_playback_close(struct snd_pcm_substream *substream);
302*4882a593Smuzhiyun int snd_sb8_capture_close(struct snd_pcm_substream *substream);
303*4882a593Smuzhiyun /* midi8.c */
304*4882a593Smuzhiyun irqreturn_t snd_sb8dsp_midi_interrupt(struct snd_sb *chip);
305*4882a593Smuzhiyun int snd_sb8dsp_midi(struct snd_sb *chip, int device);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun /* sb16_init.c */
308*4882a593Smuzhiyun int snd_sb16dsp_pcm(struct snd_sb *chip, int device);
309*4882a593Smuzhiyun const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction);
310*4882a593Smuzhiyun int snd_sb16dsp_configure(struct snd_sb *chip);
311*4882a593Smuzhiyun /* sb16.c */
312*4882a593Smuzhiyun irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun /* exported mixer stuffs */
315*4882a593Smuzhiyun enum {
316*4882a593Smuzhiyun 	SB_MIX_SINGLE,
317*4882a593Smuzhiyun 	SB_MIX_DOUBLE,
318*4882a593Smuzhiyun 	SB_MIX_INPUT_SW,
319*4882a593Smuzhiyun 	SB_MIX_CAPTURE_PRO,
320*4882a593Smuzhiyun 	SB_MIX_CAPTURE_DT019X,
321*4882a593Smuzhiyun 	SB_MIX_MONO_CAPTURE_ALS4K
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun #define SB_MIXVAL_DOUBLE(left_reg, right_reg, left_shift, right_shift, mask) \
325*4882a593Smuzhiyun   ((left_reg) | ((right_reg) << 8) | ((left_shift) << 16) | ((right_shift) << 19) | ((mask) << 24))
326*4882a593Smuzhiyun #define SB_MIXVAL_SINGLE(reg, shift, mask) \
327*4882a593Smuzhiyun   ((reg) | ((shift) << 16) | ((mask) << 24))
328*4882a593Smuzhiyun #define SB_MIXVAL_INPUT_SW(reg1, reg2, left_shift, right_shift) \
329*4882a593Smuzhiyun   ((reg1) | ((reg2) << 8) | ((left_shift) << 16) | ((right_shift) << 24))
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun int snd_sbmixer_add_ctl(struct snd_sb *chip, const char *name, int index, int type, unsigned long value);
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun /* for ease of use */
334*4882a593Smuzhiyun struct sbmix_elem {
335*4882a593Smuzhiyun 	const char *name;
336*4882a593Smuzhiyun 	int type;
337*4882a593Smuzhiyun 	unsigned long private_value;
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun #define SB_SINGLE(xname, reg, shift, mask) \
341*4882a593Smuzhiyun { .name = xname, \
342*4882a593Smuzhiyun   .type = SB_MIX_SINGLE, \
343*4882a593Smuzhiyun   .private_value = SB_MIXVAL_SINGLE(reg, shift, mask) }
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun #define SB_DOUBLE(xname, left_reg, right_reg, left_shift, right_shift, mask) \
346*4882a593Smuzhiyun { .name = xname, \
347*4882a593Smuzhiyun   .type = SB_MIX_DOUBLE, \
348*4882a593Smuzhiyun   .private_value = SB_MIXVAL_DOUBLE(left_reg, right_reg, left_shift, right_shift, mask) }
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun #define SB16_INPUT_SW(xname, reg1, reg2, left_shift, right_shift) \
351*4882a593Smuzhiyun { .name = xname, \
352*4882a593Smuzhiyun   .type = SB_MIX_INPUT_SW, \
353*4882a593Smuzhiyun   .private_value = SB_MIXVAL_INPUT_SW(reg1, reg2, left_shift, right_shift) }
354*4882a593Smuzhiyun 
snd_sbmixer_add_ctl_elem(struct snd_sb * chip,const struct sbmix_elem * c)355*4882a593Smuzhiyun static inline int snd_sbmixer_add_ctl_elem(struct snd_sb *chip, const struct sbmix_elem *c)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	return snd_sbmixer_add_ctl(chip, c->name, 0, c->type, c->private_value);
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun #endif /* __SOUND_SB_H */
361