1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * linux/sound/rt5659.h -- Platform data for RT5659 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2013 Realtek Microelectronics 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __LINUX_SND_RT5659_H 9*4882a593Smuzhiyun #define __LINUX_SND_RT5659_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum rt5659_dmic1_data_pin { 12*4882a593Smuzhiyun RT5659_DMIC1_NULL, 13*4882a593Smuzhiyun RT5659_DMIC1_DATA_IN2N, 14*4882a593Smuzhiyun RT5659_DMIC1_DATA_GPIO5, 15*4882a593Smuzhiyun RT5659_DMIC1_DATA_GPIO9, 16*4882a593Smuzhiyun RT5659_DMIC1_DATA_GPIO11, 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun enum rt5659_dmic2_data_pin { 20*4882a593Smuzhiyun RT5659_DMIC2_NULL, 21*4882a593Smuzhiyun RT5659_DMIC2_DATA_IN2P, 22*4882a593Smuzhiyun RT5659_DMIC2_DATA_GPIO6, 23*4882a593Smuzhiyun RT5659_DMIC2_DATA_GPIO10, 24*4882a593Smuzhiyun RT5659_DMIC2_DATA_GPIO12, 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun enum rt5659_jd_src { 28*4882a593Smuzhiyun RT5659_JD_NULL, 29*4882a593Smuzhiyun RT5659_JD3, 30*4882a593Smuzhiyun RT5659_JD_HDA_HEADER, 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct rt5659_platform_data { 34*4882a593Smuzhiyun bool in1_diff; 35*4882a593Smuzhiyun bool in3_diff; 36*4882a593Smuzhiyun bool in4_diff; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun int ldo1_en; /* GPIO for LDO1_EN */ 39*4882a593Smuzhiyun int reset; /* GPIO for RESET */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun enum rt5659_dmic1_data_pin dmic1_data_pin; 42*4882a593Smuzhiyun enum rt5659_dmic2_data_pin dmic2_data_pin; 43*4882a593Smuzhiyun enum rt5659_jd_src jd_src; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif 47*4882a593Smuzhiyun 48