1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * da7218.h - DA7218 ASoC Codec Driver Platform Data 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2015 Dialog Semiconductor 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _DA7218_PDATA_H 11*4882a593Smuzhiyun #define _DA7218_PDATA_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* Mic Bias */ 14*4882a593Smuzhiyun enum da7218_micbias_voltage { 15*4882a593Smuzhiyun DA7218_MICBIAS_1_2V = -1, 16*4882a593Smuzhiyun DA7218_MICBIAS_1_6V, 17*4882a593Smuzhiyun DA7218_MICBIAS_1_8V, 18*4882a593Smuzhiyun DA7218_MICBIAS_2_0V, 19*4882a593Smuzhiyun DA7218_MICBIAS_2_2V, 20*4882a593Smuzhiyun DA7218_MICBIAS_2_4V, 21*4882a593Smuzhiyun DA7218_MICBIAS_2_6V, 22*4882a593Smuzhiyun DA7218_MICBIAS_2_8V, 23*4882a593Smuzhiyun DA7218_MICBIAS_3_0V, 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun enum da7218_mic_amp_in_sel { 27*4882a593Smuzhiyun DA7218_MIC_AMP_IN_SEL_DIFF = 0, 28*4882a593Smuzhiyun DA7218_MIC_AMP_IN_SEL_SE_P, 29*4882a593Smuzhiyun DA7218_MIC_AMP_IN_SEL_SE_N, 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* DMIC */ 33*4882a593Smuzhiyun enum da7218_dmic_data_sel { 34*4882a593Smuzhiyun DA7218_DMIC_DATA_LRISE_RFALL = 0, 35*4882a593Smuzhiyun DA7218_DMIC_DATA_LFALL_RRISE, 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun enum da7218_dmic_samplephase { 39*4882a593Smuzhiyun DA7218_DMIC_SAMPLE_ON_CLKEDGE = 0, 40*4882a593Smuzhiyun DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE, 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun enum da7218_dmic_clk_rate { 44*4882a593Smuzhiyun DA7218_DMIC_CLK_3_0MHZ = 0, 45*4882a593Smuzhiyun DA7218_DMIC_CLK_1_5MHZ, 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Headphone Detect */ 49*4882a593Smuzhiyun enum da7218_hpldet_jack_rate { 50*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_5US = 0, 51*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_10US, 52*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_20US, 53*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_40US, 54*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_80US, 55*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_160US, 56*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_320US, 57*4882a593Smuzhiyun DA7218_HPLDET_JACK_RATE_640US, 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun enum da7218_hpldet_jack_debounce { 61*4882a593Smuzhiyun DA7218_HPLDET_JACK_DEBOUNCE_OFF = 0, 62*4882a593Smuzhiyun DA7218_HPLDET_JACK_DEBOUNCE_2, 63*4882a593Smuzhiyun DA7218_HPLDET_JACK_DEBOUNCE_3, 64*4882a593Smuzhiyun DA7218_HPLDET_JACK_DEBOUNCE_4, 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun enum da7218_hpldet_jack_thr { 68*4882a593Smuzhiyun DA7218_HPLDET_JACK_THR_84PCT = 0, 69*4882a593Smuzhiyun DA7218_HPLDET_JACK_THR_88PCT, 70*4882a593Smuzhiyun DA7218_HPLDET_JACK_THR_92PCT, 71*4882a593Smuzhiyun DA7218_HPLDET_JACK_THR_96PCT, 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun struct da7218_hpldet_pdata { 75*4882a593Smuzhiyun enum da7218_hpldet_jack_rate jack_rate; 76*4882a593Smuzhiyun enum da7218_hpldet_jack_debounce jack_debounce; 77*4882a593Smuzhiyun enum da7218_hpldet_jack_thr jack_thr; 78*4882a593Smuzhiyun bool comp_inv; 79*4882a593Smuzhiyun bool hyst; 80*4882a593Smuzhiyun bool discharge; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun struct da7218_pdata { 84*4882a593Smuzhiyun /* Mic */ 85*4882a593Smuzhiyun enum da7218_micbias_voltage micbias1_lvl; 86*4882a593Smuzhiyun enum da7218_micbias_voltage micbias2_lvl; 87*4882a593Smuzhiyun enum da7218_mic_amp_in_sel mic1_amp_in_sel; 88*4882a593Smuzhiyun enum da7218_mic_amp_in_sel mic2_amp_in_sel; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* DMIC */ 91*4882a593Smuzhiyun enum da7218_dmic_data_sel dmic1_data_sel; 92*4882a593Smuzhiyun enum da7218_dmic_data_sel dmic2_data_sel; 93*4882a593Smuzhiyun enum da7218_dmic_samplephase dmic1_samplephase; 94*4882a593Smuzhiyun enum da7218_dmic_samplephase dmic2_samplephase; 95*4882a593Smuzhiyun enum da7218_dmic_clk_rate dmic1_clk_rate; 96*4882a593Smuzhiyun enum da7218_dmic_clk_rate dmic2_clk_rate; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /* HP Diff Supply - DA7217 only */ 99*4882a593Smuzhiyun bool hp_diff_single_supply; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* HP Detect - DA7218 only */ 102*4882a593Smuzhiyun struct da7218_hpldet_pdata *hpldet_pdata; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #endif /* _DA7218_PDATA_H */ 106