1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * da7213.h - DA7213 ASoC Codec Driver Platform Data 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Dialog Semiconductor 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _DA7213_PDATA_H 11*4882a593Smuzhiyun #define _DA7213_PDATA_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun enum da7213_micbias_voltage { 14*4882a593Smuzhiyun DA7213_MICBIAS_1_6V = 0, 15*4882a593Smuzhiyun DA7213_MICBIAS_2_2V = 1, 16*4882a593Smuzhiyun DA7213_MICBIAS_2_5V = 2, 17*4882a593Smuzhiyun DA7213_MICBIAS_3_0V = 3, 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun enum da7213_dmic_data_sel { 21*4882a593Smuzhiyun DA7213_DMIC_DATA_LRISE_RFALL = 0, 22*4882a593Smuzhiyun DA7213_DMIC_DATA_LFALL_RRISE = 1, 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun enum da7213_dmic_samplephase { 26*4882a593Smuzhiyun DA7213_DMIC_SAMPLE_ON_CLKEDGE = 0, 27*4882a593Smuzhiyun DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE = 1, 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun enum da7213_dmic_clk_rate { 31*4882a593Smuzhiyun DA7213_DMIC_CLK_3_0MHZ = 0, 32*4882a593Smuzhiyun DA7213_DMIC_CLK_1_5MHZ = 1, 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct da7213_platform_data { 36*4882a593Smuzhiyun /* Mic Bias voltage */ 37*4882a593Smuzhiyun enum da7213_micbias_voltage micbias1_lvl; 38*4882a593Smuzhiyun enum da7213_micbias_voltage micbias2_lvl; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* DMIC config */ 41*4882a593Smuzhiyun enum da7213_dmic_data_sel dmic_data_sel; 42*4882a593Smuzhiyun enum da7213_dmic_samplephase dmic_samplephase; 43*4882a593Smuzhiyun enum da7213_dmic_clk_rate dmic_clk_rate; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif /* _DA7213_PDATA_H */ 47