1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * linux/sound/cs35l33.h -- Platform data for CS35l33 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2016 Cirrus Logic Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __CS35L33_H 9*4882a593Smuzhiyun #define __CS35L33_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct cs35l33_hg { 12*4882a593Smuzhiyun bool enable_hg_algo; 13*4882a593Smuzhiyun unsigned int mem_depth; 14*4882a593Smuzhiyun unsigned int release_rate; 15*4882a593Smuzhiyun unsigned int hd_rm; 16*4882a593Smuzhiyun unsigned int ldo_thld; 17*4882a593Smuzhiyun unsigned int ldo_path_disable; 18*4882a593Smuzhiyun unsigned int ldo_entry_delay; 19*4882a593Smuzhiyun bool vp_hg_auto; 20*4882a593Smuzhiyun unsigned int vp_hg; 21*4882a593Smuzhiyun unsigned int vp_hg_rate; 22*4882a593Smuzhiyun unsigned int vp_hg_va; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun struct cs35l33_pdata { 26*4882a593Smuzhiyun /* Boost Controller Voltage Setting */ 27*4882a593Smuzhiyun unsigned int boost_ctl; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* Boost Controller Peak Current */ 30*4882a593Smuzhiyun unsigned int boost_ipk; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Amplifier Drive Select */ 33*4882a593Smuzhiyun unsigned int amp_drv_sel; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* soft volume ramp */ 36*4882a593Smuzhiyun unsigned int ramp_rate; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* IMON adc scale */ 39*4882a593Smuzhiyun unsigned int imon_adc_scale; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* H/G algo configuration */ 42*4882a593Smuzhiyun struct cs35l33_hg hg_config; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #endif /* __CS35L33_H */ 46