xref: /OK3568_Linux_fs/kernel/include/sound/ac97_codec.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4*4882a593Smuzhiyun  *  Universal interface for Audio Codec '97
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *  For more details look to AC '97 component specification revision 2.1
7*4882a593Smuzhiyun  *  by Intel Corporation (http://developer.intel.com).
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef __SOUND_AC97_CODEC_H
11*4882a593Smuzhiyun #define __SOUND_AC97_CODEC_H
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/bitops.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/workqueue.h>
16*4882a593Smuzhiyun #include <sound/ac97/regs.h>
17*4882a593Smuzhiyun #include <sound/pcm.h>
18*4882a593Smuzhiyun #include <sound/control.h>
19*4882a593Smuzhiyun #include <sound/info.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* maximum number of devices on the AC97 bus */
22*4882a593Smuzhiyun #define	AC97_BUS_MAX_DEVICES	4
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* specific - SigmaTel */
25*4882a593Smuzhiyun #define AC97_SIGMATEL_OUTSEL	0x64	/* Output Select, STAC9758 */
26*4882a593Smuzhiyun #define AC97_SIGMATEL_INSEL	0x66	/* Input Select, STAC9758 */
27*4882a593Smuzhiyun #define AC97_SIGMATEL_IOMISC	0x68	/* STAC9758 */
28*4882a593Smuzhiyun #define AC97_SIGMATEL_ANALOG	0x6c	/* Analog Special */
29*4882a593Smuzhiyun #define AC97_SIGMATEL_DAC2INVERT 0x6e
30*4882a593Smuzhiyun #define AC97_SIGMATEL_BIAS1	0x70
31*4882a593Smuzhiyun #define AC97_SIGMATEL_BIAS2	0x72
32*4882a593Smuzhiyun #define AC97_SIGMATEL_VARIOUS	0x72	/* STAC9758 */
33*4882a593Smuzhiyun #define AC97_SIGMATEL_MULTICHN	0x74	/* Multi-Channel programming */
34*4882a593Smuzhiyun #define AC97_SIGMATEL_CIC1	0x76
35*4882a593Smuzhiyun #define AC97_SIGMATEL_CIC2	0x78
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* specific - Analog Devices */
38*4882a593Smuzhiyun #define AC97_AD_TEST		0x5a	/* test register */
39*4882a593Smuzhiyun #define AC97_AD_TEST2		0x5c	/* undocumented test register 2 */
40*4882a593Smuzhiyun #define AC97_AD_HPFD_SHIFT	12	/* High Pass Filter Disable */
41*4882a593Smuzhiyun #define AC97_AD_CODEC_CFG	0x70	/* codec configuration */
42*4882a593Smuzhiyun #define AC97_AD_JACK_SPDIF	0x72	/* Jack Sense & S/PDIF */
43*4882a593Smuzhiyun #define AC97_AD_SERIAL_CFG	0x74	/* Serial Configuration */
44*4882a593Smuzhiyun #define AC97_AD_MISC		0x76	/* Misc Control Bits */
45*4882a593Smuzhiyun #define AC97_AD_VREFD_SHIFT	2	/* V_REFOUT Disable (AD1888) */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* specific - Cirrus Logic */
48*4882a593Smuzhiyun #define AC97_CSR_ACMODE		0x5e	/* AC Mode Register */
49*4882a593Smuzhiyun #define AC97_CSR_MISC_CRYSTAL	0x60	/* Misc Crystal Control */
50*4882a593Smuzhiyun #define AC97_CSR_SPDIF		0x68	/* S/PDIF Register */
51*4882a593Smuzhiyun #define AC97_CSR_SERIAL		0x6a	/* Serial Port Control */
52*4882a593Smuzhiyun #define AC97_CSR_SPECF_ADDR	0x6c	/* Special Feature Address */
53*4882a593Smuzhiyun #define AC97_CSR_SPECF_DATA	0x6e	/* Special Feature Data */
54*4882a593Smuzhiyun #define AC97_CSR_BDI_STATUS	0x7a	/* BDI Status */
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* specific - Conexant */
57*4882a593Smuzhiyun #define AC97_CXR_AUDIO_MISC	0x5c
58*4882a593Smuzhiyun #define AC97_CXR_SPDIFEN	(1<<3)
59*4882a593Smuzhiyun #define AC97_CXR_COPYRGT	(1<<2)
60*4882a593Smuzhiyun #define AC97_CXR_SPDIF_MASK	(3<<0)
61*4882a593Smuzhiyun #define AC97_CXR_SPDIF_PCM	0x0
62*4882a593Smuzhiyun #define AC97_CXR_SPDIF_AC3	0x2
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* specific - ALC */
65*4882a593Smuzhiyun #define AC97_ALC650_SPDIF_INPUT_STATUS1	0x60
66*4882a593Smuzhiyun /* S/PDIF input status 1 bit defines */
67*4882a593Smuzhiyun #define AC97_ALC650_PRO             0x0001  /* Professional status */
68*4882a593Smuzhiyun #define AC97_ALC650_NAUDIO          0x0002  /* Non audio stream */
69*4882a593Smuzhiyun #define AC97_ALC650_COPY            0x0004  /* Copyright status */
70*4882a593Smuzhiyun #define AC97_ALC650_PRE             0x0038  /* Preemphasis status */
71*4882a593Smuzhiyun #define AC97_ALC650_PRE_SHIFT       3
72*4882a593Smuzhiyun #define AC97_ALC650_MODE            0x00C0  /* Preemphasis status */
73*4882a593Smuzhiyun #define AC97_ALC650_MODE_SHIFT      6
74*4882a593Smuzhiyun #define AC97_ALC650_CC_MASK         0x7f00  /* Category Code mask */
75*4882a593Smuzhiyun #define AC97_ALC650_CC_SHIFT        8
76*4882a593Smuzhiyun #define AC97_ALC650_L               0x8000  /* Generation Level status */
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #define AC97_ALC650_SPDIF_INPUT_STATUS2	0x62
79*4882a593Smuzhiyun /* S/PDIF input status 2 bit defines */
80*4882a593Smuzhiyun #define AC97_ALC650_SOUCE_MASK      0x000f  /* Source number */
81*4882a593Smuzhiyun #define AC97_ALC650_CHANNEL_MASK    0x00f0  /* Channel number */
82*4882a593Smuzhiyun #define AC97_ALC650_CHANNEL_SHIFT   4
83*4882a593Smuzhiyun #define AC97_ALC650_SPSR_MASK       0x0f00  /* S/PDIF Sample Rate bits */
84*4882a593Smuzhiyun #define AC97_ALC650_SPSR_SHIFT      8
85*4882a593Smuzhiyun #define AC97_ALC650_SPSR_44K        0x0000  /* Use 44.1kHz Sample rate */
86*4882a593Smuzhiyun #define AC97_ALC650_SPSR_48K        0x0200  /* Use 48kHz Sample rate */
87*4882a593Smuzhiyun #define AC97_ALC650_SPSR_32K        0x0300  /* Use 32kHz Sample rate */
88*4882a593Smuzhiyun #define AC97_ALC650_CLOCK_ACCURACY  0x3000  /* Clock accuracy */
89*4882a593Smuzhiyun #define AC97_ALC650_CLOCK_SHIFT     12
90*4882a593Smuzhiyun #define AC97_ALC650_CLOCK_LOCK      0x4000  /* Clock locked status */
91*4882a593Smuzhiyun #define AC97_ALC650_V               0x8000  /* Validity status */
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define AC97_ALC650_SURR_DAC_VOL	0x64
94*4882a593Smuzhiyun #define AC97_ALC650_LFE_DAC_VOL		0x66
95*4882a593Smuzhiyun #define AC97_ALC650_UNKNOWN1		0x68
96*4882a593Smuzhiyun #define AC97_ALC650_MULTICH		0x6a
97*4882a593Smuzhiyun #define AC97_ALC650_UNKNOWN2		0x6c
98*4882a593Smuzhiyun #define AC97_ALC650_REVISION		0x6e
99*4882a593Smuzhiyun #define AC97_ALC650_UNKNOWN3		0x70
100*4882a593Smuzhiyun #define AC97_ALC650_UNKNOWN4		0x72
101*4882a593Smuzhiyun #define AC97_ALC650_MISC		0x74
102*4882a593Smuzhiyun #define AC97_ALC650_GPIO_SETUP		0x76
103*4882a593Smuzhiyun #define AC97_ALC650_GPIO_STATUS		0x78
104*4882a593Smuzhiyun #define AC97_ALC650_CLOCK		0x7a
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun /* specific - Yamaha YMF7x3 */
107*4882a593Smuzhiyun #define AC97_YMF7X3_DIT_CTRL	0x66	/* DIT Control (YMF743) / 2 (YMF753) */
108*4882a593Smuzhiyun #define AC97_YMF7X3_3D_MODE_SEL	0x68	/* 3D Mode Select */
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* specific - C-Media */
111*4882a593Smuzhiyun #define AC97_CM9738_VENDOR_CTRL	0x5a
112*4882a593Smuzhiyun #define AC97_CM9739_MULTI_CHAN	0x64
113*4882a593Smuzhiyun #define AC97_CM9739_SPDIF_IN_STATUS	0x68 /* 32bit */
114*4882a593Smuzhiyun #define AC97_CM9739_SPDIF_CTRL	0x6c
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* specific - wolfson */
117*4882a593Smuzhiyun #define AC97_WM97XX_FMIXER_VOL  0x72
118*4882a593Smuzhiyun #define AC97_WM9704_RMIXER_VOL  0x74
119*4882a593Smuzhiyun #define AC97_WM9704_TEST        0x5a
120*4882a593Smuzhiyun #define AC97_WM9704_RPCM_VOL    0x70
121*4882a593Smuzhiyun #define AC97_WM9711_OUT3VOL     0x16
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /* ac97->scaps */
125*4882a593Smuzhiyun #define AC97_SCAP_AUDIO		(1<<0)	/* audio codec 97 */
126*4882a593Smuzhiyun #define AC97_SCAP_MODEM		(1<<1)	/* modem codec 97 */
127*4882a593Smuzhiyun #define AC97_SCAP_SURROUND_DAC	(1<<2)	/* surround L&R DACs are present */
128*4882a593Smuzhiyun #define AC97_SCAP_CENTER_LFE_DAC (1<<3)	/* center and LFE DACs are present */
129*4882a593Smuzhiyun #define AC97_SCAP_SKIP_AUDIO	(1<<4)	/* skip audio part of codec */
130*4882a593Smuzhiyun #define AC97_SCAP_SKIP_MODEM	(1<<5)	/* skip modem part of codec */
131*4882a593Smuzhiyun #define AC97_SCAP_INDEP_SDIN	(1<<6)	/* independent SDIN */
132*4882a593Smuzhiyun #define AC97_SCAP_INV_EAPD	(1<<7)	/* inverted EAPD */
133*4882a593Smuzhiyun #define AC97_SCAP_DETECT_BY_VENDOR (1<<8) /* use vendor registers for read tests */
134*4882a593Smuzhiyun #define AC97_SCAP_NO_SPDIF	(1<<9)	/* don't build SPDIF controls */
135*4882a593Smuzhiyun #define AC97_SCAP_EAPD_LED	(1<<10)	/* EAPD as mute LED */
136*4882a593Smuzhiyun #define AC97_SCAP_POWER_SAVE	(1<<11)	/* capable for aggressive power-saving */
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun /* ac97->flags */
139*4882a593Smuzhiyun #define AC97_HAS_PC_BEEP	(1<<0)	/* force PC Speaker usage */
140*4882a593Smuzhiyun #define AC97_AD_MULTI		(1<<1)	/* Analog Devices - multi codecs */
141*4882a593Smuzhiyun #define AC97_CS_SPDIF		(1<<2)	/* Cirrus Logic uses funky SPDIF */
142*4882a593Smuzhiyun #define AC97_CX_SPDIF		(1<<3)	/* Conexant's spdif interface */
143*4882a593Smuzhiyun #define AC97_STEREO_MUTES	(1<<4)	/* has stereo mute bits */
144*4882a593Smuzhiyun #define AC97_DOUBLE_RATE	(1<<5)	/* supports double rate playback */
145*4882a593Smuzhiyun #define AC97_HAS_NO_MASTER_VOL	(1<<6)	/* no Master volume */
146*4882a593Smuzhiyun #define AC97_HAS_NO_PCM_VOL	(1<<7)	/* no PCM volume */
147*4882a593Smuzhiyun #define AC97_DEFAULT_POWER_OFF	(1<<8)	/* no RESET write */
148*4882a593Smuzhiyun #define AC97_MODEM_PATCH	(1<<9)	/* modem patch */
149*4882a593Smuzhiyun #define AC97_HAS_NO_REC_GAIN	(1<<10) /* no Record gain */
150*4882a593Smuzhiyun #define AC97_HAS_NO_PHONE	(1<<11) /* no PHONE volume */
151*4882a593Smuzhiyun #define AC97_HAS_NO_PC_BEEP	(1<<12) /* no PC Beep volume */
152*4882a593Smuzhiyun #define AC97_HAS_NO_VIDEO	(1<<13) /* no Video volume */
153*4882a593Smuzhiyun #define AC97_HAS_NO_CD		(1<<14) /* no CD volume */
154*4882a593Smuzhiyun #define AC97_HAS_NO_MIC	(1<<15) /* no MIC volume */
155*4882a593Smuzhiyun #define AC97_HAS_NO_TONE	(1<<16) /* no Tone volume */
156*4882a593Smuzhiyun #define AC97_HAS_NO_STD_PCM	(1<<17)	/* no standard AC97 PCM volume and mute */
157*4882a593Smuzhiyun #define AC97_HAS_NO_AUX		(1<<18) /* no standard AC97 AUX volume and mute */
158*4882a593Smuzhiyun #define AC97_HAS_8CH		(1<<19) /* supports 8-channel output */
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* rates indexes */
161*4882a593Smuzhiyun #define AC97_RATES_FRONT_DAC	0
162*4882a593Smuzhiyun #define AC97_RATES_SURR_DAC	1
163*4882a593Smuzhiyun #define AC97_RATES_LFE_DAC	2
164*4882a593Smuzhiyun #define AC97_RATES_ADC		3
165*4882a593Smuzhiyun #define AC97_RATES_MIC_ADC	4
166*4882a593Smuzhiyun #define AC97_RATES_SPDIF	5
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun #define AC97_NUM_GPIOS		16
169*4882a593Smuzhiyun /*
170*4882a593Smuzhiyun  *
171*4882a593Smuzhiyun  */
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun struct snd_ac97;
174*4882a593Smuzhiyun struct snd_ac97_gpio_priv;
175*4882a593Smuzhiyun struct snd_pcm_chmap;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun struct snd_ac97_build_ops {
178*4882a593Smuzhiyun 	int (*build_3d) (struct snd_ac97 *ac97);
179*4882a593Smuzhiyun 	int (*build_specific) (struct snd_ac97 *ac97);
180*4882a593Smuzhiyun 	int (*build_spdif) (struct snd_ac97 *ac97);
181*4882a593Smuzhiyun 	int (*build_post_spdif) (struct snd_ac97 *ac97);
182*4882a593Smuzhiyun #ifdef CONFIG_PM
183*4882a593Smuzhiyun 	void (*suspend) (struct snd_ac97 *ac97);
184*4882a593Smuzhiyun 	void (*resume) (struct snd_ac97 *ac97);
185*4882a593Smuzhiyun #endif
186*4882a593Smuzhiyun 	void (*update_jacks) (struct snd_ac97 *ac97);	/* for jack-sharing */
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun struct snd_ac97_bus_ops {
190*4882a593Smuzhiyun 	void (*reset) (struct snd_ac97 *ac97);
191*4882a593Smuzhiyun 	void (*warm_reset)(struct snd_ac97 *ac97);
192*4882a593Smuzhiyun 	void (*write) (struct snd_ac97 *ac97, unsigned short reg, unsigned short val);
193*4882a593Smuzhiyun 	unsigned short (*read) (struct snd_ac97 *ac97, unsigned short reg);
194*4882a593Smuzhiyun 	void (*wait) (struct snd_ac97 *ac97);
195*4882a593Smuzhiyun 	void (*init) (struct snd_ac97 *ac97);
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun struct snd_ac97_bus {
199*4882a593Smuzhiyun 	/* -- lowlevel (hardware) driver specific -- */
200*4882a593Smuzhiyun 	const struct snd_ac97_bus_ops *ops;
201*4882a593Smuzhiyun 	void *private_data;
202*4882a593Smuzhiyun 	void (*private_free) (struct snd_ac97_bus *bus);
203*4882a593Smuzhiyun 	/* --- */
204*4882a593Smuzhiyun 	struct snd_card *card;
205*4882a593Smuzhiyun 	unsigned short num;	/* bus number */
206*4882a593Smuzhiyun 	unsigned short no_vra: 1, /* bridge doesn't support VRA */
207*4882a593Smuzhiyun 		       dra: 1,	/* bridge supports double rate */
208*4882a593Smuzhiyun 		       isdin: 1;/* independent SDIN */
209*4882a593Smuzhiyun 	unsigned int clock;	/* AC'97 base clock (usually 48000Hz) */
210*4882a593Smuzhiyun 	spinlock_t bus_lock;	/* used mainly for slot allocation */
211*4882a593Smuzhiyun 	unsigned short used_slots[2][4]; /* actually used PCM slots */
212*4882a593Smuzhiyun 	unsigned short pcms_count; /* count of PCMs */
213*4882a593Smuzhiyun 	struct ac97_pcm *pcms;
214*4882a593Smuzhiyun 	struct snd_ac97 *codec[4];
215*4882a593Smuzhiyun 	struct snd_info_entry *proc;
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun /* static resolution table */
219*4882a593Smuzhiyun struct snd_ac97_res_table {
220*4882a593Smuzhiyun 	unsigned short reg;	/* register */
221*4882a593Smuzhiyun 	unsigned short bits;	/* resolution bitmask */
222*4882a593Smuzhiyun };
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun struct snd_ac97_template {
225*4882a593Smuzhiyun 	void *private_data;
226*4882a593Smuzhiyun 	void (*private_free) (struct snd_ac97 *ac97);
227*4882a593Smuzhiyun 	struct pci_dev *pci;	/* assigned PCI device - used for quirks */
228*4882a593Smuzhiyun 	unsigned short num;	/* number of codec: 0 = primary, 1 = secondary */
229*4882a593Smuzhiyun 	unsigned short addr;	/* physical address of codec [0-3] */
230*4882a593Smuzhiyun 	unsigned int scaps;	/* driver capabilities */
231*4882a593Smuzhiyun 	const struct snd_ac97_res_table *res_table;	/* static resolution */
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun struct snd_ac97 {
235*4882a593Smuzhiyun 	/* -- lowlevel (hardware) driver specific -- */
236*4882a593Smuzhiyun 	const struct snd_ac97_build_ops *build_ops;
237*4882a593Smuzhiyun 	void *private_data;
238*4882a593Smuzhiyun 	void (*private_free) (struct snd_ac97 *ac97);
239*4882a593Smuzhiyun 	/* --- */
240*4882a593Smuzhiyun 	struct snd_ac97_bus *bus;
241*4882a593Smuzhiyun 	struct pci_dev *pci;	/* assigned PCI device - used for quirks */
242*4882a593Smuzhiyun 	struct snd_info_entry *proc;
243*4882a593Smuzhiyun 	struct snd_info_entry *proc_regs;
244*4882a593Smuzhiyun 	unsigned short subsystem_vendor;
245*4882a593Smuzhiyun 	unsigned short subsystem_device;
246*4882a593Smuzhiyun 	struct mutex reg_mutex;
247*4882a593Smuzhiyun 	struct mutex page_mutex;	/* mutex for AD18xx multi-codecs and paging (2.3) */
248*4882a593Smuzhiyun 	unsigned short num;	/* number of codec: 0 = primary, 1 = secondary */
249*4882a593Smuzhiyun 	unsigned short addr;	/* physical address of codec [0-3] */
250*4882a593Smuzhiyun 	unsigned int id;	/* identification of codec */
251*4882a593Smuzhiyun 	unsigned short caps;	/* capabilities (register 0) */
252*4882a593Smuzhiyun 	unsigned short ext_id;	/* extended feature identification (register 28) */
253*4882a593Smuzhiyun 	unsigned short ext_mid;	/* extended modem ID (register 3C) */
254*4882a593Smuzhiyun 	const struct snd_ac97_res_table *res_table;	/* static resolution */
255*4882a593Smuzhiyun 	unsigned int scaps;	/* driver capabilities */
256*4882a593Smuzhiyun 	unsigned int flags;	/* specific code */
257*4882a593Smuzhiyun 	unsigned int rates[6];	/* see AC97_RATES_* defines */
258*4882a593Smuzhiyun 	unsigned int spdif_status;
259*4882a593Smuzhiyun 	unsigned short regs[0x80]; /* register cache */
260*4882a593Smuzhiyun 	DECLARE_BITMAP(reg_accessed, 0x80); /* bit flags */
261*4882a593Smuzhiyun 	union {			/* vendor specific code */
262*4882a593Smuzhiyun 		struct {
263*4882a593Smuzhiyun 			unsigned short unchained[3];	// 0 = C34, 1 = C79, 2 = C69
264*4882a593Smuzhiyun 			unsigned short chained[3];	// 0 = C34, 1 = C79, 2 = C69
265*4882a593Smuzhiyun 			unsigned short id[3];		// codec IDs (lower 16-bit word)
266*4882a593Smuzhiyun 			unsigned short pcmreg[3];	// PCM registers
267*4882a593Smuzhiyun 			unsigned short codec_cfg[3];	// CODEC_CFG bits
268*4882a593Smuzhiyun 			unsigned char swap_mic_linein;	// AD1986/AD1986A only
269*4882a593Smuzhiyun 			unsigned char lo_as_master;	/* LO as master */
270*4882a593Smuzhiyun 		} ad18xx;
271*4882a593Smuzhiyun 		unsigned int dev_flags;		/* device specific */
272*4882a593Smuzhiyun 	} spec;
273*4882a593Smuzhiyun 	/* jack-sharing info */
274*4882a593Smuzhiyun 	unsigned char indep_surround;
275*4882a593Smuzhiyun 	unsigned char channel_mode;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun #ifdef CONFIG_SND_AC97_POWER_SAVE
278*4882a593Smuzhiyun 	unsigned int power_up;	/* power states */
279*4882a593Smuzhiyun 	struct delayed_work power_work;
280*4882a593Smuzhiyun #endif
281*4882a593Smuzhiyun 	struct device dev;
282*4882a593Smuzhiyun 	struct snd_ac97_gpio_priv *gpio_priv;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	struct snd_pcm_chmap *chmaps[2]; /* channel-maps (optional) */
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun #define to_ac97_t(d) container_of(d, struct snd_ac97, dev)
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun /* conditions */
ac97_is_audio(struct snd_ac97 * ac97)290*4882a593Smuzhiyun static inline int ac97_is_audio(struct snd_ac97 * ac97)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	return (ac97->scaps & AC97_SCAP_AUDIO);
293*4882a593Smuzhiyun }
ac97_is_modem(struct snd_ac97 * ac97)294*4882a593Smuzhiyun static inline int ac97_is_modem(struct snd_ac97 * ac97)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun 	return (ac97->scaps & AC97_SCAP_MODEM);
297*4882a593Smuzhiyun }
ac97_is_rev22(struct snd_ac97 * ac97)298*4882a593Smuzhiyun static inline int ac97_is_rev22(struct snd_ac97 * ac97)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	return (ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_22;
301*4882a593Smuzhiyun }
ac97_can_amap(struct snd_ac97 * ac97)302*4882a593Smuzhiyun static inline int ac97_can_amap(struct snd_ac97 * ac97)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun 	return (ac97->ext_id & AC97_EI_AMAP) != 0;
305*4882a593Smuzhiyun }
ac97_can_spdif(struct snd_ac97 * ac97)306*4882a593Smuzhiyun static inline int ac97_can_spdif(struct snd_ac97 * ac97)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	return (ac97->ext_id & AC97_EI_SPDIF) != 0;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun /* functions */
312*4882a593Smuzhiyun /* create new AC97 bus */
313*4882a593Smuzhiyun int snd_ac97_bus(struct snd_card *card, int num,
314*4882a593Smuzhiyun 		 const struct snd_ac97_bus_ops *ops,
315*4882a593Smuzhiyun 		 void *private_data, struct snd_ac97_bus **rbus);
316*4882a593Smuzhiyun /* create mixer controls */
317*4882a593Smuzhiyun int snd_ac97_mixer(struct snd_ac97_bus *bus, struct snd_ac97_template *template,
318*4882a593Smuzhiyun 		   struct snd_ac97 **rac97);
319*4882a593Smuzhiyun const char *snd_ac97_get_short_name(struct snd_ac97 *ac97);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun void snd_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short value);
322*4882a593Smuzhiyun unsigned short snd_ac97_read(struct snd_ac97 *ac97, unsigned short reg);
323*4882a593Smuzhiyun void snd_ac97_write_cache(struct snd_ac97 *ac97, unsigned short reg, unsigned short value);
324*4882a593Smuzhiyun int snd_ac97_update(struct snd_ac97 *ac97, unsigned short reg, unsigned short value);
325*4882a593Smuzhiyun int snd_ac97_update_bits(struct snd_ac97 *ac97, unsigned short reg, unsigned short mask, unsigned short value);
326*4882a593Smuzhiyun #ifdef CONFIG_SND_AC97_POWER_SAVE
327*4882a593Smuzhiyun int snd_ac97_update_power(struct snd_ac97 *ac97, int reg, int powerup);
328*4882a593Smuzhiyun #else
snd_ac97_update_power(struct snd_ac97 * ac97,int reg,int powerup)329*4882a593Smuzhiyun static inline int snd_ac97_update_power(struct snd_ac97 *ac97, int reg,
330*4882a593Smuzhiyun 					int powerup)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun 	return 0;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun #endif
335*4882a593Smuzhiyun #ifdef CONFIG_PM
336*4882a593Smuzhiyun void snd_ac97_suspend(struct snd_ac97 *ac97);
337*4882a593Smuzhiyun void snd_ac97_resume(struct snd_ac97 *ac97);
338*4882a593Smuzhiyun #endif
339*4882a593Smuzhiyun int snd_ac97_reset(struct snd_ac97 *ac97, bool try_warm, unsigned int id,
340*4882a593Smuzhiyun 	unsigned int id_mask);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun /* quirk types */
343*4882a593Smuzhiyun enum {
344*4882a593Smuzhiyun 	AC97_TUNE_DEFAULT = -1,	/* use default from quirk list (not valid in list) */
345*4882a593Smuzhiyun 	AC97_TUNE_NONE = 0,	/* nothing extra to do */
346*4882a593Smuzhiyun 	AC97_TUNE_HP_ONLY,	/* headphone (true line-out) control as master only */
347*4882a593Smuzhiyun 	AC97_TUNE_SWAP_HP,	/* swap headphone and master controls */
348*4882a593Smuzhiyun 	AC97_TUNE_SWAP_SURROUND, /* swap master and surround controls */
349*4882a593Smuzhiyun 	AC97_TUNE_AD_SHARING,	/* for AD1985, turn on OMS bit and use headphone */
350*4882a593Smuzhiyun 	AC97_TUNE_ALC_JACK,	/* for Realtek, enable JACK detection */
351*4882a593Smuzhiyun 	AC97_TUNE_INV_EAPD,	/* inverted EAPD implementation */
352*4882a593Smuzhiyun 	AC97_TUNE_MUTE_LED,	/* EAPD bit works as mute LED */
353*4882a593Smuzhiyun 	AC97_TUNE_HP_MUTE_LED,  /* EAPD bit works as mute LED, use headphone control as master */
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun struct ac97_quirk {
357*4882a593Smuzhiyun 	unsigned short subvendor; /* PCI subsystem vendor id */
358*4882a593Smuzhiyun 	unsigned short subdevice; /* PCI subsystem device id */
359*4882a593Smuzhiyun 	unsigned short mask;	/* device id bit mask, 0 = accept all */
360*4882a593Smuzhiyun 	unsigned int codec_id;	/* codec id (if any), 0 = accept all */
361*4882a593Smuzhiyun 	const char *name;	/* name shown as info */
362*4882a593Smuzhiyun 	int type;		/* quirk type above */
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun int snd_ac97_tune_hardware(struct snd_ac97 *ac97,
366*4882a593Smuzhiyun 			   const struct ac97_quirk *quirk,
367*4882a593Smuzhiyun 			   const char *override);
368*4882a593Smuzhiyun int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate);
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun /*
371*4882a593Smuzhiyun  * PCM allocation
372*4882a593Smuzhiyun  */
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun enum ac97_pcm_cfg {
375*4882a593Smuzhiyun 	AC97_PCM_CFG_FRONT = 2,
376*4882a593Smuzhiyun 	AC97_PCM_CFG_REAR = 10,		/* alias surround */
377*4882a593Smuzhiyun 	AC97_PCM_CFG_LFE = 11,		/* center + lfe */
378*4882a593Smuzhiyun 	AC97_PCM_CFG_40 = 4,		/* front + rear */
379*4882a593Smuzhiyun 	AC97_PCM_CFG_51 = 6,		/* front + rear + center/lfe */
380*4882a593Smuzhiyun 	AC97_PCM_CFG_SPDIF = 20
381*4882a593Smuzhiyun };
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun struct ac97_pcm {
384*4882a593Smuzhiyun 	struct snd_ac97_bus *bus;
385*4882a593Smuzhiyun 	unsigned int stream: 1,	   	   /* stream type: 1 = capture */
386*4882a593Smuzhiyun 		     exclusive: 1,	   /* exclusive mode, don't override with other pcms */
387*4882a593Smuzhiyun 		     copy_flag: 1,	   /* lowlevel driver must fill all entries */
388*4882a593Smuzhiyun 		     spdif: 1;		   /* spdif pcm */
389*4882a593Smuzhiyun 	unsigned short aslots;		   /* active slots */
390*4882a593Smuzhiyun 	unsigned short cur_dbl;		   /* current double-rate state */
391*4882a593Smuzhiyun 	unsigned int rates;		   /* available rates */
392*4882a593Smuzhiyun 	struct {
393*4882a593Smuzhiyun 		unsigned short slots;	   /* driver input: requested AC97 slot numbers */
394*4882a593Smuzhiyun 		unsigned short rslots[4];  /* allocated slots per codecs */
395*4882a593Smuzhiyun 		unsigned char rate_table[4];
396*4882a593Smuzhiyun 		struct snd_ac97 *codec[4];	   /* allocated codecs */
397*4882a593Smuzhiyun 	} r[2];				   /* 0 = standard rates, 1 = double rates */
398*4882a593Smuzhiyun 	unsigned long private_value;	   /* used by the hardware driver */
399*4882a593Smuzhiyun };
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun int snd_ac97_pcm_assign(struct snd_ac97_bus *ac97,
402*4882a593Smuzhiyun 			unsigned short pcms_count,
403*4882a593Smuzhiyun 			const struct ac97_pcm *pcms);
404*4882a593Smuzhiyun int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
405*4882a593Smuzhiyun 		      enum ac97_pcm_cfg cfg, unsigned short slots);
406*4882a593Smuzhiyun int snd_ac97_pcm_close(struct ac97_pcm *pcm);
407*4882a593Smuzhiyun int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime);
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun /* ad hoc AC97 device driver access */
410*4882a593Smuzhiyun extern struct bus_type ac97_bus_type;
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun /* AC97 platform_data adding function */
snd_ac97_dev_add_pdata(struct snd_ac97 * ac97,void * data)413*4882a593Smuzhiyun static inline void snd_ac97_dev_add_pdata(struct snd_ac97 *ac97, void *data)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun 	ac97->dev.platform_data = data;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun #endif /* __SOUND_AC97_CODEC_H */
419