1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2014 NVIDIA Corporation 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __SOC_TEGRA_PM_H__ 7*4882a593Smuzhiyun #define __SOC_TEGRA_PM_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/errno.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum tegra_suspend_mode { 12*4882a593Smuzhiyun TEGRA_SUSPEND_NONE = 0, 13*4882a593Smuzhiyun TEGRA_SUSPEND_LP2, /* CPU voltage off */ 14*4882a593Smuzhiyun TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */ 15*4882a593Smuzhiyun TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */ 16*4882a593Smuzhiyun TEGRA_MAX_SUSPEND_MODE, 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) 20*4882a593Smuzhiyun enum tegra_suspend_mode 21*4882a593Smuzhiyun tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* low-level resume entry point */ 24*4882a593Smuzhiyun void tegra_resume(void); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun int tegra30_pm_secondary_cpu_suspend(unsigned long arg); 27*4882a593Smuzhiyun void tegra_pm_clear_cpu_in_lp2(void); 28*4882a593Smuzhiyun void tegra_pm_set_cpu_in_lp2(void); 29*4882a593Smuzhiyun int tegra_pm_enter_lp2(void); 30*4882a593Smuzhiyun int tegra_pm_park_secondary_cpu(unsigned long cpu); 31*4882a593Smuzhiyun #else 32*4882a593Smuzhiyun static inline enum tegra_suspend_mode tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)33*4882a593Smuzhiyuntegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) 34*4882a593Smuzhiyun { 35*4882a593Smuzhiyun return TEGRA_SUSPEND_NONE; 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun tegra_resume(void)38*4882a593Smuzhiyunstatic inline void tegra_resume(void) 39*4882a593Smuzhiyun { 40*4882a593Smuzhiyun } 41*4882a593Smuzhiyun tegra30_pm_secondary_cpu_suspend(unsigned long arg)42*4882a593Smuzhiyunstatic inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg) 43*4882a593Smuzhiyun { 44*4882a593Smuzhiyun return -ENOTSUPP; 45*4882a593Smuzhiyun } 46*4882a593Smuzhiyun tegra_pm_clear_cpu_in_lp2(void)47*4882a593Smuzhiyunstatic inline void tegra_pm_clear_cpu_in_lp2(void) 48*4882a593Smuzhiyun { 49*4882a593Smuzhiyun } 50*4882a593Smuzhiyun tegra_pm_set_cpu_in_lp2(void)51*4882a593Smuzhiyunstatic inline void tegra_pm_set_cpu_in_lp2(void) 52*4882a593Smuzhiyun { 53*4882a593Smuzhiyun } 54*4882a593Smuzhiyun tegra_pm_enter_lp2(void)55*4882a593Smuzhiyunstatic inline int tegra_pm_enter_lp2(void) 56*4882a593Smuzhiyun { 57*4882a593Smuzhiyun return -ENOTSUPP; 58*4882a593Smuzhiyun } 59*4882a593Smuzhiyun tegra_pm_park_secondary_cpu(unsigned long cpu)60*4882a593Smuzhiyunstatic inline int tegra_pm_park_secondary_cpu(unsigned long cpu) 61*4882a593Smuzhiyun { 62*4882a593Smuzhiyun return -ENOTSUPP; 63*4882a593Smuzhiyun } 64*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #endif /* __SOC_TEGRA_PM_H__ */ 67