1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2014 NVIDIA Corporation. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __SOC_TEGRA_EMC_H__ 7*4882a593Smuzhiyun #define __SOC_TEGRA_EMC_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun struct tegra_emc; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun int tegra_emc_prepare_timing_change(struct tegra_emc *emc, 12*4882a593Smuzhiyun unsigned long rate); 13*4882a593Smuzhiyun void tegra_emc_complete_timing_change(struct tegra_emc *emc, 14*4882a593Smuzhiyun unsigned long rate); 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #endif /* __SOC_TEGRA_EMC_H__ */ 17