xref: /OK3568_Linux_fs/kernel/include/soc/tegra/bpmp.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef __SOC_TEGRA_BPMP_H
7*4882a593Smuzhiyun #define __SOC_TEGRA_BPMP_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/mailbox_client.h>
10*4882a593Smuzhiyun #include <linux/pm_domain.h>
11*4882a593Smuzhiyun #include <linux/reset-controller.h>
12*4882a593Smuzhiyun #include <linux/semaphore.h>
13*4882a593Smuzhiyun #include <linux/types.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <soc/tegra/bpmp-abi.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct tegra_bpmp_clk;
18*4882a593Smuzhiyun struct tegra_bpmp_ops;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun struct tegra_bpmp_soc {
21*4882a593Smuzhiyun 	struct {
22*4882a593Smuzhiyun 		struct {
23*4882a593Smuzhiyun 			unsigned int offset;
24*4882a593Smuzhiyun 			unsigned int count;
25*4882a593Smuzhiyun 			unsigned int timeout;
26*4882a593Smuzhiyun 		} cpu_tx, thread, cpu_rx;
27*4882a593Smuzhiyun 	} channels;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	const struct tegra_bpmp_ops *ops;
30*4882a593Smuzhiyun 	unsigned int num_resets;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct tegra_bpmp_mb_data {
34*4882a593Smuzhiyun 	u32 code;
35*4882a593Smuzhiyun 	u32 flags;
36*4882a593Smuzhiyun 	u8 data[MSG_DATA_MIN_SZ];
37*4882a593Smuzhiyun } __packed;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct tegra_bpmp_channel {
40*4882a593Smuzhiyun 	struct tegra_bpmp *bpmp;
41*4882a593Smuzhiyun 	struct tegra_bpmp_mb_data *ib;
42*4882a593Smuzhiyun 	struct tegra_bpmp_mb_data *ob;
43*4882a593Smuzhiyun 	struct completion completion;
44*4882a593Smuzhiyun 	struct tegra_ivc *ivc;
45*4882a593Smuzhiyun 	unsigned int index;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun typedef void (*tegra_bpmp_mrq_handler_t)(unsigned int mrq,
49*4882a593Smuzhiyun 					 struct tegra_bpmp_channel *channel,
50*4882a593Smuzhiyun 					 void *data);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun struct tegra_bpmp_mrq {
53*4882a593Smuzhiyun 	struct list_head list;
54*4882a593Smuzhiyun 	unsigned int mrq;
55*4882a593Smuzhiyun 	tegra_bpmp_mrq_handler_t handler;
56*4882a593Smuzhiyun 	void *data;
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun struct tegra_bpmp {
60*4882a593Smuzhiyun 	const struct tegra_bpmp_soc *soc;
61*4882a593Smuzhiyun 	struct device *dev;
62*4882a593Smuzhiyun 	void *priv;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	struct {
65*4882a593Smuzhiyun 		struct mbox_client client;
66*4882a593Smuzhiyun 		struct mbox_chan *channel;
67*4882a593Smuzhiyun 	} mbox;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	spinlock_t atomic_tx_lock;
70*4882a593Smuzhiyun 	struct tegra_bpmp_channel *tx_channel, *rx_channel, *threaded_channels;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	struct {
73*4882a593Smuzhiyun 		unsigned long *allocated;
74*4882a593Smuzhiyun 		unsigned long *busy;
75*4882a593Smuzhiyun 		unsigned int count;
76*4882a593Smuzhiyun 		struct semaphore lock;
77*4882a593Smuzhiyun 	} threaded;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	struct list_head mrqs;
80*4882a593Smuzhiyun 	spinlock_t lock;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	struct tegra_bpmp_clk **clocks;
83*4882a593Smuzhiyun 	unsigned int num_clocks;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	struct reset_controller_dev rstc;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	struct genpd_onecell_data genpd;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
90*4882a593Smuzhiyun 	struct dentry *debugfs_mirror;
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun struct tegra_bpmp_message {
95*4882a593Smuzhiyun 	unsigned int mrq;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	struct {
98*4882a593Smuzhiyun 		const void *data;
99*4882a593Smuzhiyun 		size_t size;
100*4882a593Smuzhiyun 	} tx;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	struct {
103*4882a593Smuzhiyun 		void *data;
104*4882a593Smuzhiyun 		size_t size;
105*4882a593Smuzhiyun 		int ret;
106*4882a593Smuzhiyun 	} rx;
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_TEGRA_BPMP)
110*4882a593Smuzhiyun struct tegra_bpmp *tegra_bpmp_get(struct device *dev);
111*4882a593Smuzhiyun void tegra_bpmp_put(struct tegra_bpmp *bpmp);
112*4882a593Smuzhiyun int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp,
113*4882a593Smuzhiyun 			       struct tegra_bpmp_message *msg);
114*4882a593Smuzhiyun int tegra_bpmp_transfer(struct tegra_bpmp *bpmp,
115*4882a593Smuzhiyun 			struct tegra_bpmp_message *msg);
116*4882a593Smuzhiyun void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code,
117*4882a593Smuzhiyun 			   const void *data, size_t size);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp, unsigned int mrq,
120*4882a593Smuzhiyun 			   tegra_bpmp_mrq_handler_t handler, void *data);
121*4882a593Smuzhiyun void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq,
122*4882a593Smuzhiyun 			 void *data);
123*4882a593Smuzhiyun bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq);
124*4882a593Smuzhiyun #else
tegra_bpmp_get(struct device * dev)125*4882a593Smuzhiyun static inline struct tegra_bpmp *tegra_bpmp_get(struct device *dev)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	return ERR_PTR(-ENOTSUPP);
128*4882a593Smuzhiyun }
tegra_bpmp_put(struct tegra_bpmp * bpmp)129*4882a593Smuzhiyun static inline void tegra_bpmp_put(struct tegra_bpmp *bpmp)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun }
tegra_bpmp_transfer_atomic(struct tegra_bpmp * bpmp,struct tegra_bpmp_message * msg)132*4882a593Smuzhiyun static inline int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp,
133*4882a593Smuzhiyun 					     struct tegra_bpmp_message *msg)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	return -ENOTSUPP;
136*4882a593Smuzhiyun }
tegra_bpmp_transfer(struct tegra_bpmp * bpmp,struct tegra_bpmp_message * msg)137*4882a593Smuzhiyun static inline int tegra_bpmp_transfer(struct tegra_bpmp *bpmp,
138*4882a593Smuzhiyun 				      struct tegra_bpmp_message *msg)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	return -ENOTSUPP;
141*4882a593Smuzhiyun }
tegra_bpmp_mrq_return(struct tegra_bpmp_channel * channel,int code,const void * data,size_t size)142*4882a593Smuzhiyun static inline void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel,
143*4882a593Smuzhiyun 					 int code, const void *data,
144*4882a593Smuzhiyun 					 size_t size)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
tegra_bpmp_request_mrq(struct tegra_bpmp * bpmp,unsigned int mrq,tegra_bpmp_mrq_handler_t handler,void * data)148*4882a593Smuzhiyun static inline int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp,
149*4882a593Smuzhiyun 					 unsigned int mrq,
150*4882a593Smuzhiyun 					 tegra_bpmp_mrq_handler_t handler,
151*4882a593Smuzhiyun 					 void *data)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	return -ENOTSUPP;
154*4882a593Smuzhiyun }
tegra_bpmp_free_mrq(struct tegra_bpmp * bpmp,unsigned int mrq,void * data)155*4882a593Smuzhiyun static inline void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp,
156*4882a593Smuzhiyun 				       unsigned int mrq, void *data)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
tegra_bpmp_mrq_is_supported(struct tegra_bpmp * bpmp,unsigned int mrq)160*4882a593Smuzhiyun static inline bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp,
161*4882a593Smuzhiyun 					      unsigned int mrq)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	return false;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun #endif
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun void tegra_bpmp_handle_rx(struct tegra_bpmp *bpmp);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_CLK_TEGRA_BPMP)
170*4882a593Smuzhiyun int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp);
171*4882a593Smuzhiyun #else
tegra_bpmp_init_clocks(struct tegra_bpmp * bpmp)172*4882a593Smuzhiyun static inline int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun #endif
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_RESET_TEGRA_BPMP)
179*4882a593Smuzhiyun int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp);
180*4882a593Smuzhiyun #else
tegra_bpmp_init_resets(struct tegra_bpmp * bpmp)181*4882a593Smuzhiyun static inline int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	return 0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun #endif
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SOC_TEGRA_POWERGATE_BPMP)
188*4882a593Smuzhiyun int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp);
189*4882a593Smuzhiyun #else
tegra_bpmp_init_powergates(struct tegra_bpmp * bpmp)190*4882a593Smuzhiyun static inline int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	return 0;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun #endif
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_DEBUG_FS)
197*4882a593Smuzhiyun int tegra_bpmp_init_debugfs(struct tegra_bpmp *bpmp);
198*4882a593Smuzhiyun #else
tegra_bpmp_init_debugfs(struct tegra_bpmp * bpmp)199*4882a593Smuzhiyun static inline int tegra_bpmp_init_debugfs(struct tegra_bpmp *bpmp)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	return 0;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun #endif
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun #endif /* __SOC_TEGRA_BPMP_H */
207