xref: /OK3568_Linux_fs/kernel/include/soc/rockchip/rockchip_iommu.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2021 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #ifndef __SOC_ROCKCHIP_IOMMU_H
6*4882a593Smuzhiyun #define __SOC_ROCKCHIP_IOMMU_H
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun struct device;
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #if IS_REACHABLE(CONFIG_ROCKCHIP_IOMMU)
11*4882a593Smuzhiyun int rockchip_iommu_enable(struct device *dev);
12*4882a593Smuzhiyun int rockchip_iommu_disable(struct device *dev);
13*4882a593Smuzhiyun int rockchip_pagefault_done(struct device *master_dev);
14*4882a593Smuzhiyun void __iomem *rockchip_get_iommu_base(struct device *master_dev, int idx);
15*4882a593Smuzhiyun bool rockchip_iommu_is_enabled(struct device *dev);
16*4882a593Smuzhiyun void rockchip_iommu_mask_irq(struct device *dev);
17*4882a593Smuzhiyun void rockchip_iommu_unmask_irq(struct device *dev);
18*4882a593Smuzhiyun int rockchip_iommu_force_reset(struct device *dev);
19*4882a593Smuzhiyun #else
rockchip_iommu_enable(struct device * dev)20*4882a593Smuzhiyun static inline int rockchip_iommu_enable(struct device *dev)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun 	return -ENODEV;
23*4882a593Smuzhiyun }
rockchip_iommu_disable(struct device * dev)24*4882a593Smuzhiyun static inline int rockchip_iommu_disable(struct device *dev)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun 	return -ENODEV;
27*4882a593Smuzhiyun }
rockchip_pagefault_done(struct device * master_dev)28*4882a593Smuzhiyun static inline int rockchip_pagefault_done(struct device *master_dev)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	return 0;
31*4882a593Smuzhiyun }
rockchip_get_iommu_base(struct device * master_dev,int idx)32*4882a593Smuzhiyun static inline void __iomem *rockchip_get_iommu_base(struct device *master_dev, int idx)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	return NULL;
35*4882a593Smuzhiyun }
rockchip_iommu_is_enabled(struct device * dev)36*4882a593Smuzhiyun static inline bool rockchip_iommu_is_enabled(struct device *dev)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	return false;
39*4882a593Smuzhiyun }
rockchip_iommu_mask_irq(struct device * dev)40*4882a593Smuzhiyun static inline void rockchip_iommu_mask_irq(struct device *dev)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun }
rockchip_iommu_unmask_irq(struct device * dev)43*4882a593Smuzhiyun static inline void rockchip_iommu_unmask_irq(struct device *dev)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun }
rockchip_iommu_force_reset(struct device * dev)46*4882a593Smuzhiyun static inline int rockchip_iommu_force_reset(struct device *dev)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	return -ENODEV;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #endif
53