1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
4*4882a593Smuzhiyun * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
5*4882a593Smuzhiyun * Copyright (c) 2004 Intel Corporation. All rights reserved.
6*4882a593Smuzhiyun * Copyright (c) 2004 Topspin Corporation. All rights reserved.
7*4882a593Smuzhiyun * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
8*4882a593Smuzhiyun * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
9*4882a593Smuzhiyun * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #ifndef IB_VERBS_H
13*4882a593Smuzhiyun #define IB_VERBS_H
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/types.h>
16*4882a593Smuzhiyun #include <linux/device.h>
17*4882a593Smuzhiyun #include <linux/dma-mapping.h>
18*4882a593Smuzhiyun #include <linux/kref.h>
19*4882a593Smuzhiyun #include <linux/list.h>
20*4882a593Smuzhiyun #include <linux/rwsem.h>
21*4882a593Smuzhiyun #include <linux/workqueue.h>
22*4882a593Smuzhiyun #include <linux/irq_poll.h>
23*4882a593Smuzhiyun #include <uapi/linux/if_ether.h>
24*4882a593Smuzhiyun #include <net/ipv6.h>
25*4882a593Smuzhiyun #include <net/ip.h>
26*4882a593Smuzhiyun #include <linux/string.h>
27*4882a593Smuzhiyun #include <linux/slab.h>
28*4882a593Smuzhiyun #include <linux/netdevice.h>
29*4882a593Smuzhiyun #include <linux/refcount.h>
30*4882a593Smuzhiyun #include <linux/if_link.h>
31*4882a593Smuzhiyun #include <linux/atomic.h>
32*4882a593Smuzhiyun #include <linux/mmu_notifier.h>
33*4882a593Smuzhiyun #include <linux/uaccess.h>
34*4882a593Smuzhiyun #include <linux/cgroup_rdma.h>
35*4882a593Smuzhiyun #include <linux/irqflags.h>
36*4882a593Smuzhiyun #include <linux/preempt.h>
37*4882a593Smuzhiyun #include <linux/dim.h>
38*4882a593Smuzhiyun #include <uapi/rdma/ib_user_verbs.h>
39*4882a593Smuzhiyun #include <rdma/rdma_counter.h>
40*4882a593Smuzhiyun #include <rdma/restrack.h>
41*4882a593Smuzhiyun #include <rdma/signature.h>
42*4882a593Smuzhiyun #include <uapi/rdma/rdma_user_ioctl.h>
43*4882a593Smuzhiyun #include <uapi/rdma/ib_user_ioctl_verbs.h>
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define IB_FW_VERSION_NAME_MAX ETHTOOL_FWVERS_LEN
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct ib_umem_odp;
48*4882a593Smuzhiyun struct ib_uqp_object;
49*4882a593Smuzhiyun struct ib_usrq_object;
50*4882a593Smuzhiyun struct ib_uwq_object;
51*4882a593Smuzhiyun struct rdma_cm_id;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun extern struct workqueue_struct *ib_wq;
54*4882a593Smuzhiyun extern struct workqueue_struct *ib_comp_wq;
55*4882a593Smuzhiyun extern struct workqueue_struct *ib_comp_unbound_wq;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun struct ib_ucq_object;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun __printf(3, 4) __cold
60*4882a593Smuzhiyun void ibdev_printk(const char *level, const struct ib_device *ibdev,
61*4882a593Smuzhiyun const char *format, ...);
62*4882a593Smuzhiyun __printf(2, 3) __cold
63*4882a593Smuzhiyun void ibdev_emerg(const struct ib_device *ibdev, const char *format, ...);
64*4882a593Smuzhiyun __printf(2, 3) __cold
65*4882a593Smuzhiyun void ibdev_alert(const struct ib_device *ibdev, const char *format, ...);
66*4882a593Smuzhiyun __printf(2, 3) __cold
67*4882a593Smuzhiyun void ibdev_crit(const struct ib_device *ibdev, const char *format, ...);
68*4882a593Smuzhiyun __printf(2, 3) __cold
69*4882a593Smuzhiyun void ibdev_err(const struct ib_device *ibdev, const char *format, ...);
70*4882a593Smuzhiyun __printf(2, 3) __cold
71*4882a593Smuzhiyun void ibdev_warn(const struct ib_device *ibdev, const char *format, ...);
72*4882a593Smuzhiyun __printf(2, 3) __cold
73*4882a593Smuzhiyun void ibdev_notice(const struct ib_device *ibdev, const char *format, ...);
74*4882a593Smuzhiyun __printf(2, 3) __cold
75*4882a593Smuzhiyun void ibdev_info(const struct ib_device *ibdev, const char *format, ...);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun #if defined(CONFIG_DYNAMIC_DEBUG) || \
78*4882a593Smuzhiyun (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE))
79*4882a593Smuzhiyun #define ibdev_dbg(__dev, format, args...) \
80*4882a593Smuzhiyun dynamic_ibdev_dbg(__dev, format, ##args)
81*4882a593Smuzhiyun #else
82*4882a593Smuzhiyun __printf(2, 3) __cold
83*4882a593Smuzhiyun static inline
ibdev_dbg(const struct ib_device * ibdev,const char * format,...)84*4882a593Smuzhiyun void ibdev_dbg(const struct ib_device *ibdev, const char *format, ...) {}
85*4882a593Smuzhiyun #endif
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun #define ibdev_level_ratelimited(ibdev_level, ibdev, fmt, ...) \
88*4882a593Smuzhiyun do { \
89*4882a593Smuzhiyun static DEFINE_RATELIMIT_STATE(_rs, \
90*4882a593Smuzhiyun DEFAULT_RATELIMIT_INTERVAL, \
91*4882a593Smuzhiyun DEFAULT_RATELIMIT_BURST); \
92*4882a593Smuzhiyun if (__ratelimit(&_rs)) \
93*4882a593Smuzhiyun ibdev_level(ibdev, fmt, ##__VA_ARGS__); \
94*4882a593Smuzhiyun } while (0)
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #define ibdev_emerg_ratelimited(ibdev, fmt, ...) \
97*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_emerg, ibdev, fmt, ##__VA_ARGS__)
98*4882a593Smuzhiyun #define ibdev_alert_ratelimited(ibdev, fmt, ...) \
99*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_alert, ibdev, fmt, ##__VA_ARGS__)
100*4882a593Smuzhiyun #define ibdev_crit_ratelimited(ibdev, fmt, ...) \
101*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_crit, ibdev, fmt, ##__VA_ARGS__)
102*4882a593Smuzhiyun #define ibdev_err_ratelimited(ibdev, fmt, ...) \
103*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_err, ibdev, fmt, ##__VA_ARGS__)
104*4882a593Smuzhiyun #define ibdev_warn_ratelimited(ibdev, fmt, ...) \
105*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_warn, ibdev, fmt, ##__VA_ARGS__)
106*4882a593Smuzhiyun #define ibdev_notice_ratelimited(ibdev, fmt, ...) \
107*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_notice, ibdev, fmt, ##__VA_ARGS__)
108*4882a593Smuzhiyun #define ibdev_info_ratelimited(ibdev, fmt, ...) \
109*4882a593Smuzhiyun ibdev_level_ratelimited(ibdev_info, ibdev, fmt, ##__VA_ARGS__)
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun #if defined(CONFIG_DYNAMIC_DEBUG) || \
112*4882a593Smuzhiyun (defined(CONFIG_DYNAMIC_DEBUG_CORE) && defined(DYNAMIC_DEBUG_MODULE))
113*4882a593Smuzhiyun /* descriptor check is first to prevent flooding with "callbacks suppressed" */
114*4882a593Smuzhiyun #define ibdev_dbg_ratelimited(ibdev, fmt, ...) \
115*4882a593Smuzhiyun do { \
116*4882a593Smuzhiyun static DEFINE_RATELIMIT_STATE(_rs, \
117*4882a593Smuzhiyun DEFAULT_RATELIMIT_INTERVAL, \
118*4882a593Smuzhiyun DEFAULT_RATELIMIT_BURST); \
119*4882a593Smuzhiyun DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt); \
120*4882a593Smuzhiyun if (DYNAMIC_DEBUG_BRANCH(descriptor) && __ratelimit(&_rs)) \
121*4882a593Smuzhiyun __dynamic_ibdev_dbg(&descriptor, ibdev, fmt, \
122*4882a593Smuzhiyun ##__VA_ARGS__); \
123*4882a593Smuzhiyun } while (0)
124*4882a593Smuzhiyun #else
125*4882a593Smuzhiyun __printf(2, 3) __cold
126*4882a593Smuzhiyun static inline
ibdev_dbg_ratelimited(const struct ib_device * ibdev,const char * format,...)127*4882a593Smuzhiyun void ibdev_dbg_ratelimited(const struct ib_device *ibdev, const char *format, ...) {}
128*4882a593Smuzhiyun #endif
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun union ib_gid {
131*4882a593Smuzhiyun u8 raw[16];
132*4882a593Smuzhiyun struct {
133*4882a593Smuzhiyun __be64 subnet_prefix;
134*4882a593Smuzhiyun __be64 interface_id;
135*4882a593Smuzhiyun } global;
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun extern union ib_gid zgid;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun enum ib_gid_type {
141*4882a593Smuzhiyun IB_GID_TYPE_IB = IB_UVERBS_GID_TYPE_IB,
142*4882a593Smuzhiyun IB_GID_TYPE_ROCE = IB_UVERBS_GID_TYPE_ROCE_V1,
143*4882a593Smuzhiyun IB_GID_TYPE_ROCE_UDP_ENCAP = IB_UVERBS_GID_TYPE_ROCE_V2,
144*4882a593Smuzhiyun IB_GID_TYPE_SIZE
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun #define ROCE_V2_UDP_DPORT 4791
148*4882a593Smuzhiyun struct ib_gid_attr {
149*4882a593Smuzhiyun struct net_device __rcu *ndev;
150*4882a593Smuzhiyun struct ib_device *device;
151*4882a593Smuzhiyun union ib_gid gid;
152*4882a593Smuzhiyun enum ib_gid_type gid_type;
153*4882a593Smuzhiyun u16 index;
154*4882a593Smuzhiyun u8 port_num;
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun enum {
158*4882a593Smuzhiyun /* set the local administered indication */
159*4882a593Smuzhiyun IB_SA_WELL_KNOWN_GUID = BIT_ULL(57) | 2,
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun enum rdma_transport_type {
163*4882a593Smuzhiyun RDMA_TRANSPORT_IB,
164*4882a593Smuzhiyun RDMA_TRANSPORT_IWARP,
165*4882a593Smuzhiyun RDMA_TRANSPORT_USNIC,
166*4882a593Smuzhiyun RDMA_TRANSPORT_USNIC_UDP,
167*4882a593Smuzhiyun RDMA_TRANSPORT_UNSPECIFIED,
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun enum rdma_protocol_type {
171*4882a593Smuzhiyun RDMA_PROTOCOL_IB,
172*4882a593Smuzhiyun RDMA_PROTOCOL_IBOE,
173*4882a593Smuzhiyun RDMA_PROTOCOL_IWARP,
174*4882a593Smuzhiyun RDMA_PROTOCOL_USNIC_UDP
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun __attribute_const__ enum rdma_transport_type
178*4882a593Smuzhiyun rdma_node_get_transport(unsigned int node_type);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun enum rdma_network_type {
181*4882a593Smuzhiyun RDMA_NETWORK_IB,
182*4882a593Smuzhiyun RDMA_NETWORK_ROCE_V1,
183*4882a593Smuzhiyun RDMA_NETWORK_IPV4,
184*4882a593Smuzhiyun RDMA_NETWORK_IPV6
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
ib_network_to_gid_type(enum rdma_network_type network_type)187*4882a593Smuzhiyun static inline enum ib_gid_type ib_network_to_gid_type(enum rdma_network_type network_type)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun if (network_type == RDMA_NETWORK_IPV4 ||
190*4882a593Smuzhiyun network_type == RDMA_NETWORK_IPV6)
191*4882a593Smuzhiyun return IB_GID_TYPE_ROCE_UDP_ENCAP;
192*4882a593Smuzhiyun else if (network_type == RDMA_NETWORK_ROCE_V1)
193*4882a593Smuzhiyun return IB_GID_TYPE_ROCE;
194*4882a593Smuzhiyun else
195*4882a593Smuzhiyun return IB_GID_TYPE_IB;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun static inline enum rdma_network_type
rdma_gid_attr_network_type(const struct ib_gid_attr * attr)199*4882a593Smuzhiyun rdma_gid_attr_network_type(const struct ib_gid_attr *attr)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun if (attr->gid_type == IB_GID_TYPE_IB)
202*4882a593Smuzhiyun return RDMA_NETWORK_IB;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (attr->gid_type == IB_GID_TYPE_ROCE)
205*4882a593Smuzhiyun return RDMA_NETWORK_ROCE_V1;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (ipv6_addr_v4mapped((struct in6_addr *)&attr->gid))
208*4882a593Smuzhiyun return RDMA_NETWORK_IPV4;
209*4882a593Smuzhiyun else
210*4882a593Smuzhiyun return RDMA_NETWORK_IPV6;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun enum rdma_link_layer {
214*4882a593Smuzhiyun IB_LINK_LAYER_UNSPECIFIED,
215*4882a593Smuzhiyun IB_LINK_LAYER_INFINIBAND,
216*4882a593Smuzhiyun IB_LINK_LAYER_ETHERNET,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun enum ib_device_cap_flags {
220*4882a593Smuzhiyun IB_DEVICE_RESIZE_MAX_WR = (1 << 0),
221*4882a593Smuzhiyun IB_DEVICE_BAD_PKEY_CNTR = (1 << 1),
222*4882a593Smuzhiyun IB_DEVICE_BAD_QKEY_CNTR = (1 << 2),
223*4882a593Smuzhiyun IB_DEVICE_RAW_MULTI = (1 << 3),
224*4882a593Smuzhiyun IB_DEVICE_AUTO_PATH_MIG = (1 << 4),
225*4882a593Smuzhiyun IB_DEVICE_CHANGE_PHY_PORT = (1 << 5),
226*4882a593Smuzhiyun IB_DEVICE_UD_AV_PORT_ENFORCE = (1 << 6),
227*4882a593Smuzhiyun IB_DEVICE_CURR_QP_STATE_MOD = (1 << 7),
228*4882a593Smuzhiyun IB_DEVICE_SHUTDOWN_PORT = (1 << 8),
229*4882a593Smuzhiyun /* Not in use, former INIT_TYPE = (1 << 9),*/
230*4882a593Smuzhiyun IB_DEVICE_PORT_ACTIVE_EVENT = (1 << 10),
231*4882a593Smuzhiyun IB_DEVICE_SYS_IMAGE_GUID = (1 << 11),
232*4882a593Smuzhiyun IB_DEVICE_RC_RNR_NAK_GEN = (1 << 12),
233*4882a593Smuzhiyun IB_DEVICE_SRQ_RESIZE = (1 << 13),
234*4882a593Smuzhiyun IB_DEVICE_N_NOTIFY_CQ = (1 << 14),
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /*
237*4882a593Smuzhiyun * This device supports a per-device lkey or stag that can be
238*4882a593Smuzhiyun * used without performing a memory registration for the local
239*4882a593Smuzhiyun * memory. Note that ULPs should never check this flag, but
240*4882a593Smuzhiyun * instead of use the local_dma_lkey flag in the ib_pd structure,
241*4882a593Smuzhiyun * which will always contain a usable lkey.
242*4882a593Smuzhiyun */
243*4882a593Smuzhiyun IB_DEVICE_LOCAL_DMA_LKEY = (1 << 15),
244*4882a593Smuzhiyun /* Reserved, old SEND_W_INV = (1 << 16),*/
245*4882a593Smuzhiyun IB_DEVICE_MEM_WINDOW = (1 << 17),
246*4882a593Smuzhiyun /*
247*4882a593Smuzhiyun * Devices should set IB_DEVICE_UD_IP_SUM if they support
248*4882a593Smuzhiyun * insertion of UDP and TCP checksum on outgoing UD IPoIB
249*4882a593Smuzhiyun * messages and can verify the validity of checksum for
250*4882a593Smuzhiyun * incoming messages. Setting this flag implies that the
251*4882a593Smuzhiyun * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
252*4882a593Smuzhiyun */
253*4882a593Smuzhiyun IB_DEVICE_UD_IP_CSUM = (1 << 18),
254*4882a593Smuzhiyun IB_DEVICE_UD_TSO = (1 << 19),
255*4882a593Smuzhiyun IB_DEVICE_XRC = (1 << 20),
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /*
258*4882a593Smuzhiyun * This device supports the IB "base memory management extension",
259*4882a593Smuzhiyun * which includes support for fast registrations (IB_WR_REG_MR,
260*4882a593Smuzhiyun * IB_WR_LOCAL_INV and IB_WR_SEND_WITH_INV verbs). This flag should
261*4882a593Smuzhiyun * also be set by any iWarp device which must support FRs to comply
262*4882a593Smuzhiyun * to the iWarp verbs spec. iWarp devices also support the
263*4882a593Smuzhiyun * IB_WR_RDMA_READ_WITH_INV verb for RDMA READs that invalidate the
264*4882a593Smuzhiyun * stag.
265*4882a593Smuzhiyun */
266*4882a593Smuzhiyun IB_DEVICE_MEM_MGT_EXTENSIONS = (1 << 21),
267*4882a593Smuzhiyun IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1 << 22),
268*4882a593Smuzhiyun IB_DEVICE_MEM_WINDOW_TYPE_2A = (1 << 23),
269*4882a593Smuzhiyun IB_DEVICE_MEM_WINDOW_TYPE_2B = (1 << 24),
270*4882a593Smuzhiyun IB_DEVICE_RC_IP_CSUM = (1 << 25),
271*4882a593Smuzhiyun /* Deprecated. Please use IB_RAW_PACKET_CAP_IP_CSUM. */
272*4882a593Smuzhiyun IB_DEVICE_RAW_IP_CSUM = (1 << 26),
273*4882a593Smuzhiyun /*
274*4882a593Smuzhiyun * Devices should set IB_DEVICE_CROSS_CHANNEL if they
275*4882a593Smuzhiyun * support execution of WQEs that involve synchronization
276*4882a593Smuzhiyun * of I/O operations with single completion queue managed
277*4882a593Smuzhiyun * by hardware.
278*4882a593Smuzhiyun */
279*4882a593Smuzhiyun IB_DEVICE_CROSS_CHANNEL = (1 << 27),
280*4882a593Smuzhiyun IB_DEVICE_MANAGED_FLOW_STEERING = (1 << 29),
281*4882a593Smuzhiyun IB_DEVICE_INTEGRITY_HANDOVER = (1 << 30),
282*4882a593Smuzhiyun IB_DEVICE_ON_DEMAND_PAGING = (1ULL << 31),
283*4882a593Smuzhiyun IB_DEVICE_SG_GAPS_REG = (1ULL << 32),
284*4882a593Smuzhiyun IB_DEVICE_VIRTUAL_FUNCTION = (1ULL << 33),
285*4882a593Smuzhiyun /* Deprecated. Please use IB_RAW_PACKET_CAP_SCATTER_FCS. */
286*4882a593Smuzhiyun IB_DEVICE_RAW_SCATTER_FCS = (1ULL << 34),
287*4882a593Smuzhiyun IB_DEVICE_RDMA_NETDEV_OPA = (1ULL << 35),
288*4882a593Smuzhiyun /* The device supports padding incoming writes to cacheline. */
289*4882a593Smuzhiyun IB_DEVICE_PCI_WRITE_END_PADDING = (1ULL << 36),
290*4882a593Smuzhiyun IB_DEVICE_ALLOW_USER_UNREG = (1ULL << 37),
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun enum ib_atomic_cap {
294*4882a593Smuzhiyun IB_ATOMIC_NONE,
295*4882a593Smuzhiyun IB_ATOMIC_HCA,
296*4882a593Smuzhiyun IB_ATOMIC_GLOB
297*4882a593Smuzhiyun };
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun enum ib_odp_general_cap_bits {
300*4882a593Smuzhiyun IB_ODP_SUPPORT = 1 << 0,
301*4882a593Smuzhiyun IB_ODP_SUPPORT_IMPLICIT = 1 << 1,
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun enum ib_odp_transport_cap_bits {
305*4882a593Smuzhiyun IB_ODP_SUPPORT_SEND = 1 << 0,
306*4882a593Smuzhiyun IB_ODP_SUPPORT_RECV = 1 << 1,
307*4882a593Smuzhiyun IB_ODP_SUPPORT_WRITE = 1 << 2,
308*4882a593Smuzhiyun IB_ODP_SUPPORT_READ = 1 << 3,
309*4882a593Smuzhiyun IB_ODP_SUPPORT_ATOMIC = 1 << 4,
310*4882a593Smuzhiyun IB_ODP_SUPPORT_SRQ_RECV = 1 << 5,
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun struct ib_odp_caps {
314*4882a593Smuzhiyun uint64_t general_caps;
315*4882a593Smuzhiyun struct {
316*4882a593Smuzhiyun uint32_t rc_odp_caps;
317*4882a593Smuzhiyun uint32_t uc_odp_caps;
318*4882a593Smuzhiyun uint32_t ud_odp_caps;
319*4882a593Smuzhiyun uint32_t xrc_odp_caps;
320*4882a593Smuzhiyun } per_transport_caps;
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun struct ib_rss_caps {
324*4882a593Smuzhiyun /* Corresponding bit will be set if qp type from
325*4882a593Smuzhiyun * 'enum ib_qp_type' is supported, e.g.
326*4882a593Smuzhiyun * supported_qpts |= 1 << IB_QPT_UD
327*4882a593Smuzhiyun */
328*4882a593Smuzhiyun u32 supported_qpts;
329*4882a593Smuzhiyun u32 max_rwq_indirection_tables;
330*4882a593Smuzhiyun u32 max_rwq_indirection_table_size;
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun enum ib_tm_cap_flags {
334*4882a593Smuzhiyun /* Support tag matching with rendezvous offload for RC transport */
335*4882a593Smuzhiyun IB_TM_CAP_RNDV_RC = 1 << 0,
336*4882a593Smuzhiyun };
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun struct ib_tm_caps {
339*4882a593Smuzhiyun /* Max size of RNDV header */
340*4882a593Smuzhiyun u32 max_rndv_hdr_size;
341*4882a593Smuzhiyun /* Max number of entries in tag matching list */
342*4882a593Smuzhiyun u32 max_num_tags;
343*4882a593Smuzhiyun /* From enum ib_tm_cap_flags */
344*4882a593Smuzhiyun u32 flags;
345*4882a593Smuzhiyun /* Max number of outstanding list operations */
346*4882a593Smuzhiyun u32 max_ops;
347*4882a593Smuzhiyun /* Max number of SGE in tag matching entry */
348*4882a593Smuzhiyun u32 max_sge;
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun struct ib_cq_init_attr {
352*4882a593Smuzhiyun unsigned int cqe;
353*4882a593Smuzhiyun u32 comp_vector;
354*4882a593Smuzhiyun u32 flags;
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun enum ib_cq_attr_mask {
358*4882a593Smuzhiyun IB_CQ_MODERATE = 1 << 0,
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun struct ib_cq_caps {
362*4882a593Smuzhiyun u16 max_cq_moderation_count;
363*4882a593Smuzhiyun u16 max_cq_moderation_period;
364*4882a593Smuzhiyun };
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun struct ib_dm_mr_attr {
367*4882a593Smuzhiyun u64 length;
368*4882a593Smuzhiyun u64 offset;
369*4882a593Smuzhiyun u32 access_flags;
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun struct ib_dm_alloc_attr {
373*4882a593Smuzhiyun u64 length;
374*4882a593Smuzhiyun u32 alignment;
375*4882a593Smuzhiyun u32 flags;
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun struct ib_device_attr {
379*4882a593Smuzhiyun u64 fw_ver;
380*4882a593Smuzhiyun __be64 sys_image_guid;
381*4882a593Smuzhiyun u64 max_mr_size;
382*4882a593Smuzhiyun u64 page_size_cap;
383*4882a593Smuzhiyun u32 vendor_id;
384*4882a593Smuzhiyun u32 vendor_part_id;
385*4882a593Smuzhiyun u32 hw_ver;
386*4882a593Smuzhiyun int max_qp;
387*4882a593Smuzhiyun int max_qp_wr;
388*4882a593Smuzhiyun u64 device_cap_flags;
389*4882a593Smuzhiyun int max_send_sge;
390*4882a593Smuzhiyun int max_recv_sge;
391*4882a593Smuzhiyun int max_sge_rd;
392*4882a593Smuzhiyun int max_cq;
393*4882a593Smuzhiyun int max_cqe;
394*4882a593Smuzhiyun int max_mr;
395*4882a593Smuzhiyun int max_pd;
396*4882a593Smuzhiyun int max_qp_rd_atom;
397*4882a593Smuzhiyun int max_ee_rd_atom;
398*4882a593Smuzhiyun int max_res_rd_atom;
399*4882a593Smuzhiyun int max_qp_init_rd_atom;
400*4882a593Smuzhiyun int max_ee_init_rd_atom;
401*4882a593Smuzhiyun enum ib_atomic_cap atomic_cap;
402*4882a593Smuzhiyun enum ib_atomic_cap masked_atomic_cap;
403*4882a593Smuzhiyun int max_ee;
404*4882a593Smuzhiyun int max_rdd;
405*4882a593Smuzhiyun int max_mw;
406*4882a593Smuzhiyun int max_raw_ipv6_qp;
407*4882a593Smuzhiyun int max_raw_ethy_qp;
408*4882a593Smuzhiyun int max_mcast_grp;
409*4882a593Smuzhiyun int max_mcast_qp_attach;
410*4882a593Smuzhiyun int max_total_mcast_qp_attach;
411*4882a593Smuzhiyun int max_ah;
412*4882a593Smuzhiyun int max_srq;
413*4882a593Smuzhiyun int max_srq_wr;
414*4882a593Smuzhiyun int max_srq_sge;
415*4882a593Smuzhiyun unsigned int max_fast_reg_page_list_len;
416*4882a593Smuzhiyun unsigned int max_pi_fast_reg_page_list_len;
417*4882a593Smuzhiyun u16 max_pkeys;
418*4882a593Smuzhiyun u8 local_ca_ack_delay;
419*4882a593Smuzhiyun int sig_prot_cap;
420*4882a593Smuzhiyun int sig_guard_cap;
421*4882a593Smuzhiyun struct ib_odp_caps odp_caps;
422*4882a593Smuzhiyun uint64_t timestamp_mask;
423*4882a593Smuzhiyun uint64_t hca_core_clock; /* in KHZ */
424*4882a593Smuzhiyun struct ib_rss_caps rss_caps;
425*4882a593Smuzhiyun u32 max_wq_type_rq;
426*4882a593Smuzhiyun u32 raw_packet_caps; /* Use ib_raw_packet_caps enum */
427*4882a593Smuzhiyun struct ib_tm_caps tm_caps;
428*4882a593Smuzhiyun struct ib_cq_caps cq_caps;
429*4882a593Smuzhiyun u64 max_dm_size;
430*4882a593Smuzhiyun /* Max entries for sgl for optimized performance per READ */
431*4882a593Smuzhiyun u32 max_sgl_rd;
432*4882a593Smuzhiyun };
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun enum ib_mtu {
435*4882a593Smuzhiyun IB_MTU_256 = 1,
436*4882a593Smuzhiyun IB_MTU_512 = 2,
437*4882a593Smuzhiyun IB_MTU_1024 = 3,
438*4882a593Smuzhiyun IB_MTU_2048 = 4,
439*4882a593Smuzhiyun IB_MTU_4096 = 5
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun enum opa_mtu {
443*4882a593Smuzhiyun OPA_MTU_8192 = 6,
444*4882a593Smuzhiyun OPA_MTU_10240 = 7
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun
ib_mtu_enum_to_int(enum ib_mtu mtu)447*4882a593Smuzhiyun static inline int ib_mtu_enum_to_int(enum ib_mtu mtu)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun switch (mtu) {
450*4882a593Smuzhiyun case IB_MTU_256: return 256;
451*4882a593Smuzhiyun case IB_MTU_512: return 512;
452*4882a593Smuzhiyun case IB_MTU_1024: return 1024;
453*4882a593Smuzhiyun case IB_MTU_2048: return 2048;
454*4882a593Smuzhiyun case IB_MTU_4096: return 4096;
455*4882a593Smuzhiyun default: return -1;
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
ib_mtu_int_to_enum(int mtu)459*4882a593Smuzhiyun static inline enum ib_mtu ib_mtu_int_to_enum(int mtu)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun if (mtu >= 4096)
462*4882a593Smuzhiyun return IB_MTU_4096;
463*4882a593Smuzhiyun else if (mtu >= 2048)
464*4882a593Smuzhiyun return IB_MTU_2048;
465*4882a593Smuzhiyun else if (mtu >= 1024)
466*4882a593Smuzhiyun return IB_MTU_1024;
467*4882a593Smuzhiyun else if (mtu >= 512)
468*4882a593Smuzhiyun return IB_MTU_512;
469*4882a593Smuzhiyun else
470*4882a593Smuzhiyun return IB_MTU_256;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun
opa_mtu_enum_to_int(enum opa_mtu mtu)473*4882a593Smuzhiyun static inline int opa_mtu_enum_to_int(enum opa_mtu mtu)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun switch (mtu) {
476*4882a593Smuzhiyun case OPA_MTU_8192:
477*4882a593Smuzhiyun return 8192;
478*4882a593Smuzhiyun case OPA_MTU_10240:
479*4882a593Smuzhiyun return 10240;
480*4882a593Smuzhiyun default:
481*4882a593Smuzhiyun return(ib_mtu_enum_to_int((enum ib_mtu)mtu));
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun
opa_mtu_int_to_enum(int mtu)485*4882a593Smuzhiyun static inline enum opa_mtu opa_mtu_int_to_enum(int mtu)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun if (mtu >= 10240)
488*4882a593Smuzhiyun return OPA_MTU_10240;
489*4882a593Smuzhiyun else if (mtu >= 8192)
490*4882a593Smuzhiyun return OPA_MTU_8192;
491*4882a593Smuzhiyun else
492*4882a593Smuzhiyun return ((enum opa_mtu)ib_mtu_int_to_enum(mtu));
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun enum ib_port_state {
496*4882a593Smuzhiyun IB_PORT_NOP = 0,
497*4882a593Smuzhiyun IB_PORT_DOWN = 1,
498*4882a593Smuzhiyun IB_PORT_INIT = 2,
499*4882a593Smuzhiyun IB_PORT_ARMED = 3,
500*4882a593Smuzhiyun IB_PORT_ACTIVE = 4,
501*4882a593Smuzhiyun IB_PORT_ACTIVE_DEFER = 5
502*4882a593Smuzhiyun };
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun enum ib_port_phys_state {
505*4882a593Smuzhiyun IB_PORT_PHYS_STATE_SLEEP = 1,
506*4882a593Smuzhiyun IB_PORT_PHYS_STATE_POLLING = 2,
507*4882a593Smuzhiyun IB_PORT_PHYS_STATE_DISABLED = 3,
508*4882a593Smuzhiyun IB_PORT_PHYS_STATE_PORT_CONFIGURATION_TRAINING = 4,
509*4882a593Smuzhiyun IB_PORT_PHYS_STATE_LINK_UP = 5,
510*4882a593Smuzhiyun IB_PORT_PHYS_STATE_LINK_ERROR_RECOVERY = 6,
511*4882a593Smuzhiyun IB_PORT_PHYS_STATE_PHY_TEST = 7,
512*4882a593Smuzhiyun };
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun enum ib_port_width {
515*4882a593Smuzhiyun IB_WIDTH_1X = 1,
516*4882a593Smuzhiyun IB_WIDTH_2X = 16,
517*4882a593Smuzhiyun IB_WIDTH_4X = 2,
518*4882a593Smuzhiyun IB_WIDTH_8X = 4,
519*4882a593Smuzhiyun IB_WIDTH_12X = 8
520*4882a593Smuzhiyun };
521*4882a593Smuzhiyun
ib_width_enum_to_int(enum ib_port_width width)522*4882a593Smuzhiyun static inline int ib_width_enum_to_int(enum ib_port_width width)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun switch (width) {
525*4882a593Smuzhiyun case IB_WIDTH_1X: return 1;
526*4882a593Smuzhiyun case IB_WIDTH_2X: return 2;
527*4882a593Smuzhiyun case IB_WIDTH_4X: return 4;
528*4882a593Smuzhiyun case IB_WIDTH_8X: return 8;
529*4882a593Smuzhiyun case IB_WIDTH_12X: return 12;
530*4882a593Smuzhiyun default: return -1;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun enum ib_port_speed {
535*4882a593Smuzhiyun IB_SPEED_SDR = 1,
536*4882a593Smuzhiyun IB_SPEED_DDR = 2,
537*4882a593Smuzhiyun IB_SPEED_QDR = 4,
538*4882a593Smuzhiyun IB_SPEED_FDR10 = 8,
539*4882a593Smuzhiyun IB_SPEED_FDR = 16,
540*4882a593Smuzhiyun IB_SPEED_EDR = 32,
541*4882a593Smuzhiyun IB_SPEED_HDR = 64,
542*4882a593Smuzhiyun IB_SPEED_NDR = 128,
543*4882a593Smuzhiyun };
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun /**
546*4882a593Smuzhiyun * struct rdma_hw_stats
547*4882a593Smuzhiyun * @lock - Mutex to protect parallel write access to lifespan and values
548*4882a593Smuzhiyun * of counters, which are 64bits and not guaranteeed to be written
549*4882a593Smuzhiyun * atomicaly on 32bits systems.
550*4882a593Smuzhiyun * @timestamp - Used by the core code to track when the last update was
551*4882a593Smuzhiyun * @lifespan - Used by the core code to determine how old the counters
552*4882a593Smuzhiyun * should be before being updated again. Stored in jiffies, defaults
553*4882a593Smuzhiyun * to 10 milliseconds, drivers can override the default be specifying
554*4882a593Smuzhiyun * their own value during their allocation routine.
555*4882a593Smuzhiyun * @name - Array of pointers to static names used for the counters in
556*4882a593Smuzhiyun * directory.
557*4882a593Smuzhiyun * @num_counters - How many hardware counters there are. If name is
558*4882a593Smuzhiyun * shorter than this number, a kernel oops will result. Driver authors
559*4882a593Smuzhiyun * are encouraged to leave BUILD_BUG_ON(ARRAY_SIZE(@name) < num_counters)
560*4882a593Smuzhiyun * in their code to prevent this.
561*4882a593Smuzhiyun * @value - Array of u64 counters that are accessed by the sysfs code and
562*4882a593Smuzhiyun * filled in by the drivers get_stats routine
563*4882a593Smuzhiyun */
564*4882a593Smuzhiyun struct rdma_hw_stats {
565*4882a593Smuzhiyun struct mutex lock; /* Protect lifespan and values[] */
566*4882a593Smuzhiyun unsigned long timestamp;
567*4882a593Smuzhiyun unsigned long lifespan;
568*4882a593Smuzhiyun const char * const *names;
569*4882a593Smuzhiyun int num_counters;
570*4882a593Smuzhiyun u64 value[];
571*4882a593Smuzhiyun };
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun #define RDMA_HW_STATS_DEFAULT_LIFESPAN 10
574*4882a593Smuzhiyun /**
575*4882a593Smuzhiyun * rdma_alloc_hw_stats_struct - Helper function to allocate dynamic struct
576*4882a593Smuzhiyun * for drivers.
577*4882a593Smuzhiyun * @names - Array of static const char *
578*4882a593Smuzhiyun * @num_counters - How many elements in array
579*4882a593Smuzhiyun * @lifespan - How many milliseconds between updates
580*4882a593Smuzhiyun */
rdma_alloc_hw_stats_struct(const char * const * names,int num_counters,unsigned long lifespan)581*4882a593Smuzhiyun static inline struct rdma_hw_stats *rdma_alloc_hw_stats_struct(
582*4882a593Smuzhiyun const char * const *names, int num_counters,
583*4882a593Smuzhiyun unsigned long lifespan)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun struct rdma_hw_stats *stats;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun stats = kzalloc(sizeof(*stats) + num_counters * sizeof(u64),
588*4882a593Smuzhiyun GFP_KERNEL);
589*4882a593Smuzhiyun if (!stats)
590*4882a593Smuzhiyun return NULL;
591*4882a593Smuzhiyun stats->names = names;
592*4882a593Smuzhiyun stats->num_counters = num_counters;
593*4882a593Smuzhiyun stats->lifespan = msecs_to_jiffies(lifespan);
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun return stats;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /* Define bits for the various functionality this port needs to be supported by
600*4882a593Smuzhiyun * the core.
601*4882a593Smuzhiyun */
602*4882a593Smuzhiyun /* Management 0x00000FFF */
603*4882a593Smuzhiyun #define RDMA_CORE_CAP_IB_MAD 0x00000001
604*4882a593Smuzhiyun #define RDMA_CORE_CAP_IB_SMI 0x00000002
605*4882a593Smuzhiyun #define RDMA_CORE_CAP_IB_CM 0x00000004
606*4882a593Smuzhiyun #define RDMA_CORE_CAP_IW_CM 0x00000008
607*4882a593Smuzhiyun #define RDMA_CORE_CAP_IB_SA 0x00000010
608*4882a593Smuzhiyun #define RDMA_CORE_CAP_OPA_MAD 0x00000020
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun /* Address format 0x000FF000 */
611*4882a593Smuzhiyun #define RDMA_CORE_CAP_AF_IB 0x00001000
612*4882a593Smuzhiyun #define RDMA_CORE_CAP_ETH_AH 0x00002000
613*4882a593Smuzhiyun #define RDMA_CORE_CAP_OPA_AH 0x00004000
614*4882a593Smuzhiyun #define RDMA_CORE_CAP_IB_GRH_REQUIRED 0x00008000
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun /* Protocol 0xFFF00000 */
617*4882a593Smuzhiyun #define RDMA_CORE_CAP_PROT_IB 0x00100000
618*4882a593Smuzhiyun #define RDMA_CORE_CAP_PROT_ROCE 0x00200000
619*4882a593Smuzhiyun #define RDMA_CORE_CAP_PROT_IWARP 0x00400000
620*4882a593Smuzhiyun #define RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP 0x00800000
621*4882a593Smuzhiyun #define RDMA_CORE_CAP_PROT_RAW_PACKET 0x01000000
622*4882a593Smuzhiyun #define RDMA_CORE_CAP_PROT_USNIC 0x02000000
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun #define RDMA_CORE_PORT_IB_GRH_REQUIRED (RDMA_CORE_CAP_IB_GRH_REQUIRED \
625*4882a593Smuzhiyun | RDMA_CORE_CAP_PROT_ROCE \
626*4882a593Smuzhiyun | RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP)
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun #define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \
629*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_MAD \
630*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_SMI \
631*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_CM \
632*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_SA \
633*4882a593Smuzhiyun | RDMA_CORE_CAP_AF_IB)
634*4882a593Smuzhiyun #define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \
635*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_MAD \
636*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_CM \
637*4882a593Smuzhiyun | RDMA_CORE_CAP_AF_IB \
638*4882a593Smuzhiyun | RDMA_CORE_CAP_ETH_AH)
639*4882a593Smuzhiyun #define RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP \
640*4882a593Smuzhiyun (RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP \
641*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_MAD \
642*4882a593Smuzhiyun | RDMA_CORE_CAP_IB_CM \
643*4882a593Smuzhiyun | RDMA_CORE_CAP_AF_IB \
644*4882a593Smuzhiyun | RDMA_CORE_CAP_ETH_AH)
645*4882a593Smuzhiyun #define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \
646*4882a593Smuzhiyun | RDMA_CORE_CAP_IW_CM)
647*4882a593Smuzhiyun #define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \
648*4882a593Smuzhiyun | RDMA_CORE_CAP_OPA_MAD)
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun #define RDMA_CORE_PORT_RAW_PACKET (RDMA_CORE_CAP_PROT_RAW_PACKET)
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun #define RDMA_CORE_PORT_USNIC (RDMA_CORE_CAP_PROT_USNIC)
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun struct ib_port_attr {
655*4882a593Smuzhiyun u64 subnet_prefix;
656*4882a593Smuzhiyun enum ib_port_state state;
657*4882a593Smuzhiyun enum ib_mtu max_mtu;
658*4882a593Smuzhiyun enum ib_mtu active_mtu;
659*4882a593Smuzhiyun u32 phys_mtu;
660*4882a593Smuzhiyun int gid_tbl_len;
661*4882a593Smuzhiyun unsigned int ip_gids:1;
662*4882a593Smuzhiyun /* This is the value from PortInfo CapabilityMask, defined by IBA */
663*4882a593Smuzhiyun u32 port_cap_flags;
664*4882a593Smuzhiyun u32 max_msg_sz;
665*4882a593Smuzhiyun u32 bad_pkey_cntr;
666*4882a593Smuzhiyun u32 qkey_viol_cntr;
667*4882a593Smuzhiyun u16 pkey_tbl_len;
668*4882a593Smuzhiyun u32 sm_lid;
669*4882a593Smuzhiyun u32 lid;
670*4882a593Smuzhiyun u8 lmc;
671*4882a593Smuzhiyun u8 max_vl_num;
672*4882a593Smuzhiyun u8 sm_sl;
673*4882a593Smuzhiyun u8 subnet_timeout;
674*4882a593Smuzhiyun u8 init_type_reply;
675*4882a593Smuzhiyun u8 active_width;
676*4882a593Smuzhiyun u16 active_speed;
677*4882a593Smuzhiyun u8 phys_state;
678*4882a593Smuzhiyun u16 port_cap_flags2;
679*4882a593Smuzhiyun };
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun enum ib_device_modify_flags {
682*4882a593Smuzhiyun IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0,
683*4882a593Smuzhiyun IB_DEVICE_MODIFY_NODE_DESC = 1 << 1
684*4882a593Smuzhiyun };
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun #define IB_DEVICE_NODE_DESC_MAX 64
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun struct ib_device_modify {
689*4882a593Smuzhiyun u64 sys_image_guid;
690*4882a593Smuzhiyun char node_desc[IB_DEVICE_NODE_DESC_MAX];
691*4882a593Smuzhiyun };
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun enum ib_port_modify_flags {
694*4882a593Smuzhiyun IB_PORT_SHUTDOWN = 1,
695*4882a593Smuzhiyun IB_PORT_INIT_TYPE = (1<<2),
696*4882a593Smuzhiyun IB_PORT_RESET_QKEY_CNTR = (1<<3),
697*4882a593Smuzhiyun IB_PORT_OPA_MASK_CHG = (1<<4)
698*4882a593Smuzhiyun };
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun struct ib_port_modify {
701*4882a593Smuzhiyun u32 set_port_cap_mask;
702*4882a593Smuzhiyun u32 clr_port_cap_mask;
703*4882a593Smuzhiyun u8 init_type;
704*4882a593Smuzhiyun };
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun enum ib_event_type {
707*4882a593Smuzhiyun IB_EVENT_CQ_ERR,
708*4882a593Smuzhiyun IB_EVENT_QP_FATAL,
709*4882a593Smuzhiyun IB_EVENT_QP_REQ_ERR,
710*4882a593Smuzhiyun IB_EVENT_QP_ACCESS_ERR,
711*4882a593Smuzhiyun IB_EVENT_COMM_EST,
712*4882a593Smuzhiyun IB_EVENT_SQ_DRAINED,
713*4882a593Smuzhiyun IB_EVENT_PATH_MIG,
714*4882a593Smuzhiyun IB_EVENT_PATH_MIG_ERR,
715*4882a593Smuzhiyun IB_EVENT_DEVICE_FATAL,
716*4882a593Smuzhiyun IB_EVENT_PORT_ACTIVE,
717*4882a593Smuzhiyun IB_EVENT_PORT_ERR,
718*4882a593Smuzhiyun IB_EVENT_LID_CHANGE,
719*4882a593Smuzhiyun IB_EVENT_PKEY_CHANGE,
720*4882a593Smuzhiyun IB_EVENT_SM_CHANGE,
721*4882a593Smuzhiyun IB_EVENT_SRQ_ERR,
722*4882a593Smuzhiyun IB_EVENT_SRQ_LIMIT_REACHED,
723*4882a593Smuzhiyun IB_EVENT_QP_LAST_WQE_REACHED,
724*4882a593Smuzhiyun IB_EVENT_CLIENT_REREGISTER,
725*4882a593Smuzhiyun IB_EVENT_GID_CHANGE,
726*4882a593Smuzhiyun IB_EVENT_WQ_FATAL,
727*4882a593Smuzhiyun };
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun const char *__attribute_const__ ib_event_msg(enum ib_event_type event);
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun struct ib_event {
732*4882a593Smuzhiyun struct ib_device *device;
733*4882a593Smuzhiyun union {
734*4882a593Smuzhiyun struct ib_cq *cq;
735*4882a593Smuzhiyun struct ib_qp *qp;
736*4882a593Smuzhiyun struct ib_srq *srq;
737*4882a593Smuzhiyun struct ib_wq *wq;
738*4882a593Smuzhiyun u8 port_num;
739*4882a593Smuzhiyun } element;
740*4882a593Smuzhiyun enum ib_event_type event;
741*4882a593Smuzhiyun };
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun struct ib_event_handler {
744*4882a593Smuzhiyun struct ib_device *device;
745*4882a593Smuzhiyun void (*handler)(struct ib_event_handler *, struct ib_event *);
746*4882a593Smuzhiyun struct list_head list;
747*4882a593Smuzhiyun };
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun #define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \
750*4882a593Smuzhiyun do { \
751*4882a593Smuzhiyun (_ptr)->device = _device; \
752*4882a593Smuzhiyun (_ptr)->handler = _handler; \
753*4882a593Smuzhiyun INIT_LIST_HEAD(&(_ptr)->list); \
754*4882a593Smuzhiyun } while (0)
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun struct ib_global_route {
757*4882a593Smuzhiyun const struct ib_gid_attr *sgid_attr;
758*4882a593Smuzhiyun union ib_gid dgid;
759*4882a593Smuzhiyun u32 flow_label;
760*4882a593Smuzhiyun u8 sgid_index;
761*4882a593Smuzhiyun u8 hop_limit;
762*4882a593Smuzhiyun u8 traffic_class;
763*4882a593Smuzhiyun };
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun struct ib_grh {
766*4882a593Smuzhiyun __be32 version_tclass_flow;
767*4882a593Smuzhiyun __be16 paylen;
768*4882a593Smuzhiyun u8 next_hdr;
769*4882a593Smuzhiyun u8 hop_limit;
770*4882a593Smuzhiyun union ib_gid sgid;
771*4882a593Smuzhiyun union ib_gid dgid;
772*4882a593Smuzhiyun };
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun union rdma_network_hdr {
775*4882a593Smuzhiyun struct ib_grh ibgrh;
776*4882a593Smuzhiyun struct {
777*4882a593Smuzhiyun /* The IB spec states that if it's IPv4, the header
778*4882a593Smuzhiyun * is located in the last 20 bytes of the header.
779*4882a593Smuzhiyun */
780*4882a593Smuzhiyun u8 reserved[20];
781*4882a593Smuzhiyun struct iphdr roce4grh;
782*4882a593Smuzhiyun };
783*4882a593Smuzhiyun };
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun #define IB_QPN_MASK 0xFFFFFF
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun enum {
788*4882a593Smuzhiyun IB_MULTICAST_QPN = 0xffffff
789*4882a593Smuzhiyun };
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun #define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF)
792*4882a593Smuzhiyun #define IB_MULTICAST_LID_BASE cpu_to_be16(0xC000)
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun enum ib_ah_flags {
795*4882a593Smuzhiyun IB_AH_GRH = 1
796*4882a593Smuzhiyun };
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun enum ib_rate {
799*4882a593Smuzhiyun IB_RATE_PORT_CURRENT = 0,
800*4882a593Smuzhiyun IB_RATE_2_5_GBPS = 2,
801*4882a593Smuzhiyun IB_RATE_5_GBPS = 5,
802*4882a593Smuzhiyun IB_RATE_10_GBPS = 3,
803*4882a593Smuzhiyun IB_RATE_20_GBPS = 6,
804*4882a593Smuzhiyun IB_RATE_30_GBPS = 4,
805*4882a593Smuzhiyun IB_RATE_40_GBPS = 7,
806*4882a593Smuzhiyun IB_RATE_60_GBPS = 8,
807*4882a593Smuzhiyun IB_RATE_80_GBPS = 9,
808*4882a593Smuzhiyun IB_RATE_120_GBPS = 10,
809*4882a593Smuzhiyun IB_RATE_14_GBPS = 11,
810*4882a593Smuzhiyun IB_RATE_56_GBPS = 12,
811*4882a593Smuzhiyun IB_RATE_112_GBPS = 13,
812*4882a593Smuzhiyun IB_RATE_168_GBPS = 14,
813*4882a593Smuzhiyun IB_RATE_25_GBPS = 15,
814*4882a593Smuzhiyun IB_RATE_100_GBPS = 16,
815*4882a593Smuzhiyun IB_RATE_200_GBPS = 17,
816*4882a593Smuzhiyun IB_RATE_300_GBPS = 18,
817*4882a593Smuzhiyun IB_RATE_28_GBPS = 19,
818*4882a593Smuzhiyun IB_RATE_50_GBPS = 20,
819*4882a593Smuzhiyun IB_RATE_400_GBPS = 21,
820*4882a593Smuzhiyun IB_RATE_600_GBPS = 22,
821*4882a593Smuzhiyun };
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun /**
824*4882a593Smuzhiyun * ib_rate_to_mult - Convert the IB rate enum to a multiple of the
825*4882a593Smuzhiyun * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be
826*4882a593Smuzhiyun * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
827*4882a593Smuzhiyun * @rate: rate to convert.
828*4882a593Smuzhiyun */
829*4882a593Smuzhiyun __attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun /**
832*4882a593Smuzhiyun * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
833*4882a593Smuzhiyun * For example, IB_RATE_2_5_GBPS will be converted to 2500.
834*4882a593Smuzhiyun * @rate: rate to convert.
835*4882a593Smuzhiyun */
836*4882a593Smuzhiyun __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun /**
840*4882a593Smuzhiyun * enum ib_mr_type - memory region type
841*4882a593Smuzhiyun * @IB_MR_TYPE_MEM_REG: memory region that is used for
842*4882a593Smuzhiyun * normal registration
843*4882a593Smuzhiyun * @IB_MR_TYPE_SG_GAPS: memory region that is capable to
844*4882a593Smuzhiyun * register any arbitrary sg lists (without
845*4882a593Smuzhiyun * the normal mr constraints - see
846*4882a593Smuzhiyun * ib_map_mr_sg)
847*4882a593Smuzhiyun * @IB_MR_TYPE_DM: memory region that is used for device
848*4882a593Smuzhiyun * memory registration
849*4882a593Smuzhiyun * @IB_MR_TYPE_USER: memory region that is used for the user-space
850*4882a593Smuzhiyun * application
851*4882a593Smuzhiyun * @IB_MR_TYPE_DMA: memory region that is used for DMA operations
852*4882a593Smuzhiyun * without address translations (VA=PA)
853*4882a593Smuzhiyun * @IB_MR_TYPE_INTEGRITY: memory region that is used for
854*4882a593Smuzhiyun * data integrity operations
855*4882a593Smuzhiyun */
856*4882a593Smuzhiyun enum ib_mr_type {
857*4882a593Smuzhiyun IB_MR_TYPE_MEM_REG,
858*4882a593Smuzhiyun IB_MR_TYPE_SG_GAPS,
859*4882a593Smuzhiyun IB_MR_TYPE_DM,
860*4882a593Smuzhiyun IB_MR_TYPE_USER,
861*4882a593Smuzhiyun IB_MR_TYPE_DMA,
862*4882a593Smuzhiyun IB_MR_TYPE_INTEGRITY,
863*4882a593Smuzhiyun };
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun enum ib_mr_status_check {
866*4882a593Smuzhiyun IB_MR_CHECK_SIG_STATUS = 1,
867*4882a593Smuzhiyun };
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun /**
870*4882a593Smuzhiyun * struct ib_mr_status - Memory region status container
871*4882a593Smuzhiyun *
872*4882a593Smuzhiyun * @fail_status: Bitmask of MR checks status. For each
873*4882a593Smuzhiyun * failed check a corresponding status bit is set.
874*4882a593Smuzhiyun * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
875*4882a593Smuzhiyun * failure.
876*4882a593Smuzhiyun */
877*4882a593Smuzhiyun struct ib_mr_status {
878*4882a593Smuzhiyun u32 fail_status;
879*4882a593Smuzhiyun struct ib_sig_err sig_err;
880*4882a593Smuzhiyun };
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun /**
883*4882a593Smuzhiyun * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
884*4882a593Smuzhiyun * enum.
885*4882a593Smuzhiyun * @mult: multiple to convert.
886*4882a593Smuzhiyun */
887*4882a593Smuzhiyun __attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun struct rdma_ah_init_attr {
890*4882a593Smuzhiyun struct rdma_ah_attr *ah_attr;
891*4882a593Smuzhiyun u32 flags;
892*4882a593Smuzhiyun struct net_device *xmit_slave;
893*4882a593Smuzhiyun };
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun enum rdma_ah_attr_type {
896*4882a593Smuzhiyun RDMA_AH_ATTR_TYPE_UNDEFINED,
897*4882a593Smuzhiyun RDMA_AH_ATTR_TYPE_IB,
898*4882a593Smuzhiyun RDMA_AH_ATTR_TYPE_ROCE,
899*4882a593Smuzhiyun RDMA_AH_ATTR_TYPE_OPA,
900*4882a593Smuzhiyun };
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun struct ib_ah_attr {
903*4882a593Smuzhiyun u16 dlid;
904*4882a593Smuzhiyun u8 src_path_bits;
905*4882a593Smuzhiyun };
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun struct roce_ah_attr {
908*4882a593Smuzhiyun u8 dmac[ETH_ALEN];
909*4882a593Smuzhiyun };
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun struct opa_ah_attr {
912*4882a593Smuzhiyun u32 dlid;
913*4882a593Smuzhiyun u8 src_path_bits;
914*4882a593Smuzhiyun bool make_grd;
915*4882a593Smuzhiyun };
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun struct rdma_ah_attr {
918*4882a593Smuzhiyun struct ib_global_route grh;
919*4882a593Smuzhiyun u8 sl;
920*4882a593Smuzhiyun u8 static_rate;
921*4882a593Smuzhiyun u8 port_num;
922*4882a593Smuzhiyun u8 ah_flags;
923*4882a593Smuzhiyun enum rdma_ah_attr_type type;
924*4882a593Smuzhiyun union {
925*4882a593Smuzhiyun struct ib_ah_attr ib;
926*4882a593Smuzhiyun struct roce_ah_attr roce;
927*4882a593Smuzhiyun struct opa_ah_attr opa;
928*4882a593Smuzhiyun };
929*4882a593Smuzhiyun };
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun enum ib_wc_status {
932*4882a593Smuzhiyun IB_WC_SUCCESS,
933*4882a593Smuzhiyun IB_WC_LOC_LEN_ERR,
934*4882a593Smuzhiyun IB_WC_LOC_QP_OP_ERR,
935*4882a593Smuzhiyun IB_WC_LOC_EEC_OP_ERR,
936*4882a593Smuzhiyun IB_WC_LOC_PROT_ERR,
937*4882a593Smuzhiyun IB_WC_WR_FLUSH_ERR,
938*4882a593Smuzhiyun IB_WC_MW_BIND_ERR,
939*4882a593Smuzhiyun IB_WC_BAD_RESP_ERR,
940*4882a593Smuzhiyun IB_WC_LOC_ACCESS_ERR,
941*4882a593Smuzhiyun IB_WC_REM_INV_REQ_ERR,
942*4882a593Smuzhiyun IB_WC_REM_ACCESS_ERR,
943*4882a593Smuzhiyun IB_WC_REM_OP_ERR,
944*4882a593Smuzhiyun IB_WC_RETRY_EXC_ERR,
945*4882a593Smuzhiyun IB_WC_RNR_RETRY_EXC_ERR,
946*4882a593Smuzhiyun IB_WC_LOC_RDD_VIOL_ERR,
947*4882a593Smuzhiyun IB_WC_REM_INV_RD_REQ_ERR,
948*4882a593Smuzhiyun IB_WC_REM_ABORT_ERR,
949*4882a593Smuzhiyun IB_WC_INV_EECN_ERR,
950*4882a593Smuzhiyun IB_WC_INV_EEC_STATE_ERR,
951*4882a593Smuzhiyun IB_WC_FATAL_ERR,
952*4882a593Smuzhiyun IB_WC_RESP_TIMEOUT_ERR,
953*4882a593Smuzhiyun IB_WC_GENERAL_ERR
954*4882a593Smuzhiyun };
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status);
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun enum ib_wc_opcode {
959*4882a593Smuzhiyun IB_WC_SEND = IB_UVERBS_WC_SEND,
960*4882a593Smuzhiyun IB_WC_RDMA_WRITE = IB_UVERBS_WC_RDMA_WRITE,
961*4882a593Smuzhiyun IB_WC_RDMA_READ = IB_UVERBS_WC_RDMA_READ,
962*4882a593Smuzhiyun IB_WC_COMP_SWAP = IB_UVERBS_WC_COMP_SWAP,
963*4882a593Smuzhiyun IB_WC_FETCH_ADD = IB_UVERBS_WC_FETCH_ADD,
964*4882a593Smuzhiyun IB_WC_BIND_MW = IB_UVERBS_WC_BIND_MW,
965*4882a593Smuzhiyun IB_WC_LOCAL_INV = IB_UVERBS_WC_LOCAL_INV,
966*4882a593Smuzhiyun IB_WC_LSO = IB_UVERBS_WC_TSO,
967*4882a593Smuzhiyun IB_WC_REG_MR,
968*4882a593Smuzhiyun IB_WC_MASKED_COMP_SWAP,
969*4882a593Smuzhiyun IB_WC_MASKED_FETCH_ADD,
970*4882a593Smuzhiyun /*
971*4882a593Smuzhiyun * Set value of IB_WC_RECV so consumers can test if a completion is a
972*4882a593Smuzhiyun * receive by testing (opcode & IB_WC_RECV).
973*4882a593Smuzhiyun */
974*4882a593Smuzhiyun IB_WC_RECV = 1 << 7,
975*4882a593Smuzhiyun IB_WC_RECV_RDMA_WITH_IMM
976*4882a593Smuzhiyun };
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun enum ib_wc_flags {
979*4882a593Smuzhiyun IB_WC_GRH = 1,
980*4882a593Smuzhiyun IB_WC_WITH_IMM = (1<<1),
981*4882a593Smuzhiyun IB_WC_WITH_INVALIDATE = (1<<2),
982*4882a593Smuzhiyun IB_WC_IP_CSUM_OK = (1<<3),
983*4882a593Smuzhiyun IB_WC_WITH_SMAC = (1<<4),
984*4882a593Smuzhiyun IB_WC_WITH_VLAN = (1<<5),
985*4882a593Smuzhiyun IB_WC_WITH_NETWORK_HDR_TYPE = (1<<6),
986*4882a593Smuzhiyun };
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun struct ib_wc {
989*4882a593Smuzhiyun union {
990*4882a593Smuzhiyun u64 wr_id;
991*4882a593Smuzhiyun struct ib_cqe *wr_cqe;
992*4882a593Smuzhiyun };
993*4882a593Smuzhiyun enum ib_wc_status status;
994*4882a593Smuzhiyun enum ib_wc_opcode opcode;
995*4882a593Smuzhiyun u32 vendor_err;
996*4882a593Smuzhiyun u32 byte_len;
997*4882a593Smuzhiyun struct ib_qp *qp;
998*4882a593Smuzhiyun union {
999*4882a593Smuzhiyun __be32 imm_data;
1000*4882a593Smuzhiyun u32 invalidate_rkey;
1001*4882a593Smuzhiyun } ex;
1002*4882a593Smuzhiyun u32 src_qp;
1003*4882a593Smuzhiyun u32 slid;
1004*4882a593Smuzhiyun int wc_flags;
1005*4882a593Smuzhiyun u16 pkey_index;
1006*4882a593Smuzhiyun u8 sl;
1007*4882a593Smuzhiyun u8 dlid_path_bits;
1008*4882a593Smuzhiyun u8 port_num; /* valid only for DR SMPs on switches */
1009*4882a593Smuzhiyun u8 smac[ETH_ALEN];
1010*4882a593Smuzhiyun u16 vlan_id;
1011*4882a593Smuzhiyun u8 network_hdr_type;
1012*4882a593Smuzhiyun };
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun enum ib_cq_notify_flags {
1015*4882a593Smuzhiyun IB_CQ_SOLICITED = 1 << 0,
1016*4882a593Smuzhiyun IB_CQ_NEXT_COMP = 1 << 1,
1017*4882a593Smuzhiyun IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP,
1018*4882a593Smuzhiyun IB_CQ_REPORT_MISSED_EVENTS = 1 << 2,
1019*4882a593Smuzhiyun };
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun enum ib_srq_type {
1022*4882a593Smuzhiyun IB_SRQT_BASIC = IB_UVERBS_SRQT_BASIC,
1023*4882a593Smuzhiyun IB_SRQT_XRC = IB_UVERBS_SRQT_XRC,
1024*4882a593Smuzhiyun IB_SRQT_TM = IB_UVERBS_SRQT_TM,
1025*4882a593Smuzhiyun };
1026*4882a593Smuzhiyun
ib_srq_has_cq(enum ib_srq_type srq_type)1027*4882a593Smuzhiyun static inline bool ib_srq_has_cq(enum ib_srq_type srq_type)
1028*4882a593Smuzhiyun {
1029*4882a593Smuzhiyun return srq_type == IB_SRQT_XRC ||
1030*4882a593Smuzhiyun srq_type == IB_SRQT_TM;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun enum ib_srq_attr_mask {
1034*4882a593Smuzhiyun IB_SRQ_MAX_WR = 1 << 0,
1035*4882a593Smuzhiyun IB_SRQ_LIMIT = 1 << 1,
1036*4882a593Smuzhiyun };
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun struct ib_srq_attr {
1039*4882a593Smuzhiyun u32 max_wr;
1040*4882a593Smuzhiyun u32 max_sge;
1041*4882a593Smuzhiyun u32 srq_limit;
1042*4882a593Smuzhiyun };
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun struct ib_srq_init_attr {
1045*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1046*4882a593Smuzhiyun void *srq_context;
1047*4882a593Smuzhiyun struct ib_srq_attr attr;
1048*4882a593Smuzhiyun enum ib_srq_type srq_type;
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun struct {
1051*4882a593Smuzhiyun struct ib_cq *cq;
1052*4882a593Smuzhiyun union {
1053*4882a593Smuzhiyun struct {
1054*4882a593Smuzhiyun struct ib_xrcd *xrcd;
1055*4882a593Smuzhiyun } xrc;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun struct {
1058*4882a593Smuzhiyun u32 max_num_tags;
1059*4882a593Smuzhiyun } tag_matching;
1060*4882a593Smuzhiyun };
1061*4882a593Smuzhiyun } ext;
1062*4882a593Smuzhiyun };
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun struct ib_qp_cap {
1065*4882a593Smuzhiyun u32 max_send_wr;
1066*4882a593Smuzhiyun u32 max_recv_wr;
1067*4882a593Smuzhiyun u32 max_send_sge;
1068*4882a593Smuzhiyun u32 max_recv_sge;
1069*4882a593Smuzhiyun u32 max_inline_data;
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun /*
1072*4882a593Smuzhiyun * Maximum number of rdma_rw_ctx structures in flight at a time.
1073*4882a593Smuzhiyun * ib_create_qp() will calculate the right amount of neededed WRs
1074*4882a593Smuzhiyun * and MRs based on this.
1075*4882a593Smuzhiyun */
1076*4882a593Smuzhiyun u32 max_rdma_ctxs;
1077*4882a593Smuzhiyun };
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun enum ib_sig_type {
1080*4882a593Smuzhiyun IB_SIGNAL_ALL_WR,
1081*4882a593Smuzhiyun IB_SIGNAL_REQ_WR
1082*4882a593Smuzhiyun };
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun enum ib_qp_type {
1085*4882a593Smuzhiyun /*
1086*4882a593Smuzhiyun * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
1087*4882a593Smuzhiyun * here (and in that order) since the MAD layer uses them as
1088*4882a593Smuzhiyun * indices into a 2-entry table.
1089*4882a593Smuzhiyun */
1090*4882a593Smuzhiyun IB_QPT_SMI,
1091*4882a593Smuzhiyun IB_QPT_GSI,
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun IB_QPT_RC = IB_UVERBS_QPT_RC,
1094*4882a593Smuzhiyun IB_QPT_UC = IB_UVERBS_QPT_UC,
1095*4882a593Smuzhiyun IB_QPT_UD = IB_UVERBS_QPT_UD,
1096*4882a593Smuzhiyun IB_QPT_RAW_IPV6,
1097*4882a593Smuzhiyun IB_QPT_RAW_ETHERTYPE,
1098*4882a593Smuzhiyun IB_QPT_RAW_PACKET = IB_UVERBS_QPT_RAW_PACKET,
1099*4882a593Smuzhiyun IB_QPT_XRC_INI = IB_UVERBS_QPT_XRC_INI,
1100*4882a593Smuzhiyun IB_QPT_XRC_TGT = IB_UVERBS_QPT_XRC_TGT,
1101*4882a593Smuzhiyun IB_QPT_MAX,
1102*4882a593Smuzhiyun IB_QPT_DRIVER = IB_UVERBS_QPT_DRIVER,
1103*4882a593Smuzhiyun /* Reserve a range for qp types internal to the low level driver.
1104*4882a593Smuzhiyun * These qp types will not be visible at the IB core layer, so the
1105*4882a593Smuzhiyun * IB_QPT_MAX usages should not be affected in the core layer
1106*4882a593Smuzhiyun */
1107*4882a593Smuzhiyun IB_QPT_RESERVED1 = 0x1000,
1108*4882a593Smuzhiyun IB_QPT_RESERVED2,
1109*4882a593Smuzhiyun IB_QPT_RESERVED3,
1110*4882a593Smuzhiyun IB_QPT_RESERVED4,
1111*4882a593Smuzhiyun IB_QPT_RESERVED5,
1112*4882a593Smuzhiyun IB_QPT_RESERVED6,
1113*4882a593Smuzhiyun IB_QPT_RESERVED7,
1114*4882a593Smuzhiyun IB_QPT_RESERVED8,
1115*4882a593Smuzhiyun IB_QPT_RESERVED9,
1116*4882a593Smuzhiyun IB_QPT_RESERVED10,
1117*4882a593Smuzhiyun };
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun enum ib_qp_create_flags {
1120*4882a593Smuzhiyun IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
1121*4882a593Smuzhiyun IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK =
1122*4882a593Smuzhiyun IB_UVERBS_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
1123*4882a593Smuzhiyun IB_QP_CREATE_CROSS_CHANNEL = 1 << 2,
1124*4882a593Smuzhiyun IB_QP_CREATE_MANAGED_SEND = 1 << 3,
1125*4882a593Smuzhiyun IB_QP_CREATE_MANAGED_RECV = 1 << 4,
1126*4882a593Smuzhiyun IB_QP_CREATE_NETIF_QP = 1 << 5,
1127*4882a593Smuzhiyun IB_QP_CREATE_INTEGRITY_EN = 1 << 6,
1128*4882a593Smuzhiyun IB_QP_CREATE_NETDEV_USE = 1 << 7,
1129*4882a593Smuzhiyun IB_QP_CREATE_SCATTER_FCS =
1130*4882a593Smuzhiyun IB_UVERBS_QP_CREATE_SCATTER_FCS,
1131*4882a593Smuzhiyun IB_QP_CREATE_CVLAN_STRIPPING =
1132*4882a593Smuzhiyun IB_UVERBS_QP_CREATE_CVLAN_STRIPPING,
1133*4882a593Smuzhiyun IB_QP_CREATE_SOURCE_QPN = 1 << 10,
1134*4882a593Smuzhiyun IB_QP_CREATE_PCI_WRITE_END_PADDING =
1135*4882a593Smuzhiyun IB_UVERBS_QP_CREATE_PCI_WRITE_END_PADDING,
1136*4882a593Smuzhiyun /* reserve bits 26-31 for low level drivers' internal use */
1137*4882a593Smuzhiyun IB_QP_CREATE_RESERVED_START = 1 << 26,
1138*4882a593Smuzhiyun IB_QP_CREATE_RESERVED_END = 1 << 31,
1139*4882a593Smuzhiyun };
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun /*
1142*4882a593Smuzhiyun * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler
1143*4882a593Smuzhiyun * callback to destroy the passed in QP.
1144*4882a593Smuzhiyun */
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun struct ib_qp_init_attr {
1147*4882a593Smuzhiyun /* Consumer's event_handler callback must not block */
1148*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun void *qp_context;
1151*4882a593Smuzhiyun struct ib_cq *send_cq;
1152*4882a593Smuzhiyun struct ib_cq *recv_cq;
1153*4882a593Smuzhiyun struct ib_srq *srq;
1154*4882a593Smuzhiyun struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1155*4882a593Smuzhiyun struct ib_qp_cap cap;
1156*4882a593Smuzhiyun enum ib_sig_type sq_sig_type;
1157*4882a593Smuzhiyun enum ib_qp_type qp_type;
1158*4882a593Smuzhiyun u32 create_flags;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun /*
1161*4882a593Smuzhiyun * Only needed for special QP types, or when using the RW API.
1162*4882a593Smuzhiyun */
1163*4882a593Smuzhiyun u8 port_num;
1164*4882a593Smuzhiyun struct ib_rwq_ind_table *rwq_ind_tbl;
1165*4882a593Smuzhiyun u32 source_qpn;
1166*4882a593Smuzhiyun };
1167*4882a593Smuzhiyun
1168*4882a593Smuzhiyun struct ib_qp_open_attr {
1169*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1170*4882a593Smuzhiyun void *qp_context;
1171*4882a593Smuzhiyun u32 qp_num;
1172*4882a593Smuzhiyun enum ib_qp_type qp_type;
1173*4882a593Smuzhiyun };
1174*4882a593Smuzhiyun
1175*4882a593Smuzhiyun enum ib_rnr_timeout {
1176*4882a593Smuzhiyun IB_RNR_TIMER_655_36 = 0,
1177*4882a593Smuzhiyun IB_RNR_TIMER_000_01 = 1,
1178*4882a593Smuzhiyun IB_RNR_TIMER_000_02 = 2,
1179*4882a593Smuzhiyun IB_RNR_TIMER_000_03 = 3,
1180*4882a593Smuzhiyun IB_RNR_TIMER_000_04 = 4,
1181*4882a593Smuzhiyun IB_RNR_TIMER_000_06 = 5,
1182*4882a593Smuzhiyun IB_RNR_TIMER_000_08 = 6,
1183*4882a593Smuzhiyun IB_RNR_TIMER_000_12 = 7,
1184*4882a593Smuzhiyun IB_RNR_TIMER_000_16 = 8,
1185*4882a593Smuzhiyun IB_RNR_TIMER_000_24 = 9,
1186*4882a593Smuzhiyun IB_RNR_TIMER_000_32 = 10,
1187*4882a593Smuzhiyun IB_RNR_TIMER_000_48 = 11,
1188*4882a593Smuzhiyun IB_RNR_TIMER_000_64 = 12,
1189*4882a593Smuzhiyun IB_RNR_TIMER_000_96 = 13,
1190*4882a593Smuzhiyun IB_RNR_TIMER_001_28 = 14,
1191*4882a593Smuzhiyun IB_RNR_TIMER_001_92 = 15,
1192*4882a593Smuzhiyun IB_RNR_TIMER_002_56 = 16,
1193*4882a593Smuzhiyun IB_RNR_TIMER_003_84 = 17,
1194*4882a593Smuzhiyun IB_RNR_TIMER_005_12 = 18,
1195*4882a593Smuzhiyun IB_RNR_TIMER_007_68 = 19,
1196*4882a593Smuzhiyun IB_RNR_TIMER_010_24 = 20,
1197*4882a593Smuzhiyun IB_RNR_TIMER_015_36 = 21,
1198*4882a593Smuzhiyun IB_RNR_TIMER_020_48 = 22,
1199*4882a593Smuzhiyun IB_RNR_TIMER_030_72 = 23,
1200*4882a593Smuzhiyun IB_RNR_TIMER_040_96 = 24,
1201*4882a593Smuzhiyun IB_RNR_TIMER_061_44 = 25,
1202*4882a593Smuzhiyun IB_RNR_TIMER_081_92 = 26,
1203*4882a593Smuzhiyun IB_RNR_TIMER_122_88 = 27,
1204*4882a593Smuzhiyun IB_RNR_TIMER_163_84 = 28,
1205*4882a593Smuzhiyun IB_RNR_TIMER_245_76 = 29,
1206*4882a593Smuzhiyun IB_RNR_TIMER_327_68 = 30,
1207*4882a593Smuzhiyun IB_RNR_TIMER_491_52 = 31
1208*4882a593Smuzhiyun };
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun enum ib_qp_attr_mask {
1211*4882a593Smuzhiyun IB_QP_STATE = 1,
1212*4882a593Smuzhiyun IB_QP_CUR_STATE = (1<<1),
1213*4882a593Smuzhiyun IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2),
1214*4882a593Smuzhiyun IB_QP_ACCESS_FLAGS = (1<<3),
1215*4882a593Smuzhiyun IB_QP_PKEY_INDEX = (1<<4),
1216*4882a593Smuzhiyun IB_QP_PORT = (1<<5),
1217*4882a593Smuzhiyun IB_QP_QKEY = (1<<6),
1218*4882a593Smuzhiyun IB_QP_AV = (1<<7),
1219*4882a593Smuzhiyun IB_QP_PATH_MTU = (1<<8),
1220*4882a593Smuzhiyun IB_QP_TIMEOUT = (1<<9),
1221*4882a593Smuzhiyun IB_QP_RETRY_CNT = (1<<10),
1222*4882a593Smuzhiyun IB_QP_RNR_RETRY = (1<<11),
1223*4882a593Smuzhiyun IB_QP_RQ_PSN = (1<<12),
1224*4882a593Smuzhiyun IB_QP_MAX_QP_RD_ATOMIC = (1<<13),
1225*4882a593Smuzhiyun IB_QP_ALT_PATH = (1<<14),
1226*4882a593Smuzhiyun IB_QP_MIN_RNR_TIMER = (1<<15),
1227*4882a593Smuzhiyun IB_QP_SQ_PSN = (1<<16),
1228*4882a593Smuzhiyun IB_QP_MAX_DEST_RD_ATOMIC = (1<<17),
1229*4882a593Smuzhiyun IB_QP_PATH_MIG_STATE = (1<<18),
1230*4882a593Smuzhiyun IB_QP_CAP = (1<<19),
1231*4882a593Smuzhiyun IB_QP_DEST_QPN = (1<<20),
1232*4882a593Smuzhiyun IB_QP_RESERVED1 = (1<<21),
1233*4882a593Smuzhiyun IB_QP_RESERVED2 = (1<<22),
1234*4882a593Smuzhiyun IB_QP_RESERVED3 = (1<<23),
1235*4882a593Smuzhiyun IB_QP_RESERVED4 = (1<<24),
1236*4882a593Smuzhiyun IB_QP_RATE_LIMIT = (1<<25),
1237*4882a593Smuzhiyun };
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun enum ib_qp_state {
1240*4882a593Smuzhiyun IB_QPS_RESET,
1241*4882a593Smuzhiyun IB_QPS_INIT,
1242*4882a593Smuzhiyun IB_QPS_RTR,
1243*4882a593Smuzhiyun IB_QPS_RTS,
1244*4882a593Smuzhiyun IB_QPS_SQD,
1245*4882a593Smuzhiyun IB_QPS_SQE,
1246*4882a593Smuzhiyun IB_QPS_ERR
1247*4882a593Smuzhiyun };
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun enum ib_mig_state {
1250*4882a593Smuzhiyun IB_MIG_MIGRATED,
1251*4882a593Smuzhiyun IB_MIG_REARM,
1252*4882a593Smuzhiyun IB_MIG_ARMED
1253*4882a593Smuzhiyun };
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun enum ib_mw_type {
1256*4882a593Smuzhiyun IB_MW_TYPE_1 = 1,
1257*4882a593Smuzhiyun IB_MW_TYPE_2 = 2
1258*4882a593Smuzhiyun };
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun struct ib_qp_attr {
1261*4882a593Smuzhiyun enum ib_qp_state qp_state;
1262*4882a593Smuzhiyun enum ib_qp_state cur_qp_state;
1263*4882a593Smuzhiyun enum ib_mtu path_mtu;
1264*4882a593Smuzhiyun enum ib_mig_state path_mig_state;
1265*4882a593Smuzhiyun u32 qkey;
1266*4882a593Smuzhiyun u32 rq_psn;
1267*4882a593Smuzhiyun u32 sq_psn;
1268*4882a593Smuzhiyun u32 dest_qp_num;
1269*4882a593Smuzhiyun int qp_access_flags;
1270*4882a593Smuzhiyun struct ib_qp_cap cap;
1271*4882a593Smuzhiyun struct rdma_ah_attr ah_attr;
1272*4882a593Smuzhiyun struct rdma_ah_attr alt_ah_attr;
1273*4882a593Smuzhiyun u16 pkey_index;
1274*4882a593Smuzhiyun u16 alt_pkey_index;
1275*4882a593Smuzhiyun u8 en_sqd_async_notify;
1276*4882a593Smuzhiyun u8 sq_draining;
1277*4882a593Smuzhiyun u8 max_rd_atomic;
1278*4882a593Smuzhiyun u8 max_dest_rd_atomic;
1279*4882a593Smuzhiyun u8 min_rnr_timer;
1280*4882a593Smuzhiyun u8 port_num;
1281*4882a593Smuzhiyun u8 timeout;
1282*4882a593Smuzhiyun u8 retry_cnt;
1283*4882a593Smuzhiyun u8 rnr_retry;
1284*4882a593Smuzhiyun u8 alt_port_num;
1285*4882a593Smuzhiyun u8 alt_timeout;
1286*4882a593Smuzhiyun u32 rate_limit;
1287*4882a593Smuzhiyun struct net_device *xmit_slave;
1288*4882a593Smuzhiyun };
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun enum ib_wr_opcode {
1291*4882a593Smuzhiyun /* These are shared with userspace */
1292*4882a593Smuzhiyun IB_WR_RDMA_WRITE = IB_UVERBS_WR_RDMA_WRITE,
1293*4882a593Smuzhiyun IB_WR_RDMA_WRITE_WITH_IMM = IB_UVERBS_WR_RDMA_WRITE_WITH_IMM,
1294*4882a593Smuzhiyun IB_WR_SEND = IB_UVERBS_WR_SEND,
1295*4882a593Smuzhiyun IB_WR_SEND_WITH_IMM = IB_UVERBS_WR_SEND_WITH_IMM,
1296*4882a593Smuzhiyun IB_WR_RDMA_READ = IB_UVERBS_WR_RDMA_READ,
1297*4882a593Smuzhiyun IB_WR_ATOMIC_CMP_AND_SWP = IB_UVERBS_WR_ATOMIC_CMP_AND_SWP,
1298*4882a593Smuzhiyun IB_WR_ATOMIC_FETCH_AND_ADD = IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD,
1299*4882a593Smuzhiyun IB_WR_BIND_MW = IB_UVERBS_WR_BIND_MW,
1300*4882a593Smuzhiyun IB_WR_LSO = IB_UVERBS_WR_TSO,
1301*4882a593Smuzhiyun IB_WR_SEND_WITH_INV = IB_UVERBS_WR_SEND_WITH_INV,
1302*4882a593Smuzhiyun IB_WR_RDMA_READ_WITH_INV = IB_UVERBS_WR_RDMA_READ_WITH_INV,
1303*4882a593Smuzhiyun IB_WR_LOCAL_INV = IB_UVERBS_WR_LOCAL_INV,
1304*4882a593Smuzhiyun IB_WR_MASKED_ATOMIC_CMP_AND_SWP =
1305*4882a593Smuzhiyun IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP,
1306*4882a593Smuzhiyun IB_WR_MASKED_ATOMIC_FETCH_AND_ADD =
1307*4882a593Smuzhiyun IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD,
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun /* These are kernel only and can not be issued by userspace */
1310*4882a593Smuzhiyun IB_WR_REG_MR = 0x20,
1311*4882a593Smuzhiyun IB_WR_REG_MR_INTEGRITY,
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun /* reserve values for low level drivers' internal use.
1314*4882a593Smuzhiyun * These values will not be used at all in the ib core layer.
1315*4882a593Smuzhiyun */
1316*4882a593Smuzhiyun IB_WR_RESERVED1 = 0xf0,
1317*4882a593Smuzhiyun IB_WR_RESERVED2,
1318*4882a593Smuzhiyun IB_WR_RESERVED3,
1319*4882a593Smuzhiyun IB_WR_RESERVED4,
1320*4882a593Smuzhiyun IB_WR_RESERVED5,
1321*4882a593Smuzhiyun IB_WR_RESERVED6,
1322*4882a593Smuzhiyun IB_WR_RESERVED7,
1323*4882a593Smuzhiyun IB_WR_RESERVED8,
1324*4882a593Smuzhiyun IB_WR_RESERVED9,
1325*4882a593Smuzhiyun IB_WR_RESERVED10,
1326*4882a593Smuzhiyun };
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun enum ib_send_flags {
1329*4882a593Smuzhiyun IB_SEND_FENCE = 1,
1330*4882a593Smuzhiyun IB_SEND_SIGNALED = (1<<1),
1331*4882a593Smuzhiyun IB_SEND_SOLICITED = (1<<2),
1332*4882a593Smuzhiyun IB_SEND_INLINE = (1<<3),
1333*4882a593Smuzhiyun IB_SEND_IP_CSUM = (1<<4),
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun /* reserve bits 26-31 for low level drivers' internal use */
1336*4882a593Smuzhiyun IB_SEND_RESERVED_START = (1 << 26),
1337*4882a593Smuzhiyun IB_SEND_RESERVED_END = (1 << 31),
1338*4882a593Smuzhiyun };
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun struct ib_sge {
1341*4882a593Smuzhiyun u64 addr;
1342*4882a593Smuzhiyun u32 length;
1343*4882a593Smuzhiyun u32 lkey;
1344*4882a593Smuzhiyun };
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun struct ib_cqe {
1347*4882a593Smuzhiyun void (*done)(struct ib_cq *cq, struct ib_wc *wc);
1348*4882a593Smuzhiyun };
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun struct ib_send_wr {
1351*4882a593Smuzhiyun struct ib_send_wr *next;
1352*4882a593Smuzhiyun union {
1353*4882a593Smuzhiyun u64 wr_id;
1354*4882a593Smuzhiyun struct ib_cqe *wr_cqe;
1355*4882a593Smuzhiyun };
1356*4882a593Smuzhiyun struct ib_sge *sg_list;
1357*4882a593Smuzhiyun int num_sge;
1358*4882a593Smuzhiyun enum ib_wr_opcode opcode;
1359*4882a593Smuzhiyun int send_flags;
1360*4882a593Smuzhiyun union {
1361*4882a593Smuzhiyun __be32 imm_data;
1362*4882a593Smuzhiyun u32 invalidate_rkey;
1363*4882a593Smuzhiyun } ex;
1364*4882a593Smuzhiyun };
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun struct ib_rdma_wr {
1367*4882a593Smuzhiyun struct ib_send_wr wr;
1368*4882a593Smuzhiyun u64 remote_addr;
1369*4882a593Smuzhiyun u32 rkey;
1370*4882a593Smuzhiyun };
1371*4882a593Smuzhiyun
rdma_wr(const struct ib_send_wr * wr)1372*4882a593Smuzhiyun static inline const struct ib_rdma_wr *rdma_wr(const struct ib_send_wr *wr)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun return container_of(wr, struct ib_rdma_wr, wr);
1375*4882a593Smuzhiyun }
1376*4882a593Smuzhiyun
1377*4882a593Smuzhiyun struct ib_atomic_wr {
1378*4882a593Smuzhiyun struct ib_send_wr wr;
1379*4882a593Smuzhiyun u64 remote_addr;
1380*4882a593Smuzhiyun u64 compare_add;
1381*4882a593Smuzhiyun u64 swap;
1382*4882a593Smuzhiyun u64 compare_add_mask;
1383*4882a593Smuzhiyun u64 swap_mask;
1384*4882a593Smuzhiyun u32 rkey;
1385*4882a593Smuzhiyun };
1386*4882a593Smuzhiyun
atomic_wr(const struct ib_send_wr * wr)1387*4882a593Smuzhiyun static inline const struct ib_atomic_wr *atomic_wr(const struct ib_send_wr *wr)
1388*4882a593Smuzhiyun {
1389*4882a593Smuzhiyun return container_of(wr, struct ib_atomic_wr, wr);
1390*4882a593Smuzhiyun }
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun struct ib_ud_wr {
1393*4882a593Smuzhiyun struct ib_send_wr wr;
1394*4882a593Smuzhiyun struct ib_ah *ah;
1395*4882a593Smuzhiyun void *header;
1396*4882a593Smuzhiyun int hlen;
1397*4882a593Smuzhiyun int mss;
1398*4882a593Smuzhiyun u32 remote_qpn;
1399*4882a593Smuzhiyun u32 remote_qkey;
1400*4882a593Smuzhiyun u16 pkey_index; /* valid for GSI only */
1401*4882a593Smuzhiyun u8 port_num; /* valid for DR SMPs on switch only */
1402*4882a593Smuzhiyun };
1403*4882a593Smuzhiyun
ud_wr(const struct ib_send_wr * wr)1404*4882a593Smuzhiyun static inline const struct ib_ud_wr *ud_wr(const struct ib_send_wr *wr)
1405*4882a593Smuzhiyun {
1406*4882a593Smuzhiyun return container_of(wr, struct ib_ud_wr, wr);
1407*4882a593Smuzhiyun }
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun struct ib_reg_wr {
1410*4882a593Smuzhiyun struct ib_send_wr wr;
1411*4882a593Smuzhiyun struct ib_mr *mr;
1412*4882a593Smuzhiyun u32 key;
1413*4882a593Smuzhiyun int access;
1414*4882a593Smuzhiyun };
1415*4882a593Smuzhiyun
reg_wr(const struct ib_send_wr * wr)1416*4882a593Smuzhiyun static inline const struct ib_reg_wr *reg_wr(const struct ib_send_wr *wr)
1417*4882a593Smuzhiyun {
1418*4882a593Smuzhiyun return container_of(wr, struct ib_reg_wr, wr);
1419*4882a593Smuzhiyun }
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun struct ib_recv_wr {
1422*4882a593Smuzhiyun struct ib_recv_wr *next;
1423*4882a593Smuzhiyun union {
1424*4882a593Smuzhiyun u64 wr_id;
1425*4882a593Smuzhiyun struct ib_cqe *wr_cqe;
1426*4882a593Smuzhiyun };
1427*4882a593Smuzhiyun struct ib_sge *sg_list;
1428*4882a593Smuzhiyun int num_sge;
1429*4882a593Smuzhiyun };
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun enum ib_access_flags {
1432*4882a593Smuzhiyun IB_ACCESS_LOCAL_WRITE = IB_UVERBS_ACCESS_LOCAL_WRITE,
1433*4882a593Smuzhiyun IB_ACCESS_REMOTE_WRITE = IB_UVERBS_ACCESS_REMOTE_WRITE,
1434*4882a593Smuzhiyun IB_ACCESS_REMOTE_READ = IB_UVERBS_ACCESS_REMOTE_READ,
1435*4882a593Smuzhiyun IB_ACCESS_REMOTE_ATOMIC = IB_UVERBS_ACCESS_REMOTE_ATOMIC,
1436*4882a593Smuzhiyun IB_ACCESS_MW_BIND = IB_UVERBS_ACCESS_MW_BIND,
1437*4882a593Smuzhiyun IB_ZERO_BASED = IB_UVERBS_ACCESS_ZERO_BASED,
1438*4882a593Smuzhiyun IB_ACCESS_ON_DEMAND = IB_UVERBS_ACCESS_ON_DEMAND,
1439*4882a593Smuzhiyun IB_ACCESS_HUGETLB = IB_UVERBS_ACCESS_HUGETLB,
1440*4882a593Smuzhiyun IB_ACCESS_RELAXED_ORDERING = IB_UVERBS_ACCESS_RELAXED_ORDERING,
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun IB_ACCESS_OPTIONAL = IB_UVERBS_ACCESS_OPTIONAL_RANGE,
1443*4882a593Smuzhiyun IB_ACCESS_SUPPORTED =
1444*4882a593Smuzhiyun ((IB_ACCESS_HUGETLB << 1) - 1) | IB_ACCESS_OPTIONAL,
1445*4882a593Smuzhiyun };
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun /*
1448*4882a593Smuzhiyun * XXX: these are apparently used for ->rereg_user_mr, no idea why they
1449*4882a593Smuzhiyun * are hidden here instead of a uapi header!
1450*4882a593Smuzhiyun */
1451*4882a593Smuzhiyun enum ib_mr_rereg_flags {
1452*4882a593Smuzhiyun IB_MR_REREG_TRANS = 1,
1453*4882a593Smuzhiyun IB_MR_REREG_PD = (1<<1),
1454*4882a593Smuzhiyun IB_MR_REREG_ACCESS = (1<<2),
1455*4882a593Smuzhiyun IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1)
1456*4882a593Smuzhiyun };
1457*4882a593Smuzhiyun
1458*4882a593Smuzhiyun struct ib_umem;
1459*4882a593Smuzhiyun
1460*4882a593Smuzhiyun enum rdma_remove_reason {
1461*4882a593Smuzhiyun /*
1462*4882a593Smuzhiyun * Userspace requested uobject deletion or initial try
1463*4882a593Smuzhiyun * to remove uobject via cleanup. Call could fail
1464*4882a593Smuzhiyun */
1465*4882a593Smuzhiyun RDMA_REMOVE_DESTROY,
1466*4882a593Smuzhiyun /* Context deletion. This call should delete the actual object itself */
1467*4882a593Smuzhiyun RDMA_REMOVE_CLOSE,
1468*4882a593Smuzhiyun /* Driver is being hot-unplugged. This call should delete the actual object itself */
1469*4882a593Smuzhiyun RDMA_REMOVE_DRIVER_REMOVE,
1470*4882a593Smuzhiyun /* uobj is being cleaned-up before being committed */
1471*4882a593Smuzhiyun RDMA_REMOVE_ABORT,
1472*4882a593Smuzhiyun };
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun struct ib_rdmacg_object {
1475*4882a593Smuzhiyun #ifdef CONFIG_CGROUP_RDMA
1476*4882a593Smuzhiyun struct rdma_cgroup *cg; /* owner rdma cgroup */
1477*4882a593Smuzhiyun #endif
1478*4882a593Smuzhiyun };
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun struct ib_ucontext {
1481*4882a593Smuzhiyun struct ib_device *device;
1482*4882a593Smuzhiyun struct ib_uverbs_file *ufile;
1483*4882a593Smuzhiyun
1484*4882a593Smuzhiyun bool cleanup_retryable;
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun struct ib_rdmacg_object cg_obj;
1487*4882a593Smuzhiyun /*
1488*4882a593Smuzhiyun * Implementation details of the RDMA core, don't use in drivers:
1489*4882a593Smuzhiyun */
1490*4882a593Smuzhiyun struct rdma_restrack_entry res;
1491*4882a593Smuzhiyun struct xarray mmap_xa;
1492*4882a593Smuzhiyun };
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun struct ib_uobject {
1495*4882a593Smuzhiyun u64 user_handle; /* handle given to us by userspace */
1496*4882a593Smuzhiyun /* ufile & ucontext owning this object */
1497*4882a593Smuzhiyun struct ib_uverbs_file *ufile;
1498*4882a593Smuzhiyun /* FIXME, save memory: ufile->context == context */
1499*4882a593Smuzhiyun struct ib_ucontext *context; /* associated user context */
1500*4882a593Smuzhiyun void *object; /* containing object */
1501*4882a593Smuzhiyun struct list_head list; /* link to context's list */
1502*4882a593Smuzhiyun struct ib_rdmacg_object cg_obj; /* rdmacg object */
1503*4882a593Smuzhiyun int id; /* index into kernel idr */
1504*4882a593Smuzhiyun struct kref ref;
1505*4882a593Smuzhiyun atomic_t usecnt; /* protects exclusive access */
1506*4882a593Smuzhiyun struct rcu_head rcu; /* kfree_rcu() overhead */
1507*4882a593Smuzhiyun
1508*4882a593Smuzhiyun const struct uverbs_api_object *uapi_object;
1509*4882a593Smuzhiyun };
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun struct ib_udata {
1512*4882a593Smuzhiyun const void __user *inbuf;
1513*4882a593Smuzhiyun void __user *outbuf;
1514*4882a593Smuzhiyun size_t inlen;
1515*4882a593Smuzhiyun size_t outlen;
1516*4882a593Smuzhiyun };
1517*4882a593Smuzhiyun
1518*4882a593Smuzhiyun struct ib_pd {
1519*4882a593Smuzhiyun u32 local_dma_lkey;
1520*4882a593Smuzhiyun u32 flags;
1521*4882a593Smuzhiyun struct ib_device *device;
1522*4882a593Smuzhiyun struct ib_uobject *uobject;
1523*4882a593Smuzhiyun atomic_t usecnt; /* count all resources */
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun u32 unsafe_global_rkey;
1526*4882a593Smuzhiyun
1527*4882a593Smuzhiyun /*
1528*4882a593Smuzhiyun * Implementation details of the RDMA core, don't use in drivers:
1529*4882a593Smuzhiyun */
1530*4882a593Smuzhiyun struct ib_mr *__internal_mr;
1531*4882a593Smuzhiyun struct rdma_restrack_entry res;
1532*4882a593Smuzhiyun };
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun struct ib_xrcd {
1535*4882a593Smuzhiyun struct ib_device *device;
1536*4882a593Smuzhiyun atomic_t usecnt; /* count all exposed resources */
1537*4882a593Smuzhiyun struct inode *inode;
1538*4882a593Smuzhiyun struct rw_semaphore tgt_qps_rwsem;
1539*4882a593Smuzhiyun struct xarray tgt_qps;
1540*4882a593Smuzhiyun };
1541*4882a593Smuzhiyun
1542*4882a593Smuzhiyun struct ib_ah {
1543*4882a593Smuzhiyun struct ib_device *device;
1544*4882a593Smuzhiyun struct ib_pd *pd;
1545*4882a593Smuzhiyun struct ib_uobject *uobject;
1546*4882a593Smuzhiyun const struct ib_gid_attr *sgid_attr;
1547*4882a593Smuzhiyun enum rdma_ah_attr_type type;
1548*4882a593Smuzhiyun };
1549*4882a593Smuzhiyun
1550*4882a593Smuzhiyun typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context);
1551*4882a593Smuzhiyun
1552*4882a593Smuzhiyun enum ib_poll_context {
1553*4882a593Smuzhiyun IB_POLL_SOFTIRQ, /* poll from softirq context */
1554*4882a593Smuzhiyun IB_POLL_WORKQUEUE, /* poll from workqueue */
1555*4882a593Smuzhiyun IB_POLL_UNBOUND_WORKQUEUE, /* poll from unbound workqueue */
1556*4882a593Smuzhiyun IB_POLL_LAST_POOL_TYPE = IB_POLL_UNBOUND_WORKQUEUE,
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun IB_POLL_DIRECT, /* caller context, no hw completions */
1559*4882a593Smuzhiyun };
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun struct ib_cq {
1562*4882a593Smuzhiyun struct ib_device *device;
1563*4882a593Smuzhiyun struct ib_ucq_object *uobject;
1564*4882a593Smuzhiyun ib_comp_handler comp_handler;
1565*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1566*4882a593Smuzhiyun void *cq_context;
1567*4882a593Smuzhiyun int cqe;
1568*4882a593Smuzhiyun unsigned int cqe_used;
1569*4882a593Smuzhiyun atomic_t usecnt; /* count number of work queues */
1570*4882a593Smuzhiyun enum ib_poll_context poll_ctx;
1571*4882a593Smuzhiyun struct ib_wc *wc;
1572*4882a593Smuzhiyun struct list_head pool_entry;
1573*4882a593Smuzhiyun union {
1574*4882a593Smuzhiyun struct irq_poll iop;
1575*4882a593Smuzhiyun struct work_struct work;
1576*4882a593Smuzhiyun };
1577*4882a593Smuzhiyun struct workqueue_struct *comp_wq;
1578*4882a593Smuzhiyun struct dim *dim;
1579*4882a593Smuzhiyun
1580*4882a593Smuzhiyun /* updated only by trace points */
1581*4882a593Smuzhiyun ktime_t timestamp;
1582*4882a593Smuzhiyun u8 interrupt:1;
1583*4882a593Smuzhiyun u8 shared:1;
1584*4882a593Smuzhiyun unsigned int comp_vector;
1585*4882a593Smuzhiyun
1586*4882a593Smuzhiyun /*
1587*4882a593Smuzhiyun * Implementation details of the RDMA core, don't use in drivers:
1588*4882a593Smuzhiyun */
1589*4882a593Smuzhiyun struct rdma_restrack_entry res;
1590*4882a593Smuzhiyun };
1591*4882a593Smuzhiyun
1592*4882a593Smuzhiyun struct ib_srq {
1593*4882a593Smuzhiyun struct ib_device *device;
1594*4882a593Smuzhiyun struct ib_pd *pd;
1595*4882a593Smuzhiyun struct ib_usrq_object *uobject;
1596*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1597*4882a593Smuzhiyun void *srq_context;
1598*4882a593Smuzhiyun enum ib_srq_type srq_type;
1599*4882a593Smuzhiyun atomic_t usecnt;
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun struct {
1602*4882a593Smuzhiyun struct ib_cq *cq;
1603*4882a593Smuzhiyun union {
1604*4882a593Smuzhiyun struct {
1605*4882a593Smuzhiyun struct ib_xrcd *xrcd;
1606*4882a593Smuzhiyun u32 srq_num;
1607*4882a593Smuzhiyun } xrc;
1608*4882a593Smuzhiyun };
1609*4882a593Smuzhiyun } ext;
1610*4882a593Smuzhiyun };
1611*4882a593Smuzhiyun
1612*4882a593Smuzhiyun enum ib_raw_packet_caps {
1613*4882a593Smuzhiyun /* Strip cvlan from incoming packet and report it in the matching work
1614*4882a593Smuzhiyun * completion is supported.
1615*4882a593Smuzhiyun */
1616*4882a593Smuzhiyun IB_RAW_PACKET_CAP_CVLAN_STRIPPING = (1 << 0),
1617*4882a593Smuzhiyun /* Scatter FCS field of an incoming packet to host memory is supported.
1618*4882a593Smuzhiyun */
1619*4882a593Smuzhiyun IB_RAW_PACKET_CAP_SCATTER_FCS = (1 << 1),
1620*4882a593Smuzhiyun /* Checksum offloads are supported (for both send and receive). */
1621*4882a593Smuzhiyun IB_RAW_PACKET_CAP_IP_CSUM = (1 << 2),
1622*4882a593Smuzhiyun /* When a packet is received for an RQ with no receive WQEs, the
1623*4882a593Smuzhiyun * packet processing is delayed.
1624*4882a593Smuzhiyun */
1625*4882a593Smuzhiyun IB_RAW_PACKET_CAP_DELAY_DROP = (1 << 3),
1626*4882a593Smuzhiyun };
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun enum ib_wq_type {
1629*4882a593Smuzhiyun IB_WQT_RQ = IB_UVERBS_WQT_RQ,
1630*4882a593Smuzhiyun };
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun enum ib_wq_state {
1633*4882a593Smuzhiyun IB_WQS_RESET,
1634*4882a593Smuzhiyun IB_WQS_RDY,
1635*4882a593Smuzhiyun IB_WQS_ERR
1636*4882a593Smuzhiyun };
1637*4882a593Smuzhiyun
1638*4882a593Smuzhiyun struct ib_wq {
1639*4882a593Smuzhiyun struct ib_device *device;
1640*4882a593Smuzhiyun struct ib_uwq_object *uobject;
1641*4882a593Smuzhiyun void *wq_context;
1642*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1643*4882a593Smuzhiyun struct ib_pd *pd;
1644*4882a593Smuzhiyun struct ib_cq *cq;
1645*4882a593Smuzhiyun u32 wq_num;
1646*4882a593Smuzhiyun enum ib_wq_state state;
1647*4882a593Smuzhiyun enum ib_wq_type wq_type;
1648*4882a593Smuzhiyun atomic_t usecnt;
1649*4882a593Smuzhiyun };
1650*4882a593Smuzhiyun
1651*4882a593Smuzhiyun enum ib_wq_flags {
1652*4882a593Smuzhiyun IB_WQ_FLAGS_CVLAN_STRIPPING = IB_UVERBS_WQ_FLAGS_CVLAN_STRIPPING,
1653*4882a593Smuzhiyun IB_WQ_FLAGS_SCATTER_FCS = IB_UVERBS_WQ_FLAGS_SCATTER_FCS,
1654*4882a593Smuzhiyun IB_WQ_FLAGS_DELAY_DROP = IB_UVERBS_WQ_FLAGS_DELAY_DROP,
1655*4882a593Smuzhiyun IB_WQ_FLAGS_PCI_WRITE_END_PADDING =
1656*4882a593Smuzhiyun IB_UVERBS_WQ_FLAGS_PCI_WRITE_END_PADDING,
1657*4882a593Smuzhiyun };
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun struct ib_wq_init_attr {
1660*4882a593Smuzhiyun void *wq_context;
1661*4882a593Smuzhiyun enum ib_wq_type wq_type;
1662*4882a593Smuzhiyun u32 max_wr;
1663*4882a593Smuzhiyun u32 max_sge;
1664*4882a593Smuzhiyun struct ib_cq *cq;
1665*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1666*4882a593Smuzhiyun u32 create_flags; /* Use enum ib_wq_flags */
1667*4882a593Smuzhiyun };
1668*4882a593Smuzhiyun
1669*4882a593Smuzhiyun enum ib_wq_attr_mask {
1670*4882a593Smuzhiyun IB_WQ_STATE = 1 << 0,
1671*4882a593Smuzhiyun IB_WQ_CUR_STATE = 1 << 1,
1672*4882a593Smuzhiyun IB_WQ_FLAGS = 1 << 2,
1673*4882a593Smuzhiyun };
1674*4882a593Smuzhiyun
1675*4882a593Smuzhiyun struct ib_wq_attr {
1676*4882a593Smuzhiyun enum ib_wq_state wq_state;
1677*4882a593Smuzhiyun enum ib_wq_state curr_wq_state;
1678*4882a593Smuzhiyun u32 flags; /* Use enum ib_wq_flags */
1679*4882a593Smuzhiyun u32 flags_mask; /* Use enum ib_wq_flags */
1680*4882a593Smuzhiyun };
1681*4882a593Smuzhiyun
1682*4882a593Smuzhiyun struct ib_rwq_ind_table {
1683*4882a593Smuzhiyun struct ib_device *device;
1684*4882a593Smuzhiyun struct ib_uobject *uobject;
1685*4882a593Smuzhiyun atomic_t usecnt;
1686*4882a593Smuzhiyun u32 ind_tbl_num;
1687*4882a593Smuzhiyun u32 log_ind_tbl_size;
1688*4882a593Smuzhiyun struct ib_wq **ind_tbl;
1689*4882a593Smuzhiyun };
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun struct ib_rwq_ind_table_init_attr {
1692*4882a593Smuzhiyun u32 log_ind_tbl_size;
1693*4882a593Smuzhiyun /* Each entry is a pointer to Receive Work Queue */
1694*4882a593Smuzhiyun struct ib_wq **ind_tbl;
1695*4882a593Smuzhiyun };
1696*4882a593Smuzhiyun
1697*4882a593Smuzhiyun enum port_pkey_state {
1698*4882a593Smuzhiyun IB_PORT_PKEY_NOT_VALID = 0,
1699*4882a593Smuzhiyun IB_PORT_PKEY_VALID = 1,
1700*4882a593Smuzhiyun IB_PORT_PKEY_LISTED = 2,
1701*4882a593Smuzhiyun };
1702*4882a593Smuzhiyun
1703*4882a593Smuzhiyun struct ib_qp_security;
1704*4882a593Smuzhiyun
1705*4882a593Smuzhiyun struct ib_port_pkey {
1706*4882a593Smuzhiyun enum port_pkey_state state;
1707*4882a593Smuzhiyun u16 pkey_index;
1708*4882a593Smuzhiyun u8 port_num;
1709*4882a593Smuzhiyun struct list_head qp_list;
1710*4882a593Smuzhiyun struct list_head to_error_list;
1711*4882a593Smuzhiyun struct ib_qp_security *sec;
1712*4882a593Smuzhiyun };
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun struct ib_ports_pkeys {
1715*4882a593Smuzhiyun struct ib_port_pkey main;
1716*4882a593Smuzhiyun struct ib_port_pkey alt;
1717*4882a593Smuzhiyun };
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun struct ib_qp_security {
1720*4882a593Smuzhiyun struct ib_qp *qp;
1721*4882a593Smuzhiyun struct ib_device *dev;
1722*4882a593Smuzhiyun /* Hold this mutex when changing port and pkey settings. */
1723*4882a593Smuzhiyun struct mutex mutex;
1724*4882a593Smuzhiyun struct ib_ports_pkeys *ports_pkeys;
1725*4882a593Smuzhiyun /* A list of all open shared QP handles. Required to enforce security
1726*4882a593Smuzhiyun * properly for all users of a shared QP.
1727*4882a593Smuzhiyun */
1728*4882a593Smuzhiyun struct list_head shared_qp_list;
1729*4882a593Smuzhiyun void *security;
1730*4882a593Smuzhiyun bool destroying;
1731*4882a593Smuzhiyun atomic_t error_list_count;
1732*4882a593Smuzhiyun struct completion error_complete;
1733*4882a593Smuzhiyun int error_comps_pending;
1734*4882a593Smuzhiyun };
1735*4882a593Smuzhiyun
1736*4882a593Smuzhiyun /*
1737*4882a593Smuzhiyun * @max_write_sge: Maximum SGE elements per RDMA WRITE request.
1738*4882a593Smuzhiyun * @max_read_sge: Maximum SGE elements per RDMA READ request.
1739*4882a593Smuzhiyun */
1740*4882a593Smuzhiyun struct ib_qp {
1741*4882a593Smuzhiyun struct ib_device *device;
1742*4882a593Smuzhiyun struct ib_pd *pd;
1743*4882a593Smuzhiyun struct ib_cq *send_cq;
1744*4882a593Smuzhiyun struct ib_cq *recv_cq;
1745*4882a593Smuzhiyun spinlock_t mr_lock;
1746*4882a593Smuzhiyun int mrs_used;
1747*4882a593Smuzhiyun struct list_head rdma_mrs;
1748*4882a593Smuzhiyun struct list_head sig_mrs;
1749*4882a593Smuzhiyun struct ib_srq *srq;
1750*4882a593Smuzhiyun struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1751*4882a593Smuzhiyun struct list_head xrcd_list;
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun /* count times opened, mcast attaches, flow attaches */
1754*4882a593Smuzhiyun atomic_t usecnt;
1755*4882a593Smuzhiyun struct list_head open_list;
1756*4882a593Smuzhiyun struct ib_qp *real_qp;
1757*4882a593Smuzhiyun struct ib_uqp_object *uobject;
1758*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *);
1759*4882a593Smuzhiyun void *qp_context;
1760*4882a593Smuzhiyun /* sgid_attrs associated with the AV's */
1761*4882a593Smuzhiyun const struct ib_gid_attr *av_sgid_attr;
1762*4882a593Smuzhiyun const struct ib_gid_attr *alt_path_sgid_attr;
1763*4882a593Smuzhiyun u32 qp_num;
1764*4882a593Smuzhiyun u32 max_write_sge;
1765*4882a593Smuzhiyun u32 max_read_sge;
1766*4882a593Smuzhiyun enum ib_qp_type qp_type;
1767*4882a593Smuzhiyun struct ib_rwq_ind_table *rwq_ind_tbl;
1768*4882a593Smuzhiyun struct ib_qp_security *qp_sec;
1769*4882a593Smuzhiyun u8 port;
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun bool integrity_en;
1772*4882a593Smuzhiyun /*
1773*4882a593Smuzhiyun * Implementation details of the RDMA core, don't use in drivers:
1774*4882a593Smuzhiyun */
1775*4882a593Smuzhiyun struct rdma_restrack_entry res;
1776*4882a593Smuzhiyun
1777*4882a593Smuzhiyun /* The counter the qp is bind to */
1778*4882a593Smuzhiyun struct rdma_counter *counter;
1779*4882a593Smuzhiyun };
1780*4882a593Smuzhiyun
1781*4882a593Smuzhiyun struct ib_dm {
1782*4882a593Smuzhiyun struct ib_device *device;
1783*4882a593Smuzhiyun u32 length;
1784*4882a593Smuzhiyun u32 flags;
1785*4882a593Smuzhiyun struct ib_uobject *uobject;
1786*4882a593Smuzhiyun atomic_t usecnt;
1787*4882a593Smuzhiyun };
1788*4882a593Smuzhiyun
1789*4882a593Smuzhiyun struct ib_mr {
1790*4882a593Smuzhiyun struct ib_device *device;
1791*4882a593Smuzhiyun struct ib_pd *pd;
1792*4882a593Smuzhiyun u32 lkey;
1793*4882a593Smuzhiyun u32 rkey;
1794*4882a593Smuzhiyun u64 iova;
1795*4882a593Smuzhiyun u64 length;
1796*4882a593Smuzhiyun unsigned int page_size;
1797*4882a593Smuzhiyun enum ib_mr_type type;
1798*4882a593Smuzhiyun bool need_inval;
1799*4882a593Smuzhiyun union {
1800*4882a593Smuzhiyun struct ib_uobject *uobject; /* user */
1801*4882a593Smuzhiyun struct list_head qp_entry; /* FR */
1802*4882a593Smuzhiyun };
1803*4882a593Smuzhiyun
1804*4882a593Smuzhiyun struct ib_dm *dm;
1805*4882a593Smuzhiyun struct ib_sig_attrs *sig_attrs; /* only for IB_MR_TYPE_INTEGRITY MRs */
1806*4882a593Smuzhiyun /*
1807*4882a593Smuzhiyun * Implementation details of the RDMA core, don't use in drivers:
1808*4882a593Smuzhiyun */
1809*4882a593Smuzhiyun struct rdma_restrack_entry res;
1810*4882a593Smuzhiyun };
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun struct ib_mw {
1813*4882a593Smuzhiyun struct ib_device *device;
1814*4882a593Smuzhiyun struct ib_pd *pd;
1815*4882a593Smuzhiyun struct ib_uobject *uobject;
1816*4882a593Smuzhiyun u32 rkey;
1817*4882a593Smuzhiyun enum ib_mw_type type;
1818*4882a593Smuzhiyun };
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun /* Supported steering options */
1821*4882a593Smuzhiyun enum ib_flow_attr_type {
1822*4882a593Smuzhiyun /* steering according to rule specifications */
1823*4882a593Smuzhiyun IB_FLOW_ATTR_NORMAL = 0x0,
1824*4882a593Smuzhiyun /* default unicast and multicast rule -
1825*4882a593Smuzhiyun * receive all Eth traffic which isn't steered to any QP
1826*4882a593Smuzhiyun */
1827*4882a593Smuzhiyun IB_FLOW_ATTR_ALL_DEFAULT = 0x1,
1828*4882a593Smuzhiyun /* default multicast rule -
1829*4882a593Smuzhiyun * receive all Eth multicast traffic which isn't steered to any QP
1830*4882a593Smuzhiyun */
1831*4882a593Smuzhiyun IB_FLOW_ATTR_MC_DEFAULT = 0x2,
1832*4882a593Smuzhiyun /* sniffer rule - receive all port traffic */
1833*4882a593Smuzhiyun IB_FLOW_ATTR_SNIFFER = 0x3
1834*4882a593Smuzhiyun };
1835*4882a593Smuzhiyun
1836*4882a593Smuzhiyun /* Supported steering header types */
1837*4882a593Smuzhiyun enum ib_flow_spec_type {
1838*4882a593Smuzhiyun /* L2 headers*/
1839*4882a593Smuzhiyun IB_FLOW_SPEC_ETH = 0x20,
1840*4882a593Smuzhiyun IB_FLOW_SPEC_IB = 0x22,
1841*4882a593Smuzhiyun /* L3 header*/
1842*4882a593Smuzhiyun IB_FLOW_SPEC_IPV4 = 0x30,
1843*4882a593Smuzhiyun IB_FLOW_SPEC_IPV6 = 0x31,
1844*4882a593Smuzhiyun IB_FLOW_SPEC_ESP = 0x34,
1845*4882a593Smuzhiyun /* L4 headers*/
1846*4882a593Smuzhiyun IB_FLOW_SPEC_TCP = 0x40,
1847*4882a593Smuzhiyun IB_FLOW_SPEC_UDP = 0x41,
1848*4882a593Smuzhiyun IB_FLOW_SPEC_VXLAN_TUNNEL = 0x50,
1849*4882a593Smuzhiyun IB_FLOW_SPEC_GRE = 0x51,
1850*4882a593Smuzhiyun IB_FLOW_SPEC_MPLS = 0x60,
1851*4882a593Smuzhiyun IB_FLOW_SPEC_INNER = 0x100,
1852*4882a593Smuzhiyun /* Actions */
1853*4882a593Smuzhiyun IB_FLOW_SPEC_ACTION_TAG = 0x1000,
1854*4882a593Smuzhiyun IB_FLOW_SPEC_ACTION_DROP = 0x1001,
1855*4882a593Smuzhiyun IB_FLOW_SPEC_ACTION_HANDLE = 0x1002,
1856*4882a593Smuzhiyun IB_FLOW_SPEC_ACTION_COUNT = 0x1003,
1857*4882a593Smuzhiyun };
1858*4882a593Smuzhiyun #define IB_FLOW_SPEC_LAYER_MASK 0xF0
1859*4882a593Smuzhiyun #define IB_FLOW_SPEC_SUPPORT_LAYERS 10
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun enum ib_flow_flags {
1862*4882a593Smuzhiyun IB_FLOW_ATTR_FLAGS_DONT_TRAP = 1UL << 1, /* Continue match, no steal */
1863*4882a593Smuzhiyun IB_FLOW_ATTR_FLAGS_EGRESS = 1UL << 2, /* Egress flow */
1864*4882a593Smuzhiyun IB_FLOW_ATTR_FLAGS_RESERVED = 1UL << 3 /* Must be last */
1865*4882a593Smuzhiyun };
1866*4882a593Smuzhiyun
1867*4882a593Smuzhiyun struct ib_flow_eth_filter {
1868*4882a593Smuzhiyun u8 dst_mac[6];
1869*4882a593Smuzhiyun u8 src_mac[6];
1870*4882a593Smuzhiyun __be16 ether_type;
1871*4882a593Smuzhiyun __be16 vlan_tag;
1872*4882a593Smuzhiyun /* Must be last */
1873*4882a593Smuzhiyun u8 real_sz[];
1874*4882a593Smuzhiyun };
1875*4882a593Smuzhiyun
1876*4882a593Smuzhiyun struct ib_flow_spec_eth {
1877*4882a593Smuzhiyun u32 type;
1878*4882a593Smuzhiyun u16 size;
1879*4882a593Smuzhiyun struct ib_flow_eth_filter val;
1880*4882a593Smuzhiyun struct ib_flow_eth_filter mask;
1881*4882a593Smuzhiyun };
1882*4882a593Smuzhiyun
1883*4882a593Smuzhiyun struct ib_flow_ib_filter {
1884*4882a593Smuzhiyun __be16 dlid;
1885*4882a593Smuzhiyun __u8 sl;
1886*4882a593Smuzhiyun /* Must be last */
1887*4882a593Smuzhiyun u8 real_sz[];
1888*4882a593Smuzhiyun };
1889*4882a593Smuzhiyun
1890*4882a593Smuzhiyun struct ib_flow_spec_ib {
1891*4882a593Smuzhiyun u32 type;
1892*4882a593Smuzhiyun u16 size;
1893*4882a593Smuzhiyun struct ib_flow_ib_filter val;
1894*4882a593Smuzhiyun struct ib_flow_ib_filter mask;
1895*4882a593Smuzhiyun };
1896*4882a593Smuzhiyun
1897*4882a593Smuzhiyun /* IPv4 header flags */
1898*4882a593Smuzhiyun enum ib_ipv4_flags {
1899*4882a593Smuzhiyun IB_IPV4_DONT_FRAG = 0x2, /* Don't enable packet fragmentation */
1900*4882a593Smuzhiyun IB_IPV4_MORE_FRAG = 0X4 /* For All fragmented packets except the
1901*4882a593Smuzhiyun last have this flag set */
1902*4882a593Smuzhiyun };
1903*4882a593Smuzhiyun
1904*4882a593Smuzhiyun struct ib_flow_ipv4_filter {
1905*4882a593Smuzhiyun __be32 src_ip;
1906*4882a593Smuzhiyun __be32 dst_ip;
1907*4882a593Smuzhiyun u8 proto;
1908*4882a593Smuzhiyun u8 tos;
1909*4882a593Smuzhiyun u8 ttl;
1910*4882a593Smuzhiyun u8 flags;
1911*4882a593Smuzhiyun /* Must be last */
1912*4882a593Smuzhiyun u8 real_sz[];
1913*4882a593Smuzhiyun };
1914*4882a593Smuzhiyun
1915*4882a593Smuzhiyun struct ib_flow_spec_ipv4 {
1916*4882a593Smuzhiyun u32 type;
1917*4882a593Smuzhiyun u16 size;
1918*4882a593Smuzhiyun struct ib_flow_ipv4_filter val;
1919*4882a593Smuzhiyun struct ib_flow_ipv4_filter mask;
1920*4882a593Smuzhiyun };
1921*4882a593Smuzhiyun
1922*4882a593Smuzhiyun struct ib_flow_ipv6_filter {
1923*4882a593Smuzhiyun u8 src_ip[16];
1924*4882a593Smuzhiyun u8 dst_ip[16];
1925*4882a593Smuzhiyun __be32 flow_label;
1926*4882a593Smuzhiyun u8 next_hdr;
1927*4882a593Smuzhiyun u8 traffic_class;
1928*4882a593Smuzhiyun u8 hop_limit;
1929*4882a593Smuzhiyun /* Must be last */
1930*4882a593Smuzhiyun u8 real_sz[];
1931*4882a593Smuzhiyun };
1932*4882a593Smuzhiyun
1933*4882a593Smuzhiyun struct ib_flow_spec_ipv6 {
1934*4882a593Smuzhiyun u32 type;
1935*4882a593Smuzhiyun u16 size;
1936*4882a593Smuzhiyun struct ib_flow_ipv6_filter val;
1937*4882a593Smuzhiyun struct ib_flow_ipv6_filter mask;
1938*4882a593Smuzhiyun };
1939*4882a593Smuzhiyun
1940*4882a593Smuzhiyun struct ib_flow_tcp_udp_filter {
1941*4882a593Smuzhiyun __be16 dst_port;
1942*4882a593Smuzhiyun __be16 src_port;
1943*4882a593Smuzhiyun /* Must be last */
1944*4882a593Smuzhiyun u8 real_sz[];
1945*4882a593Smuzhiyun };
1946*4882a593Smuzhiyun
1947*4882a593Smuzhiyun struct ib_flow_spec_tcp_udp {
1948*4882a593Smuzhiyun u32 type;
1949*4882a593Smuzhiyun u16 size;
1950*4882a593Smuzhiyun struct ib_flow_tcp_udp_filter val;
1951*4882a593Smuzhiyun struct ib_flow_tcp_udp_filter mask;
1952*4882a593Smuzhiyun };
1953*4882a593Smuzhiyun
1954*4882a593Smuzhiyun struct ib_flow_tunnel_filter {
1955*4882a593Smuzhiyun __be32 tunnel_id;
1956*4882a593Smuzhiyun u8 real_sz[];
1957*4882a593Smuzhiyun };
1958*4882a593Smuzhiyun
1959*4882a593Smuzhiyun /* ib_flow_spec_tunnel describes the Vxlan tunnel
1960*4882a593Smuzhiyun * the tunnel_id from val has the vni value
1961*4882a593Smuzhiyun */
1962*4882a593Smuzhiyun struct ib_flow_spec_tunnel {
1963*4882a593Smuzhiyun u32 type;
1964*4882a593Smuzhiyun u16 size;
1965*4882a593Smuzhiyun struct ib_flow_tunnel_filter val;
1966*4882a593Smuzhiyun struct ib_flow_tunnel_filter mask;
1967*4882a593Smuzhiyun };
1968*4882a593Smuzhiyun
1969*4882a593Smuzhiyun struct ib_flow_esp_filter {
1970*4882a593Smuzhiyun __be32 spi;
1971*4882a593Smuzhiyun __be32 seq;
1972*4882a593Smuzhiyun /* Must be last */
1973*4882a593Smuzhiyun u8 real_sz[];
1974*4882a593Smuzhiyun };
1975*4882a593Smuzhiyun
1976*4882a593Smuzhiyun struct ib_flow_spec_esp {
1977*4882a593Smuzhiyun u32 type;
1978*4882a593Smuzhiyun u16 size;
1979*4882a593Smuzhiyun struct ib_flow_esp_filter val;
1980*4882a593Smuzhiyun struct ib_flow_esp_filter mask;
1981*4882a593Smuzhiyun };
1982*4882a593Smuzhiyun
1983*4882a593Smuzhiyun struct ib_flow_gre_filter {
1984*4882a593Smuzhiyun __be16 c_ks_res0_ver;
1985*4882a593Smuzhiyun __be16 protocol;
1986*4882a593Smuzhiyun __be32 key;
1987*4882a593Smuzhiyun /* Must be last */
1988*4882a593Smuzhiyun u8 real_sz[];
1989*4882a593Smuzhiyun };
1990*4882a593Smuzhiyun
1991*4882a593Smuzhiyun struct ib_flow_spec_gre {
1992*4882a593Smuzhiyun u32 type;
1993*4882a593Smuzhiyun u16 size;
1994*4882a593Smuzhiyun struct ib_flow_gre_filter val;
1995*4882a593Smuzhiyun struct ib_flow_gre_filter mask;
1996*4882a593Smuzhiyun };
1997*4882a593Smuzhiyun
1998*4882a593Smuzhiyun struct ib_flow_mpls_filter {
1999*4882a593Smuzhiyun __be32 tag;
2000*4882a593Smuzhiyun /* Must be last */
2001*4882a593Smuzhiyun u8 real_sz[];
2002*4882a593Smuzhiyun };
2003*4882a593Smuzhiyun
2004*4882a593Smuzhiyun struct ib_flow_spec_mpls {
2005*4882a593Smuzhiyun u32 type;
2006*4882a593Smuzhiyun u16 size;
2007*4882a593Smuzhiyun struct ib_flow_mpls_filter val;
2008*4882a593Smuzhiyun struct ib_flow_mpls_filter mask;
2009*4882a593Smuzhiyun };
2010*4882a593Smuzhiyun
2011*4882a593Smuzhiyun struct ib_flow_spec_action_tag {
2012*4882a593Smuzhiyun enum ib_flow_spec_type type;
2013*4882a593Smuzhiyun u16 size;
2014*4882a593Smuzhiyun u32 tag_id;
2015*4882a593Smuzhiyun };
2016*4882a593Smuzhiyun
2017*4882a593Smuzhiyun struct ib_flow_spec_action_drop {
2018*4882a593Smuzhiyun enum ib_flow_spec_type type;
2019*4882a593Smuzhiyun u16 size;
2020*4882a593Smuzhiyun };
2021*4882a593Smuzhiyun
2022*4882a593Smuzhiyun struct ib_flow_spec_action_handle {
2023*4882a593Smuzhiyun enum ib_flow_spec_type type;
2024*4882a593Smuzhiyun u16 size;
2025*4882a593Smuzhiyun struct ib_flow_action *act;
2026*4882a593Smuzhiyun };
2027*4882a593Smuzhiyun
2028*4882a593Smuzhiyun enum ib_counters_description {
2029*4882a593Smuzhiyun IB_COUNTER_PACKETS,
2030*4882a593Smuzhiyun IB_COUNTER_BYTES,
2031*4882a593Smuzhiyun };
2032*4882a593Smuzhiyun
2033*4882a593Smuzhiyun struct ib_flow_spec_action_count {
2034*4882a593Smuzhiyun enum ib_flow_spec_type type;
2035*4882a593Smuzhiyun u16 size;
2036*4882a593Smuzhiyun struct ib_counters *counters;
2037*4882a593Smuzhiyun };
2038*4882a593Smuzhiyun
2039*4882a593Smuzhiyun union ib_flow_spec {
2040*4882a593Smuzhiyun struct {
2041*4882a593Smuzhiyun u32 type;
2042*4882a593Smuzhiyun u16 size;
2043*4882a593Smuzhiyun };
2044*4882a593Smuzhiyun struct ib_flow_spec_eth eth;
2045*4882a593Smuzhiyun struct ib_flow_spec_ib ib;
2046*4882a593Smuzhiyun struct ib_flow_spec_ipv4 ipv4;
2047*4882a593Smuzhiyun struct ib_flow_spec_tcp_udp tcp_udp;
2048*4882a593Smuzhiyun struct ib_flow_spec_ipv6 ipv6;
2049*4882a593Smuzhiyun struct ib_flow_spec_tunnel tunnel;
2050*4882a593Smuzhiyun struct ib_flow_spec_esp esp;
2051*4882a593Smuzhiyun struct ib_flow_spec_gre gre;
2052*4882a593Smuzhiyun struct ib_flow_spec_mpls mpls;
2053*4882a593Smuzhiyun struct ib_flow_spec_action_tag flow_tag;
2054*4882a593Smuzhiyun struct ib_flow_spec_action_drop drop;
2055*4882a593Smuzhiyun struct ib_flow_spec_action_handle action;
2056*4882a593Smuzhiyun struct ib_flow_spec_action_count flow_count;
2057*4882a593Smuzhiyun };
2058*4882a593Smuzhiyun
2059*4882a593Smuzhiyun struct ib_flow_attr {
2060*4882a593Smuzhiyun enum ib_flow_attr_type type;
2061*4882a593Smuzhiyun u16 size;
2062*4882a593Smuzhiyun u16 priority;
2063*4882a593Smuzhiyun u32 flags;
2064*4882a593Smuzhiyun u8 num_of_specs;
2065*4882a593Smuzhiyun u8 port;
2066*4882a593Smuzhiyun union ib_flow_spec flows[];
2067*4882a593Smuzhiyun };
2068*4882a593Smuzhiyun
2069*4882a593Smuzhiyun struct ib_flow {
2070*4882a593Smuzhiyun struct ib_qp *qp;
2071*4882a593Smuzhiyun struct ib_device *device;
2072*4882a593Smuzhiyun struct ib_uobject *uobject;
2073*4882a593Smuzhiyun };
2074*4882a593Smuzhiyun
2075*4882a593Smuzhiyun enum ib_flow_action_type {
2076*4882a593Smuzhiyun IB_FLOW_ACTION_UNSPECIFIED,
2077*4882a593Smuzhiyun IB_FLOW_ACTION_ESP = 1,
2078*4882a593Smuzhiyun };
2079*4882a593Smuzhiyun
2080*4882a593Smuzhiyun struct ib_flow_action_attrs_esp_keymats {
2081*4882a593Smuzhiyun enum ib_uverbs_flow_action_esp_keymat protocol;
2082*4882a593Smuzhiyun union {
2083*4882a593Smuzhiyun struct ib_uverbs_flow_action_esp_keymat_aes_gcm aes_gcm;
2084*4882a593Smuzhiyun } keymat;
2085*4882a593Smuzhiyun };
2086*4882a593Smuzhiyun
2087*4882a593Smuzhiyun struct ib_flow_action_attrs_esp_replays {
2088*4882a593Smuzhiyun enum ib_uverbs_flow_action_esp_replay protocol;
2089*4882a593Smuzhiyun union {
2090*4882a593Smuzhiyun struct ib_uverbs_flow_action_esp_replay_bmp bmp;
2091*4882a593Smuzhiyun } replay;
2092*4882a593Smuzhiyun };
2093*4882a593Smuzhiyun
2094*4882a593Smuzhiyun enum ib_flow_action_attrs_esp_flags {
2095*4882a593Smuzhiyun /* All user-space flags at the top: Use enum ib_uverbs_flow_action_esp_flags
2096*4882a593Smuzhiyun * This is done in order to share the same flags between user-space and
2097*4882a593Smuzhiyun * kernel and spare an unnecessary translation.
2098*4882a593Smuzhiyun */
2099*4882a593Smuzhiyun
2100*4882a593Smuzhiyun /* Kernel flags */
2101*4882a593Smuzhiyun IB_FLOW_ACTION_ESP_FLAGS_ESN_TRIGGERED = 1ULL << 32,
2102*4882a593Smuzhiyun IB_FLOW_ACTION_ESP_FLAGS_MOD_ESP_ATTRS = 1ULL << 33,
2103*4882a593Smuzhiyun };
2104*4882a593Smuzhiyun
2105*4882a593Smuzhiyun struct ib_flow_spec_list {
2106*4882a593Smuzhiyun struct ib_flow_spec_list *next;
2107*4882a593Smuzhiyun union ib_flow_spec spec;
2108*4882a593Smuzhiyun };
2109*4882a593Smuzhiyun
2110*4882a593Smuzhiyun struct ib_flow_action_attrs_esp {
2111*4882a593Smuzhiyun struct ib_flow_action_attrs_esp_keymats *keymat;
2112*4882a593Smuzhiyun struct ib_flow_action_attrs_esp_replays *replay;
2113*4882a593Smuzhiyun struct ib_flow_spec_list *encap;
2114*4882a593Smuzhiyun /* Used only if IB_FLOW_ACTION_ESP_FLAGS_ESN_TRIGGERED is enabled.
2115*4882a593Smuzhiyun * Value of 0 is a valid value.
2116*4882a593Smuzhiyun */
2117*4882a593Smuzhiyun u32 esn;
2118*4882a593Smuzhiyun u32 spi;
2119*4882a593Smuzhiyun u32 seq;
2120*4882a593Smuzhiyun u32 tfc_pad;
2121*4882a593Smuzhiyun /* Use enum ib_flow_action_attrs_esp_flags */
2122*4882a593Smuzhiyun u64 flags;
2123*4882a593Smuzhiyun u64 hard_limit_pkts;
2124*4882a593Smuzhiyun };
2125*4882a593Smuzhiyun
2126*4882a593Smuzhiyun struct ib_flow_action {
2127*4882a593Smuzhiyun struct ib_device *device;
2128*4882a593Smuzhiyun struct ib_uobject *uobject;
2129*4882a593Smuzhiyun enum ib_flow_action_type type;
2130*4882a593Smuzhiyun atomic_t usecnt;
2131*4882a593Smuzhiyun };
2132*4882a593Smuzhiyun
2133*4882a593Smuzhiyun struct ib_mad;
2134*4882a593Smuzhiyun struct ib_grh;
2135*4882a593Smuzhiyun
2136*4882a593Smuzhiyun enum ib_process_mad_flags {
2137*4882a593Smuzhiyun IB_MAD_IGNORE_MKEY = 1,
2138*4882a593Smuzhiyun IB_MAD_IGNORE_BKEY = 2,
2139*4882a593Smuzhiyun IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY
2140*4882a593Smuzhiyun };
2141*4882a593Smuzhiyun
2142*4882a593Smuzhiyun enum ib_mad_result {
2143*4882a593Smuzhiyun IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */
2144*4882a593Smuzhiyun IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */
2145*4882a593Smuzhiyun IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */
2146*4882a593Smuzhiyun IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */
2147*4882a593Smuzhiyun };
2148*4882a593Smuzhiyun
2149*4882a593Smuzhiyun struct ib_port_cache {
2150*4882a593Smuzhiyun u64 subnet_prefix;
2151*4882a593Smuzhiyun struct ib_pkey_cache *pkey;
2152*4882a593Smuzhiyun struct ib_gid_table *gid;
2153*4882a593Smuzhiyun u8 lmc;
2154*4882a593Smuzhiyun enum ib_port_state port_state;
2155*4882a593Smuzhiyun };
2156*4882a593Smuzhiyun
2157*4882a593Smuzhiyun struct ib_port_immutable {
2158*4882a593Smuzhiyun int pkey_tbl_len;
2159*4882a593Smuzhiyun int gid_tbl_len;
2160*4882a593Smuzhiyun u32 core_cap_flags;
2161*4882a593Smuzhiyun u32 max_mad_size;
2162*4882a593Smuzhiyun };
2163*4882a593Smuzhiyun
2164*4882a593Smuzhiyun struct ib_port_data {
2165*4882a593Smuzhiyun struct ib_device *ib_dev;
2166*4882a593Smuzhiyun
2167*4882a593Smuzhiyun struct ib_port_immutable immutable;
2168*4882a593Smuzhiyun
2169*4882a593Smuzhiyun spinlock_t pkey_list_lock;
2170*4882a593Smuzhiyun struct list_head pkey_list;
2171*4882a593Smuzhiyun
2172*4882a593Smuzhiyun struct ib_port_cache cache;
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun spinlock_t netdev_lock;
2175*4882a593Smuzhiyun struct net_device __rcu *netdev;
2176*4882a593Smuzhiyun struct hlist_node ndev_hash_link;
2177*4882a593Smuzhiyun struct rdma_port_counter port_counter;
2178*4882a593Smuzhiyun struct rdma_hw_stats *hw_stats;
2179*4882a593Smuzhiyun };
2180*4882a593Smuzhiyun
2181*4882a593Smuzhiyun /* rdma netdev type - specifies protocol type */
2182*4882a593Smuzhiyun enum rdma_netdev_t {
2183*4882a593Smuzhiyun RDMA_NETDEV_OPA_VNIC,
2184*4882a593Smuzhiyun RDMA_NETDEV_IPOIB,
2185*4882a593Smuzhiyun };
2186*4882a593Smuzhiyun
2187*4882a593Smuzhiyun /**
2188*4882a593Smuzhiyun * struct rdma_netdev - rdma netdev
2189*4882a593Smuzhiyun * For cases where netstack interfacing is required.
2190*4882a593Smuzhiyun */
2191*4882a593Smuzhiyun struct rdma_netdev {
2192*4882a593Smuzhiyun void *clnt_priv;
2193*4882a593Smuzhiyun struct ib_device *hca;
2194*4882a593Smuzhiyun u8 port_num;
2195*4882a593Smuzhiyun int mtu;
2196*4882a593Smuzhiyun
2197*4882a593Smuzhiyun /*
2198*4882a593Smuzhiyun * cleanup function must be specified.
2199*4882a593Smuzhiyun * FIXME: This is only used for OPA_VNIC and that usage should be
2200*4882a593Smuzhiyun * removed too.
2201*4882a593Smuzhiyun */
2202*4882a593Smuzhiyun void (*free_rdma_netdev)(struct net_device *netdev);
2203*4882a593Smuzhiyun
2204*4882a593Smuzhiyun /* control functions */
2205*4882a593Smuzhiyun void (*set_id)(struct net_device *netdev, int id);
2206*4882a593Smuzhiyun /* send packet */
2207*4882a593Smuzhiyun int (*send)(struct net_device *dev, struct sk_buff *skb,
2208*4882a593Smuzhiyun struct ib_ah *address, u32 dqpn);
2209*4882a593Smuzhiyun /* multicast */
2210*4882a593Smuzhiyun int (*attach_mcast)(struct net_device *dev, struct ib_device *hca,
2211*4882a593Smuzhiyun union ib_gid *gid, u16 mlid,
2212*4882a593Smuzhiyun int set_qkey, u32 qkey);
2213*4882a593Smuzhiyun int (*detach_mcast)(struct net_device *dev, struct ib_device *hca,
2214*4882a593Smuzhiyun union ib_gid *gid, u16 mlid);
2215*4882a593Smuzhiyun };
2216*4882a593Smuzhiyun
2217*4882a593Smuzhiyun struct rdma_netdev_alloc_params {
2218*4882a593Smuzhiyun size_t sizeof_priv;
2219*4882a593Smuzhiyun unsigned int txqs;
2220*4882a593Smuzhiyun unsigned int rxqs;
2221*4882a593Smuzhiyun void *param;
2222*4882a593Smuzhiyun
2223*4882a593Smuzhiyun int (*initialize_rdma_netdev)(struct ib_device *device, u8 port_num,
2224*4882a593Smuzhiyun struct net_device *netdev, void *param);
2225*4882a593Smuzhiyun };
2226*4882a593Smuzhiyun
2227*4882a593Smuzhiyun struct ib_odp_counters {
2228*4882a593Smuzhiyun atomic64_t faults;
2229*4882a593Smuzhiyun atomic64_t invalidations;
2230*4882a593Smuzhiyun atomic64_t prefetch;
2231*4882a593Smuzhiyun };
2232*4882a593Smuzhiyun
2233*4882a593Smuzhiyun struct ib_counters {
2234*4882a593Smuzhiyun struct ib_device *device;
2235*4882a593Smuzhiyun struct ib_uobject *uobject;
2236*4882a593Smuzhiyun /* num of objects attached */
2237*4882a593Smuzhiyun atomic_t usecnt;
2238*4882a593Smuzhiyun };
2239*4882a593Smuzhiyun
2240*4882a593Smuzhiyun struct ib_counters_read_attr {
2241*4882a593Smuzhiyun u64 *counters_buff;
2242*4882a593Smuzhiyun u32 ncounters;
2243*4882a593Smuzhiyun u32 flags; /* use enum ib_read_counters_flags */
2244*4882a593Smuzhiyun };
2245*4882a593Smuzhiyun
2246*4882a593Smuzhiyun struct uverbs_attr_bundle;
2247*4882a593Smuzhiyun struct iw_cm_id;
2248*4882a593Smuzhiyun struct iw_cm_conn_param;
2249*4882a593Smuzhiyun
2250*4882a593Smuzhiyun #define INIT_RDMA_OBJ_SIZE(ib_struct, drv_struct, member) \
2251*4882a593Smuzhiyun .size_##ib_struct = \
2252*4882a593Smuzhiyun (sizeof(struct drv_struct) + \
2253*4882a593Smuzhiyun BUILD_BUG_ON_ZERO(offsetof(struct drv_struct, member)) + \
2254*4882a593Smuzhiyun BUILD_BUG_ON_ZERO( \
2255*4882a593Smuzhiyun !__same_type(((struct drv_struct *)NULL)->member, \
2256*4882a593Smuzhiyun struct ib_struct)))
2257*4882a593Smuzhiyun
2258*4882a593Smuzhiyun #define rdma_zalloc_drv_obj_gfp(ib_dev, ib_type, gfp) \
2259*4882a593Smuzhiyun ((struct ib_type *)kzalloc(ib_dev->ops.size_##ib_type, gfp))
2260*4882a593Smuzhiyun
2261*4882a593Smuzhiyun #define rdma_zalloc_drv_obj(ib_dev, ib_type) \
2262*4882a593Smuzhiyun rdma_zalloc_drv_obj_gfp(ib_dev, ib_type, GFP_KERNEL)
2263*4882a593Smuzhiyun
2264*4882a593Smuzhiyun #define DECLARE_RDMA_OBJ_SIZE(ib_struct) size_t size_##ib_struct
2265*4882a593Smuzhiyun
2266*4882a593Smuzhiyun struct rdma_user_mmap_entry {
2267*4882a593Smuzhiyun struct kref ref;
2268*4882a593Smuzhiyun struct ib_ucontext *ucontext;
2269*4882a593Smuzhiyun unsigned long start_pgoff;
2270*4882a593Smuzhiyun size_t npages;
2271*4882a593Smuzhiyun bool driver_removed;
2272*4882a593Smuzhiyun };
2273*4882a593Smuzhiyun
2274*4882a593Smuzhiyun /* Return the offset (in bytes) the user should pass to libc's mmap() */
2275*4882a593Smuzhiyun static inline u64
rdma_user_mmap_get_offset(const struct rdma_user_mmap_entry * entry)2276*4882a593Smuzhiyun rdma_user_mmap_get_offset(const struct rdma_user_mmap_entry *entry)
2277*4882a593Smuzhiyun {
2278*4882a593Smuzhiyun return (u64)entry->start_pgoff << PAGE_SHIFT;
2279*4882a593Smuzhiyun }
2280*4882a593Smuzhiyun
2281*4882a593Smuzhiyun /**
2282*4882a593Smuzhiyun * struct ib_device_ops - InfiniBand device operations
2283*4882a593Smuzhiyun * This structure defines all the InfiniBand device operations, providers will
2284*4882a593Smuzhiyun * need to define the supported operations, otherwise they will be set to null.
2285*4882a593Smuzhiyun */
2286*4882a593Smuzhiyun struct ib_device_ops {
2287*4882a593Smuzhiyun struct module *owner;
2288*4882a593Smuzhiyun enum rdma_driver_id driver_id;
2289*4882a593Smuzhiyun u32 uverbs_abi_ver;
2290*4882a593Smuzhiyun unsigned int uverbs_no_driver_id_binding:1;
2291*4882a593Smuzhiyun
2292*4882a593Smuzhiyun int (*post_send)(struct ib_qp *qp, const struct ib_send_wr *send_wr,
2293*4882a593Smuzhiyun const struct ib_send_wr **bad_send_wr);
2294*4882a593Smuzhiyun int (*post_recv)(struct ib_qp *qp, const struct ib_recv_wr *recv_wr,
2295*4882a593Smuzhiyun const struct ib_recv_wr **bad_recv_wr);
2296*4882a593Smuzhiyun void (*drain_rq)(struct ib_qp *qp);
2297*4882a593Smuzhiyun void (*drain_sq)(struct ib_qp *qp);
2298*4882a593Smuzhiyun int (*poll_cq)(struct ib_cq *cq, int num_entries, struct ib_wc *wc);
2299*4882a593Smuzhiyun int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
2300*4882a593Smuzhiyun int (*req_notify_cq)(struct ib_cq *cq, enum ib_cq_notify_flags flags);
2301*4882a593Smuzhiyun int (*req_ncomp_notif)(struct ib_cq *cq, int wc_cnt);
2302*4882a593Smuzhiyun int (*post_srq_recv)(struct ib_srq *srq,
2303*4882a593Smuzhiyun const struct ib_recv_wr *recv_wr,
2304*4882a593Smuzhiyun const struct ib_recv_wr **bad_recv_wr);
2305*4882a593Smuzhiyun int (*process_mad)(struct ib_device *device, int process_mad_flags,
2306*4882a593Smuzhiyun u8 port_num, const struct ib_wc *in_wc,
2307*4882a593Smuzhiyun const struct ib_grh *in_grh,
2308*4882a593Smuzhiyun const struct ib_mad *in_mad, struct ib_mad *out_mad,
2309*4882a593Smuzhiyun size_t *out_mad_size, u16 *out_mad_pkey_index);
2310*4882a593Smuzhiyun int (*query_device)(struct ib_device *device,
2311*4882a593Smuzhiyun struct ib_device_attr *device_attr,
2312*4882a593Smuzhiyun struct ib_udata *udata);
2313*4882a593Smuzhiyun int (*modify_device)(struct ib_device *device, int device_modify_mask,
2314*4882a593Smuzhiyun struct ib_device_modify *device_modify);
2315*4882a593Smuzhiyun void (*get_dev_fw_str)(struct ib_device *device, char *str);
2316*4882a593Smuzhiyun const struct cpumask *(*get_vector_affinity)(struct ib_device *ibdev,
2317*4882a593Smuzhiyun int comp_vector);
2318*4882a593Smuzhiyun int (*query_port)(struct ib_device *device, u8 port_num,
2319*4882a593Smuzhiyun struct ib_port_attr *port_attr);
2320*4882a593Smuzhiyun int (*modify_port)(struct ib_device *device, u8 port_num,
2321*4882a593Smuzhiyun int port_modify_mask,
2322*4882a593Smuzhiyun struct ib_port_modify *port_modify);
2323*4882a593Smuzhiyun /**
2324*4882a593Smuzhiyun * The following mandatory functions are used only at device
2325*4882a593Smuzhiyun * registration. Keep functions such as these at the end of this
2326*4882a593Smuzhiyun * structure to avoid cache line misses when accessing struct ib_device
2327*4882a593Smuzhiyun * in fast paths.
2328*4882a593Smuzhiyun */
2329*4882a593Smuzhiyun int (*get_port_immutable)(struct ib_device *device, u8 port_num,
2330*4882a593Smuzhiyun struct ib_port_immutable *immutable);
2331*4882a593Smuzhiyun enum rdma_link_layer (*get_link_layer)(struct ib_device *device,
2332*4882a593Smuzhiyun u8 port_num);
2333*4882a593Smuzhiyun /**
2334*4882a593Smuzhiyun * When calling get_netdev, the HW vendor's driver should return the
2335*4882a593Smuzhiyun * net device of device @device at port @port_num or NULL if such
2336*4882a593Smuzhiyun * a net device doesn't exist. The vendor driver should call dev_hold
2337*4882a593Smuzhiyun * on this net device. The HW vendor's device driver must guarantee
2338*4882a593Smuzhiyun * that this function returns NULL before the net device has finished
2339*4882a593Smuzhiyun * NETDEV_UNREGISTER state.
2340*4882a593Smuzhiyun */
2341*4882a593Smuzhiyun struct net_device *(*get_netdev)(struct ib_device *device, u8 port_num);
2342*4882a593Smuzhiyun /**
2343*4882a593Smuzhiyun * rdma netdev operation
2344*4882a593Smuzhiyun *
2345*4882a593Smuzhiyun * Driver implementing alloc_rdma_netdev or rdma_netdev_get_params
2346*4882a593Smuzhiyun * must return -EOPNOTSUPP if it doesn't support the specified type.
2347*4882a593Smuzhiyun */
2348*4882a593Smuzhiyun struct net_device *(*alloc_rdma_netdev)(
2349*4882a593Smuzhiyun struct ib_device *device, u8 port_num, enum rdma_netdev_t type,
2350*4882a593Smuzhiyun const char *name, unsigned char name_assign_type,
2351*4882a593Smuzhiyun void (*setup)(struct net_device *));
2352*4882a593Smuzhiyun
2353*4882a593Smuzhiyun int (*rdma_netdev_get_params)(struct ib_device *device, u8 port_num,
2354*4882a593Smuzhiyun enum rdma_netdev_t type,
2355*4882a593Smuzhiyun struct rdma_netdev_alloc_params *params);
2356*4882a593Smuzhiyun /**
2357*4882a593Smuzhiyun * query_gid should be return GID value for @device, when @port_num
2358*4882a593Smuzhiyun * link layer is either IB or iWarp. It is no-op if @port_num port
2359*4882a593Smuzhiyun * is RoCE link layer.
2360*4882a593Smuzhiyun */
2361*4882a593Smuzhiyun int (*query_gid)(struct ib_device *device, u8 port_num, int index,
2362*4882a593Smuzhiyun union ib_gid *gid);
2363*4882a593Smuzhiyun /**
2364*4882a593Smuzhiyun * When calling add_gid, the HW vendor's driver should add the gid
2365*4882a593Smuzhiyun * of device of port at gid index available at @attr. Meta-info of
2366*4882a593Smuzhiyun * that gid (for example, the network device related to this gid) is
2367*4882a593Smuzhiyun * available at @attr. @context allows the HW vendor driver to store
2368*4882a593Smuzhiyun * extra information together with a GID entry. The HW vendor driver may
2369*4882a593Smuzhiyun * allocate memory to contain this information and store it in @context
2370*4882a593Smuzhiyun * when a new GID entry is written to. Params are consistent until the
2371*4882a593Smuzhiyun * next call of add_gid or delete_gid. The function should return 0 on
2372*4882a593Smuzhiyun * success or error otherwise. The function could be called
2373*4882a593Smuzhiyun * concurrently for different ports. This function is only called when
2374*4882a593Smuzhiyun * roce_gid_table is used.
2375*4882a593Smuzhiyun */
2376*4882a593Smuzhiyun int (*add_gid)(const struct ib_gid_attr *attr, void **context);
2377*4882a593Smuzhiyun /**
2378*4882a593Smuzhiyun * When calling del_gid, the HW vendor's driver should delete the
2379*4882a593Smuzhiyun * gid of device @device at gid index gid_index of port port_num
2380*4882a593Smuzhiyun * available in @attr.
2381*4882a593Smuzhiyun * Upon the deletion of a GID entry, the HW vendor must free any
2382*4882a593Smuzhiyun * allocated memory. The caller will clear @context afterwards.
2383*4882a593Smuzhiyun * This function is only called when roce_gid_table is used.
2384*4882a593Smuzhiyun */
2385*4882a593Smuzhiyun int (*del_gid)(const struct ib_gid_attr *attr, void **context);
2386*4882a593Smuzhiyun int (*query_pkey)(struct ib_device *device, u8 port_num, u16 index,
2387*4882a593Smuzhiyun u16 *pkey);
2388*4882a593Smuzhiyun int (*alloc_ucontext)(struct ib_ucontext *context,
2389*4882a593Smuzhiyun struct ib_udata *udata);
2390*4882a593Smuzhiyun void (*dealloc_ucontext)(struct ib_ucontext *context);
2391*4882a593Smuzhiyun int (*mmap)(struct ib_ucontext *context, struct vm_area_struct *vma);
2392*4882a593Smuzhiyun /**
2393*4882a593Smuzhiyun * This will be called once refcount of an entry in mmap_xa reaches
2394*4882a593Smuzhiyun * zero. The type of the memory that was mapped may differ between
2395*4882a593Smuzhiyun * entries and is opaque to the rdma_user_mmap interface.
2396*4882a593Smuzhiyun * Therefore needs to be implemented by the driver in mmap_free.
2397*4882a593Smuzhiyun */
2398*4882a593Smuzhiyun void (*mmap_free)(struct rdma_user_mmap_entry *entry);
2399*4882a593Smuzhiyun void (*disassociate_ucontext)(struct ib_ucontext *ibcontext);
2400*4882a593Smuzhiyun int (*alloc_pd)(struct ib_pd *pd, struct ib_udata *udata);
2401*4882a593Smuzhiyun int (*dealloc_pd)(struct ib_pd *pd, struct ib_udata *udata);
2402*4882a593Smuzhiyun int (*create_ah)(struct ib_ah *ah, struct rdma_ah_init_attr *attr,
2403*4882a593Smuzhiyun struct ib_udata *udata);
2404*4882a593Smuzhiyun int (*modify_ah)(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
2405*4882a593Smuzhiyun int (*query_ah)(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
2406*4882a593Smuzhiyun int (*destroy_ah)(struct ib_ah *ah, u32 flags);
2407*4882a593Smuzhiyun int (*create_srq)(struct ib_srq *srq,
2408*4882a593Smuzhiyun struct ib_srq_init_attr *srq_init_attr,
2409*4882a593Smuzhiyun struct ib_udata *udata);
2410*4882a593Smuzhiyun int (*modify_srq)(struct ib_srq *srq, struct ib_srq_attr *srq_attr,
2411*4882a593Smuzhiyun enum ib_srq_attr_mask srq_attr_mask,
2412*4882a593Smuzhiyun struct ib_udata *udata);
2413*4882a593Smuzhiyun int (*query_srq)(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
2414*4882a593Smuzhiyun int (*destroy_srq)(struct ib_srq *srq, struct ib_udata *udata);
2415*4882a593Smuzhiyun struct ib_qp *(*create_qp)(struct ib_pd *pd,
2416*4882a593Smuzhiyun struct ib_qp_init_attr *qp_init_attr,
2417*4882a593Smuzhiyun struct ib_udata *udata);
2418*4882a593Smuzhiyun int (*modify_qp)(struct ib_qp *qp, struct ib_qp_attr *qp_attr,
2419*4882a593Smuzhiyun int qp_attr_mask, struct ib_udata *udata);
2420*4882a593Smuzhiyun int (*query_qp)(struct ib_qp *qp, struct ib_qp_attr *qp_attr,
2421*4882a593Smuzhiyun int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr);
2422*4882a593Smuzhiyun int (*destroy_qp)(struct ib_qp *qp, struct ib_udata *udata);
2423*4882a593Smuzhiyun int (*create_cq)(struct ib_cq *cq, const struct ib_cq_init_attr *attr,
2424*4882a593Smuzhiyun struct ib_udata *udata);
2425*4882a593Smuzhiyun int (*modify_cq)(struct ib_cq *cq, u16 cq_count, u16 cq_period);
2426*4882a593Smuzhiyun int (*destroy_cq)(struct ib_cq *cq, struct ib_udata *udata);
2427*4882a593Smuzhiyun int (*resize_cq)(struct ib_cq *cq, int cqe, struct ib_udata *udata);
2428*4882a593Smuzhiyun struct ib_mr *(*get_dma_mr)(struct ib_pd *pd, int mr_access_flags);
2429*4882a593Smuzhiyun struct ib_mr *(*reg_user_mr)(struct ib_pd *pd, u64 start, u64 length,
2430*4882a593Smuzhiyun u64 virt_addr, int mr_access_flags,
2431*4882a593Smuzhiyun struct ib_udata *udata);
2432*4882a593Smuzhiyun int (*rereg_user_mr)(struct ib_mr *mr, int flags, u64 start, u64 length,
2433*4882a593Smuzhiyun u64 virt_addr, int mr_access_flags,
2434*4882a593Smuzhiyun struct ib_pd *pd, struct ib_udata *udata);
2435*4882a593Smuzhiyun int (*dereg_mr)(struct ib_mr *mr, struct ib_udata *udata);
2436*4882a593Smuzhiyun struct ib_mr *(*alloc_mr)(struct ib_pd *pd, enum ib_mr_type mr_type,
2437*4882a593Smuzhiyun u32 max_num_sg);
2438*4882a593Smuzhiyun struct ib_mr *(*alloc_mr_integrity)(struct ib_pd *pd,
2439*4882a593Smuzhiyun u32 max_num_data_sg,
2440*4882a593Smuzhiyun u32 max_num_meta_sg);
2441*4882a593Smuzhiyun int (*advise_mr)(struct ib_pd *pd,
2442*4882a593Smuzhiyun enum ib_uverbs_advise_mr_advice advice, u32 flags,
2443*4882a593Smuzhiyun struct ib_sge *sg_list, u32 num_sge,
2444*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2445*4882a593Smuzhiyun int (*map_mr_sg)(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
2446*4882a593Smuzhiyun unsigned int *sg_offset);
2447*4882a593Smuzhiyun int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
2448*4882a593Smuzhiyun struct ib_mr_status *mr_status);
2449*4882a593Smuzhiyun int (*alloc_mw)(struct ib_mw *mw, struct ib_udata *udata);
2450*4882a593Smuzhiyun int (*dealloc_mw)(struct ib_mw *mw);
2451*4882a593Smuzhiyun int (*attach_mcast)(struct ib_qp *qp, union ib_gid *gid, u16 lid);
2452*4882a593Smuzhiyun int (*detach_mcast)(struct ib_qp *qp, union ib_gid *gid, u16 lid);
2453*4882a593Smuzhiyun int (*alloc_xrcd)(struct ib_xrcd *xrcd, struct ib_udata *udata);
2454*4882a593Smuzhiyun int (*dealloc_xrcd)(struct ib_xrcd *xrcd, struct ib_udata *udata);
2455*4882a593Smuzhiyun struct ib_flow *(*create_flow)(struct ib_qp *qp,
2456*4882a593Smuzhiyun struct ib_flow_attr *flow_attr,
2457*4882a593Smuzhiyun struct ib_udata *udata);
2458*4882a593Smuzhiyun int (*destroy_flow)(struct ib_flow *flow_id);
2459*4882a593Smuzhiyun struct ib_flow_action *(*create_flow_action_esp)(
2460*4882a593Smuzhiyun struct ib_device *device,
2461*4882a593Smuzhiyun const struct ib_flow_action_attrs_esp *attr,
2462*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2463*4882a593Smuzhiyun int (*destroy_flow_action)(struct ib_flow_action *action);
2464*4882a593Smuzhiyun int (*modify_flow_action_esp)(
2465*4882a593Smuzhiyun struct ib_flow_action *action,
2466*4882a593Smuzhiyun const struct ib_flow_action_attrs_esp *attr,
2467*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2468*4882a593Smuzhiyun int (*set_vf_link_state)(struct ib_device *device, int vf, u8 port,
2469*4882a593Smuzhiyun int state);
2470*4882a593Smuzhiyun int (*get_vf_config)(struct ib_device *device, int vf, u8 port,
2471*4882a593Smuzhiyun struct ifla_vf_info *ivf);
2472*4882a593Smuzhiyun int (*get_vf_stats)(struct ib_device *device, int vf, u8 port,
2473*4882a593Smuzhiyun struct ifla_vf_stats *stats);
2474*4882a593Smuzhiyun int (*get_vf_guid)(struct ib_device *device, int vf, u8 port,
2475*4882a593Smuzhiyun struct ifla_vf_guid *node_guid,
2476*4882a593Smuzhiyun struct ifla_vf_guid *port_guid);
2477*4882a593Smuzhiyun int (*set_vf_guid)(struct ib_device *device, int vf, u8 port, u64 guid,
2478*4882a593Smuzhiyun int type);
2479*4882a593Smuzhiyun struct ib_wq *(*create_wq)(struct ib_pd *pd,
2480*4882a593Smuzhiyun struct ib_wq_init_attr *init_attr,
2481*4882a593Smuzhiyun struct ib_udata *udata);
2482*4882a593Smuzhiyun int (*destroy_wq)(struct ib_wq *wq, struct ib_udata *udata);
2483*4882a593Smuzhiyun int (*modify_wq)(struct ib_wq *wq, struct ib_wq_attr *attr,
2484*4882a593Smuzhiyun u32 wq_attr_mask, struct ib_udata *udata);
2485*4882a593Smuzhiyun int (*create_rwq_ind_table)(struct ib_rwq_ind_table *ib_rwq_ind_table,
2486*4882a593Smuzhiyun struct ib_rwq_ind_table_init_attr *init_attr,
2487*4882a593Smuzhiyun struct ib_udata *udata);
2488*4882a593Smuzhiyun int (*destroy_rwq_ind_table)(struct ib_rwq_ind_table *wq_ind_table);
2489*4882a593Smuzhiyun struct ib_dm *(*alloc_dm)(struct ib_device *device,
2490*4882a593Smuzhiyun struct ib_ucontext *context,
2491*4882a593Smuzhiyun struct ib_dm_alloc_attr *attr,
2492*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2493*4882a593Smuzhiyun int (*dealloc_dm)(struct ib_dm *dm, struct uverbs_attr_bundle *attrs);
2494*4882a593Smuzhiyun struct ib_mr *(*reg_dm_mr)(struct ib_pd *pd, struct ib_dm *dm,
2495*4882a593Smuzhiyun struct ib_dm_mr_attr *attr,
2496*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2497*4882a593Smuzhiyun int (*create_counters)(struct ib_counters *counters,
2498*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2499*4882a593Smuzhiyun int (*destroy_counters)(struct ib_counters *counters);
2500*4882a593Smuzhiyun int (*read_counters)(struct ib_counters *counters,
2501*4882a593Smuzhiyun struct ib_counters_read_attr *counters_read_attr,
2502*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2503*4882a593Smuzhiyun int (*map_mr_sg_pi)(struct ib_mr *mr, struct scatterlist *data_sg,
2504*4882a593Smuzhiyun int data_sg_nents, unsigned int *data_sg_offset,
2505*4882a593Smuzhiyun struct scatterlist *meta_sg, int meta_sg_nents,
2506*4882a593Smuzhiyun unsigned int *meta_sg_offset);
2507*4882a593Smuzhiyun
2508*4882a593Smuzhiyun /**
2509*4882a593Smuzhiyun * alloc_hw_stats - Allocate a struct rdma_hw_stats and fill in the
2510*4882a593Smuzhiyun * driver initialized data. The struct is kfree()'ed by the sysfs
2511*4882a593Smuzhiyun * core when the device is removed. A lifespan of -1 in the return
2512*4882a593Smuzhiyun * struct tells the core to set a default lifespan.
2513*4882a593Smuzhiyun */
2514*4882a593Smuzhiyun struct rdma_hw_stats *(*alloc_hw_stats)(struct ib_device *device,
2515*4882a593Smuzhiyun u8 port_num);
2516*4882a593Smuzhiyun /**
2517*4882a593Smuzhiyun * get_hw_stats - Fill in the counter value(s) in the stats struct.
2518*4882a593Smuzhiyun * @index - The index in the value array we wish to have updated, or
2519*4882a593Smuzhiyun * num_counters if we want all stats updated
2520*4882a593Smuzhiyun * Return codes -
2521*4882a593Smuzhiyun * < 0 - Error, no counters updated
2522*4882a593Smuzhiyun * index - Updated the single counter pointed to by index
2523*4882a593Smuzhiyun * num_counters - Updated all counters (will reset the timestamp
2524*4882a593Smuzhiyun * and prevent further calls for lifespan milliseconds)
2525*4882a593Smuzhiyun * Drivers are allowed to update all counters in leiu of just the
2526*4882a593Smuzhiyun * one given in index at their option
2527*4882a593Smuzhiyun */
2528*4882a593Smuzhiyun int (*get_hw_stats)(struct ib_device *device,
2529*4882a593Smuzhiyun struct rdma_hw_stats *stats, u8 port, int index);
2530*4882a593Smuzhiyun /*
2531*4882a593Smuzhiyun * This function is called once for each port when a ib device is
2532*4882a593Smuzhiyun * registered.
2533*4882a593Smuzhiyun */
2534*4882a593Smuzhiyun int (*init_port)(struct ib_device *device, u8 port_num,
2535*4882a593Smuzhiyun struct kobject *port_sysfs);
2536*4882a593Smuzhiyun /**
2537*4882a593Smuzhiyun * Allows rdma drivers to add their own restrack attributes.
2538*4882a593Smuzhiyun */
2539*4882a593Smuzhiyun int (*fill_res_mr_entry)(struct sk_buff *msg, struct ib_mr *ibmr);
2540*4882a593Smuzhiyun int (*fill_res_mr_entry_raw)(struct sk_buff *msg, struct ib_mr *ibmr);
2541*4882a593Smuzhiyun int (*fill_res_cq_entry)(struct sk_buff *msg, struct ib_cq *ibcq);
2542*4882a593Smuzhiyun int (*fill_res_cq_entry_raw)(struct sk_buff *msg, struct ib_cq *ibcq);
2543*4882a593Smuzhiyun int (*fill_res_qp_entry)(struct sk_buff *msg, struct ib_qp *ibqp);
2544*4882a593Smuzhiyun int (*fill_res_qp_entry_raw)(struct sk_buff *msg, struct ib_qp *ibqp);
2545*4882a593Smuzhiyun int (*fill_res_cm_id_entry)(struct sk_buff *msg, struct rdma_cm_id *id);
2546*4882a593Smuzhiyun
2547*4882a593Smuzhiyun /* Device lifecycle callbacks */
2548*4882a593Smuzhiyun /*
2549*4882a593Smuzhiyun * Called after the device becomes registered, before clients are
2550*4882a593Smuzhiyun * attached
2551*4882a593Smuzhiyun */
2552*4882a593Smuzhiyun int (*enable_driver)(struct ib_device *dev);
2553*4882a593Smuzhiyun /*
2554*4882a593Smuzhiyun * This is called as part of ib_dealloc_device().
2555*4882a593Smuzhiyun */
2556*4882a593Smuzhiyun void (*dealloc_driver)(struct ib_device *dev);
2557*4882a593Smuzhiyun
2558*4882a593Smuzhiyun /* iWarp CM callbacks */
2559*4882a593Smuzhiyun void (*iw_add_ref)(struct ib_qp *qp);
2560*4882a593Smuzhiyun void (*iw_rem_ref)(struct ib_qp *qp);
2561*4882a593Smuzhiyun struct ib_qp *(*iw_get_qp)(struct ib_device *device, int qpn);
2562*4882a593Smuzhiyun int (*iw_connect)(struct iw_cm_id *cm_id,
2563*4882a593Smuzhiyun struct iw_cm_conn_param *conn_param);
2564*4882a593Smuzhiyun int (*iw_accept)(struct iw_cm_id *cm_id,
2565*4882a593Smuzhiyun struct iw_cm_conn_param *conn_param);
2566*4882a593Smuzhiyun int (*iw_reject)(struct iw_cm_id *cm_id, const void *pdata,
2567*4882a593Smuzhiyun u8 pdata_len);
2568*4882a593Smuzhiyun int (*iw_create_listen)(struct iw_cm_id *cm_id, int backlog);
2569*4882a593Smuzhiyun int (*iw_destroy_listen)(struct iw_cm_id *cm_id);
2570*4882a593Smuzhiyun /**
2571*4882a593Smuzhiyun * counter_bind_qp - Bind a QP to a counter.
2572*4882a593Smuzhiyun * @counter - The counter to be bound. If counter->id is zero then
2573*4882a593Smuzhiyun * the driver needs to allocate a new counter and set counter->id
2574*4882a593Smuzhiyun */
2575*4882a593Smuzhiyun int (*counter_bind_qp)(struct rdma_counter *counter, struct ib_qp *qp);
2576*4882a593Smuzhiyun /**
2577*4882a593Smuzhiyun * counter_unbind_qp - Unbind the qp from the dynamically-allocated
2578*4882a593Smuzhiyun * counter and bind it onto the default one
2579*4882a593Smuzhiyun */
2580*4882a593Smuzhiyun int (*counter_unbind_qp)(struct ib_qp *qp);
2581*4882a593Smuzhiyun /**
2582*4882a593Smuzhiyun * counter_dealloc -De-allocate the hw counter
2583*4882a593Smuzhiyun */
2584*4882a593Smuzhiyun int (*counter_dealloc)(struct rdma_counter *counter);
2585*4882a593Smuzhiyun /**
2586*4882a593Smuzhiyun * counter_alloc_stats - Allocate a struct rdma_hw_stats and fill in
2587*4882a593Smuzhiyun * the driver initialized data.
2588*4882a593Smuzhiyun */
2589*4882a593Smuzhiyun struct rdma_hw_stats *(*counter_alloc_stats)(
2590*4882a593Smuzhiyun struct rdma_counter *counter);
2591*4882a593Smuzhiyun /**
2592*4882a593Smuzhiyun * counter_update_stats - Query the stats value of this counter
2593*4882a593Smuzhiyun */
2594*4882a593Smuzhiyun int (*counter_update_stats)(struct rdma_counter *counter);
2595*4882a593Smuzhiyun
2596*4882a593Smuzhiyun /**
2597*4882a593Smuzhiyun * Allows rdma drivers to add their own restrack attributes
2598*4882a593Smuzhiyun * dumped via 'rdma stat' iproute2 command.
2599*4882a593Smuzhiyun */
2600*4882a593Smuzhiyun int (*fill_stat_mr_entry)(struct sk_buff *msg, struct ib_mr *ibmr);
2601*4882a593Smuzhiyun
2602*4882a593Smuzhiyun /* query driver for its ucontext properties */
2603*4882a593Smuzhiyun int (*query_ucontext)(struct ib_ucontext *context,
2604*4882a593Smuzhiyun struct uverbs_attr_bundle *attrs);
2605*4882a593Smuzhiyun
2606*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_ah);
2607*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_counters);
2608*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_cq);
2609*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_mw);
2610*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_pd);
2611*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_rwq_ind_table);
2612*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_srq);
2613*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_ucontext);
2614*4882a593Smuzhiyun DECLARE_RDMA_OBJ_SIZE(ib_xrcd);
2615*4882a593Smuzhiyun };
2616*4882a593Smuzhiyun
2617*4882a593Smuzhiyun struct ib_core_device {
2618*4882a593Smuzhiyun /* device must be the first element in structure until,
2619*4882a593Smuzhiyun * union of ib_core_device and device exists in ib_device.
2620*4882a593Smuzhiyun */
2621*4882a593Smuzhiyun struct device dev;
2622*4882a593Smuzhiyun possible_net_t rdma_net;
2623*4882a593Smuzhiyun struct kobject *ports_kobj;
2624*4882a593Smuzhiyun struct list_head port_list;
2625*4882a593Smuzhiyun struct ib_device *owner; /* reach back to owner ib_device */
2626*4882a593Smuzhiyun };
2627*4882a593Smuzhiyun
2628*4882a593Smuzhiyun struct rdma_restrack_root;
2629*4882a593Smuzhiyun struct ib_device {
2630*4882a593Smuzhiyun /* Do not access @dma_device directly from ULP nor from HW drivers. */
2631*4882a593Smuzhiyun struct device *dma_device;
2632*4882a593Smuzhiyun struct ib_device_ops ops;
2633*4882a593Smuzhiyun char name[IB_DEVICE_NAME_MAX];
2634*4882a593Smuzhiyun struct rcu_head rcu_head;
2635*4882a593Smuzhiyun
2636*4882a593Smuzhiyun struct list_head event_handler_list;
2637*4882a593Smuzhiyun /* Protects event_handler_list */
2638*4882a593Smuzhiyun struct rw_semaphore event_handler_rwsem;
2639*4882a593Smuzhiyun
2640*4882a593Smuzhiyun /* Protects QP's event_handler calls and open_qp list */
2641*4882a593Smuzhiyun spinlock_t qp_open_list_lock;
2642*4882a593Smuzhiyun
2643*4882a593Smuzhiyun struct rw_semaphore client_data_rwsem;
2644*4882a593Smuzhiyun struct xarray client_data;
2645*4882a593Smuzhiyun struct mutex unregistration_lock;
2646*4882a593Smuzhiyun
2647*4882a593Smuzhiyun /* Synchronize GID, Pkey cache entries, subnet prefix, LMC */
2648*4882a593Smuzhiyun rwlock_t cache_lock;
2649*4882a593Smuzhiyun /**
2650*4882a593Smuzhiyun * port_data is indexed by port number
2651*4882a593Smuzhiyun */
2652*4882a593Smuzhiyun struct ib_port_data *port_data;
2653*4882a593Smuzhiyun
2654*4882a593Smuzhiyun int num_comp_vectors;
2655*4882a593Smuzhiyun
2656*4882a593Smuzhiyun union {
2657*4882a593Smuzhiyun struct device dev;
2658*4882a593Smuzhiyun struct ib_core_device coredev;
2659*4882a593Smuzhiyun };
2660*4882a593Smuzhiyun
2661*4882a593Smuzhiyun /* First group for device attributes,
2662*4882a593Smuzhiyun * Second group for driver provided attributes (optional).
2663*4882a593Smuzhiyun * It is NULL terminated array.
2664*4882a593Smuzhiyun */
2665*4882a593Smuzhiyun const struct attribute_group *groups[3];
2666*4882a593Smuzhiyun
2667*4882a593Smuzhiyun u64 uverbs_cmd_mask;
2668*4882a593Smuzhiyun u64 uverbs_ex_cmd_mask;
2669*4882a593Smuzhiyun
2670*4882a593Smuzhiyun char node_desc[IB_DEVICE_NODE_DESC_MAX];
2671*4882a593Smuzhiyun __be64 node_guid;
2672*4882a593Smuzhiyun u32 local_dma_lkey;
2673*4882a593Smuzhiyun u16 is_switch:1;
2674*4882a593Smuzhiyun /* Indicates kernel verbs support, should not be used in drivers */
2675*4882a593Smuzhiyun u16 kverbs_provider:1;
2676*4882a593Smuzhiyun /* CQ adaptive moderation (RDMA DIM) */
2677*4882a593Smuzhiyun u16 use_cq_dim:1;
2678*4882a593Smuzhiyun u8 node_type;
2679*4882a593Smuzhiyun u8 phys_port_cnt;
2680*4882a593Smuzhiyun struct ib_device_attr attrs;
2681*4882a593Smuzhiyun struct attribute_group *hw_stats_ag;
2682*4882a593Smuzhiyun struct rdma_hw_stats *hw_stats;
2683*4882a593Smuzhiyun
2684*4882a593Smuzhiyun #ifdef CONFIG_CGROUP_RDMA
2685*4882a593Smuzhiyun struct rdmacg_device cg_device;
2686*4882a593Smuzhiyun #endif
2687*4882a593Smuzhiyun
2688*4882a593Smuzhiyun u32 index;
2689*4882a593Smuzhiyun
2690*4882a593Smuzhiyun spinlock_t cq_pools_lock;
2691*4882a593Smuzhiyun struct list_head cq_pools[IB_POLL_LAST_POOL_TYPE + 1];
2692*4882a593Smuzhiyun
2693*4882a593Smuzhiyun struct rdma_restrack_root *res;
2694*4882a593Smuzhiyun
2695*4882a593Smuzhiyun const struct uapi_definition *driver_def;
2696*4882a593Smuzhiyun
2697*4882a593Smuzhiyun /*
2698*4882a593Smuzhiyun * Positive refcount indicates that the device is currently
2699*4882a593Smuzhiyun * registered and cannot be unregistered.
2700*4882a593Smuzhiyun */
2701*4882a593Smuzhiyun refcount_t refcount;
2702*4882a593Smuzhiyun struct completion unreg_completion;
2703*4882a593Smuzhiyun struct work_struct unregistration_work;
2704*4882a593Smuzhiyun
2705*4882a593Smuzhiyun const struct rdma_link_ops *link_ops;
2706*4882a593Smuzhiyun
2707*4882a593Smuzhiyun /* Protects compat_devs xarray modifications */
2708*4882a593Smuzhiyun struct mutex compat_devs_mutex;
2709*4882a593Smuzhiyun /* Maintains compat devices for each net namespace */
2710*4882a593Smuzhiyun struct xarray compat_devs;
2711*4882a593Smuzhiyun
2712*4882a593Smuzhiyun /* Used by iWarp CM */
2713*4882a593Smuzhiyun char iw_ifname[IFNAMSIZ];
2714*4882a593Smuzhiyun u32 iw_driver_flags;
2715*4882a593Smuzhiyun u32 lag_flags;
2716*4882a593Smuzhiyun };
2717*4882a593Smuzhiyun
2718*4882a593Smuzhiyun struct ib_client_nl_info;
2719*4882a593Smuzhiyun struct ib_client {
2720*4882a593Smuzhiyun const char *name;
2721*4882a593Smuzhiyun int (*add)(struct ib_device *ibdev);
2722*4882a593Smuzhiyun void (*remove)(struct ib_device *, void *client_data);
2723*4882a593Smuzhiyun void (*rename)(struct ib_device *dev, void *client_data);
2724*4882a593Smuzhiyun int (*get_nl_info)(struct ib_device *ibdev, void *client_data,
2725*4882a593Smuzhiyun struct ib_client_nl_info *res);
2726*4882a593Smuzhiyun int (*get_global_nl_info)(struct ib_client_nl_info *res);
2727*4882a593Smuzhiyun
2728*4882a593Smuzhiyun /* Returns the net_dev belonging to this ib_client and matching the
2729*4882a593Smuzhiyun * given parameters.
2730*4882a593Smuzhiyun * @dev: An RDMA device that the net_dev use for communication.
2731*4882a593Smuzhiyun * @port: A physical port number on the RDMA device.
2732*4882a593Smuzhiyun * @pkey: P_Key that the net_dev uses if applicable.
2733*4882a593Smuzhiyun * @gid: A GID that the net_dev uses to communicate.
2734*4882a593Smuzhiyun * @addr: An IP address the net_dev is configured with.
2735*4882a593Smuzhiyun * @client_data: The device's client data set by ib_set_client_data().
2736*4882a593Smuzhiyun *
2737*4882a593Smuzhiyun * An ib_client that implements a net_dev on top of RDMA devices
2738*4882a593Smuzhiyun * (such as IP over IB) should implement this callback, allowing the
2739*4882a593Smuzhiyun * rdma_cm module to find the right net_dev for a given request.
2740*4882a593Smuzhiyun *
2741*4882a593Smuzhiyun * The caller is responsible for calling dev_put on the returned
2742*4882a593Smuzhiyun * netdev. */
2743*4882a593Smuzhiyun struct net_device *(*get_net_dev_by_params)(
2744*4882a593Smuzhiyun struct ib_device *dev,
2745*4882a593Smuzhiyun u8 port,
2746*4882a593Smuzhiyun u16 pkey,
2747*4882a593Smuzhiyun const union ib_gid *gid,
2748*4882a593Smuzhiyun const struct sockaddr *addr,
2749*4882a593Smuzhiyun void *client_data);
2750*4882a593Smuzhiyun
2751*4882a593Smuzhiyun refcount_t uses;
2752*4882a593Smuzhiyun struct completion uses_zero;
2753*4882a593Smuzhiyun u32 client_id;
2754*4882a593Smuzhiyun
2755*4882a593Smuzhiyun /* kverbs are not required by the client */
2756*4882a593Smuzhiyun u8 no_kverbs_req:1;
2757*4882a593Smuzhiyun };
2758*4882a593Smuzhiyun
2759*4882a593Smuzhiyun /*
2760*4882a593Smuzhiyun * IB block DMA iterator
2761*4882a593Smuzhiyun *
2762*4882a593Smuzhiyun * Iterates the DMA-mapped SGL in contiguous memory blocks aligned
2763*4882a593Smuzhiyun * to a HW supported page size.
2764*4882a593Smuzhiyun */
2765*4882a593Smuzhiyun struct ib_block_iter {
2766*4882a593Smuzhiyun /* internal states */
2767*4882a593Smuzhiyun struct scatterlist *__sg; /* sg holding the current aligned block */
2768*4882a593Smuzhiyun dma_addr_t __dma_addr; /* unaligned DMA address of this block */
2769*4882a593Smuzhiyun unsigned int __sg_nents; /* number of SG entries */
2770*4882a593Smuzhiyun unsigned int __sg_advance; /* number of bytes to advance in sg in next step */
2771*4882a593Smuzhiyun unsigned int __pg_bit; /* alignment of current block */
2772*4882a593Smuzhiyun };
2773*4882a593Smuzhiyun
2774*4882a593Smuzhiyun struct ib_device *_ib_alloc_device(size_t size);
2775*4882a593Smuzhiyun #define ib_alloc_device(drv_struct, member) \
2776*4882a593Smuzhiyun container_of(_ib_alloc_device(sizeof(struct drv_struct) + \
2777*4882a593Smuzhiyun BUILD_BUG_ON_ZERO(offsetof( \
2778*4882a593Smuzhiyun struct drv_struct, member))), \
2779*4882a593Smuzhiyun struct drv_struct, member)
2780*4882a593Smuzhiyun
2781*4882a593Smuzhiyun void ib_dealloc_device(struct ib_device *device);
2782*4882a593Smuzhiyun
2783*4882a593Smuzhiyun void ib_get_device_fw_str(struct ib_device *device, char *str);
2784*4882a593Smuzhiyun
2785*4882a593Smuzhiyun int ib_register_device(struct ib_device *device, const char *name,
2786*4882a593Smuzhiyun struct device *dma_device);
2787*4882a593Smuzhiyun void ib_unregister_device(struct ib_device *device);
2788*4882a593Smuzhiyun void ib_unregister_driver(enum rdma_driver_id driver_id);
2789*4882a593Smuzhiyun void ib_unregister_device_and_put(struct ib_device *device);
2790*4882a593Smuzhiyun void ib_unregister_device_queued(struct ib_device *ib_dev);
2791*4882a593Smuzhiyun
2792*4882a593Smuzhiyun int ib_register_client (struct ib_client *client);
2793*4882a593Smuzhiyun void ib_unregister_client(struct ib_client *client);
2794*4882a593Smuzhiyun
2795*4882a593Smuzhiyun void __rdma_block_iter_start(struct ib_block_iter *biter,
2796*4882a593Smuzhiyun struct scatterlist *sglist,
2797*4882a593Smuzhiyun unsigned int nents,
2798*4882a593Smuzhiyun unsigned long pgsz);
2799*4882a593Smuzhiyun bool __rdma_block_iter_next(struct ib_block_iter *biter);
2800*4882a593Smuzhiyun
2801*4882a593Smuzhiyun /**
2802*4882a593Smuzhiyun * rdma_block_iter_dma_address - get the aligned dma address of the current
2803*4882a593Smuzhiyun * block held by the block iterator.
2804*4882a593Smuzhiyun * @biter: block iterator holding the memory block
2805*4882a593Smuzhiyun */
2806*4882a593Smuzhiyun static inline dma_addr_t
rdma_block_iter_dma_address(struct ib_block_iter * biter)2807*4882a593Smuzhiyun rdma_block_iter_dma_address(struct ib_block_iter *biter)
2808*4882a593Smuzhiyun {
2809*4882a593Smuzhiyun return biter->__dma_addr & ~(BIT_ULL(biter->__pg_bit) - 1);
2810*4882a593Smuzhiyun }
2811*4882a593Smuzhiyun
2812*4882a593Smuzhiyun /**
2813*4882a593Smuzhiyun * rdma_for_each_block - iterate over contiguous memory blocks of the sg list
2814*4882a593Smuzhiyun * @sglist: sglist to iterate over
2815*4882a593Smuzhiyun * @biter: block iterator holding the memory block
2816*4882a593Smuzhiyun * @nents: maximum number of sg entries to iterate over
2817*4882a593Smuzhiyun * @pgsz: best HW supported page size to use
2818*4882a593Smuzhiyun *
2819*4882a593Smuzhiyun * Callers may use rdma_block_iter_dma_address() to get each
2820*4882a593Smuzhiyun * blocks aligned DMA address.
2821*4882a593Smuzhiyun */
2822*4882a593Smuzhiyun #define rdma_for_each_block(sglist, biter, nents, pgsz) \
2823*4882a593Smuzhiyun for (__rdma_block_iter_start(biter, sglist, nents, \
2824*4882a593Smuzhiyun pgsz); \
2825*4882a593Smuzhiyun __rdma_block_iter_next(biter);)
2826*4882a593Smuzhiyun
2827*4882a593Smuzhiyun /**
2828*4882a593Smuzhiyun * ib_get_client_data - Get IB client context
2829*4882a593Smuzhiyun * @device:Device to get context for
2830*4882a593Smuzhiyun * @client:Client to get context for
2831*4882a593Smuzhiyun *
2832*4882a593Smuzhiyun * ib_get_client_data() returns the client context data set with
2833*4882a593Smuzhiyun * ib_set_client_data(). This can only be called while the client is
2834*4882a593Smuzhiyun * registered to the device, once the ib_client remove() callback returns this
2835*4882a593Smuzhiyun * cannot be called.
2836*4882a593Smuzhiyun */
ib_get_client_data(struct ib_device * device,struct ib_client * client)2837*4882a593Smuzhiyun static inline void *ib_get_client_data(struct ib_device *device,
2838*4882a593Smuzhiyun struct ib_client *client)
2839*4882a593Smuzhiyun {
2840*4882a593Smuzhiyun return xa_load(&device->client_data, client->client_id);
2841*4882a593Smuzhiyun }
2842*4882a593Smuzhiyun void ib_set_client_data(struct ib_device *device, struct ib_client *client,
2843*4882a593Smuzhiyun void *data);
2844*4882a593Smuzhiyun void ib_set_device_ops(struct ib_device *device,
2845*4882a593Smuzhiyun const struct ib_device_ops *ops);
2846*4882a593Smuzhiyun
2847*4882a593Smuzhiyun int rdma_user_mmap_io(struct ib_ucontext *ucontext, struct vm_area_struct *vma,
2848*4882a593Smuzhiyun unsigned long pfn, unsigned long size, pgprot_t prot,
2849*4882a593Smuzhiyun struct rdma_user_mmap_entry *entry);
2850*4882a593Smuzhiyun int rdma_user_mmap_entry_insert(struct ib_ucontext *ucontext,
2851*4882a593Smuzhiyun struct rdma_user_mmap_entry *entry,
2852*4882a593Smuzhiyun size_t length);
2853*4882a593Smuzhiyun int rdma_user_mmap_entry_insert_range(struct ib_ucontext *ucontext,
2854*4882a593Smuzhiyun struct rdma_user_mmap_entry *entry,
2855*4882a593Smuzhiyun size_t length, u32 min_pgoff,
2856*4882a593Smuzhiyun u32 max_pgoff);
2857*4882a593Smuzhiyun
2858*4882a593Smuzhiyun struct rdma_user_mmap_entry *
2859*4882a593Smuzhiyun rdma_user_mmap_entry_get_pgoff(struct ib_ucontext *ucontext,
2860*4882a593Smuzhiyun unsigned long pgoff);
2861*4882a593Smuzhiyun struct rdma_user_mmap_entry *
2862*4882a593Smuzhiyun rdma_user_mmap_entry_get(struct ib_ucontext *ucontext,
2863*4882a593Smuzhiyun struct vm_area_struct *vma);
2864*4882a593Smuzhiyun void rdma_user_mmap_entry_put(struct rdma_user_mmap_entry *entry);
2865*4882a593Smuzhiyun
2866*4882a593Smuzhiyun void rdma_user_mmap_entry_remove(struct rdma_user_mmap_entry *entry);
2867*4882a593Smuzhiyun
ib_copy_from_udata(void * dest,struct ib_udata * udata,size_t len)2868*4882a593Smuzhiyun static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len)
2869*4882a593Smuzhiyun {
2870*4882a593Smuzhiyun return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0;
2871*4882a593Smuzhiyun }
2872*4882a593Smuzhiyun
ib_copy_to_udata(struct ib_udata * udata,void * src,size_t len)2873*4882a593Smuzhiyun static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len)
2874*4882a593Smuzhiyun {
2875*4882a593Smuzhiyun return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0;
2876*4882a593Smuzhiyun }
2877*4882a593Smuzhiyun
ib_is_buffer_cleared(const void __user * p,size_t len)2878*4882a593Smuzhiyun static inline bool ib_is_buffer_cleared(const void __user *p,
2879*4882a593Smuzhiyun size_t len)
2880*4882a593Smuzhiyun {
2881*4882a593Smuzhiyun bool ret;
2882*4882a593Smuzhiyun u8 *buf;
2883*4882a593Smuzhiyun
2884*4882a593Smuzhiyun if (len > USHRT_MAX)
2885*4882a593Smuzhiyun return false;
2886*4882a593Smuzhiyun
2887*4882a593Smuzhiyun buf = memdup_user(p, len);
2888*4882a593Smuzhiyun if (IS_ERR(buf))
2889*4882a593Smuzhiyun return false;
2890*4882a593Smuzhiyun
2891*4882a593Smuzhiyun ret = !memchr_inv(buf, 0, len);
2892*4882a593Smuzhiyun kfree(buf);
2893*4882a593Smuzhiyun return ret;
2894*4882a593Smuzhiyun }
2895*4882a593Smuzhiyun
ib_is_udata_cleared(struct ib_udata * udata,size_t offset,size_t len)2896*4882a593Smuzhiyun static inline bool ib_is_udata_cleared(struct ib_udata *udata,
2897*4882a593Smuzhiyun size_t offset,
2898*4882a593Smuzhiyun size_t len)
2899*4882a593Smuzhiyun {
2900*4882a593Smuzhiyun return ib_is_buffer_cleared(udata->inbuf + offset, len);
2901*4882a593Smuzhiyun }
2902*4882a593Smuzhiyun
2903*4882a593Smuzhiyun /**
2904*4882a593Smuzhiyun * ib_is_destroy_retryable - Check whether the uobject destruction
2905*4882a593Smuzhiyun * is retryable.
2906*4882a593Smuzhiyun * @ret: The initial destruction return code
2907*4882a593Smuzhiyun * @why: remove reason
2908*4882a593Smuzhiyun * @uobj: The uobject that is destroyed
2909*4882a593Smuzhiyun *
2910*4882a593Smuzhiyun * This function is a helper function that IB layer and low-level drivers
2911*4882a593Smuzhiyun * can use to consider whether the destruction of the given uobject is
2912*4882a593Smuzhiyun * retry-able.
2913*4882a593Smuzhiyun * It checks the original return code, if it wasn't success the destruction
2914*4882a593Smuzhiyun * is retryable according to the ucontext state (i.e. cleanup_retryable) and
2915*4882a593Smuzhiyun * the remove reason. (i.e. why).
2916*4882a593Smuzhiyun * Must be called with the object locked for destroy.
2917*4882a593Smuzhiyun */
ib_is_destroy_retryable(int ret,enum rdma_remove_reason why,struct ib_uobject * uobj)2918*4882a593Smuzhiyun static inline bool ib_is_destroy_retryable(int ret, enum rdma_remove_reason why,
2919*4882a593Smuzhiyun struct ib_uobject *uobj)
2920*4882a593Smuzhiyun {
2921*4882a593Smuzhiyun return ret && (why == RDMA_REMOVE_DESTROY ||
2922*4882a593Smuzhiyun uobj->context->cleanup_retryable);
2923*4882a593Smuzhiyun }
2924*4882a593Smuzhiyun
2925*4882a593Smuzhiyun /**
2926*4882a593Smuzhiyun * ib_destroy_usecnt - Called during destruction to check the usecnt
2927*4882a593Smuzhiyun * @usecnt: The usecnt atomic
2928*4882a593Smuzhiyun * @why: remove reason
2929*4882a593Smuzhiyun * @uobj: The uobject that is destroyed
2930*4882a593Smuzhiyun *
2931*4882a593Smuzhiyun * Non-zero usecnts will block destruction unless destruction was triggered by
2932*4882a593Smuzhiyun * a ucontext cleanup.
2933*4882a593Smuzhiyun */
ib_destroy_usecnt(atomic_t * usecnt,enum rdma_remove_reason why,struct ib_uobject * uobj)2934*4882a593Smuzhiyun static inline int ib_destroy_usecnt(atomic_t *usecnt,
2935*4882a593Smuzhiyun enum rdma_remove_reason why,
2936*4882a593Smuzhiyun struct ib_uobject *uobj)
2937*4882a593Smuzhiyun {
2938*4882a593Smuzhiyun if (atomic_read(usecnt) && ib_is_destroy_retryable(-EBUSY, why, uobj))
2939*4882a593Smuzhiyun return -EBUSY;
2940*4882a593Smuzhiyun return 0;
2941*4882a593Smuzhiyun }
2942*4882a593Smuzhiyun
2943*4882a593Smuzhiyun /**
2944*4882a593Smuzhiyun * ib_modify_qp_is_ok - Check that the supplied attribute mask
2945*4882a593Smuzhiyun * contains all required attributes and no attributes not allowed for
2946*4882a593Smuzhiyun * the given QP state transition.
2947*4882a593Smuzhiyun * @cur_state: Current QP state
2948*4882a593Smuzhiyun * @next_state: Next QP state
2949*4882a593Smuzhiyun * @type: QP type
2950*4882a593Smuzhiyun * @mask: Mask of supplied QP attributes
2951*4882a593Smuzhiyun *
2952*4882a593Smuzhiyun * This function is a helper function that a low-level driver's
2953*4882a593Smuzhiyun * modify_qp method can use to validate the consumer's input. It
2954*4882a593Smuzhiyun * checks that cur_state and next_state are valid QP states, that a
2955*4882a593Smuzhiyun * transition from cur_state to next_state is allowed by the IB spec,
2956*4882a593Smuzhiyun * and that the attribute mask supplied is allowed for the transition.
2957*4882a593Smuzhiyun */
2958*4882a593Smuzhiyun bool ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
2959*4882a593Smuzhiyun enum ib_qp_type type, enum ib_qp_attr_mask mask);
2960*4882a593Smuzhiyun
2961*4882a593Smuzhiyun void ib_register_event_handler(struct ib_event_handler *event_handler);
2962*4882a593Smuzhiyun void ib_unregister_event_handler(struct ib_event_handler *event_handler);
2963*4882a593Smuzhiyun void ib_dispatch_event(const struct ib_event *event);
2964*4882a593Smuzhiyun
2965*4882a593Smuzhiyun int ib_query_port(struct ib_device *device,
2966*4882a593Smuzhiyun u8 port_num, struct ib_port_attr *port_attr);
2967*4882a593Smuzhiyun
2968*4882a593Smuzhiyun enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device,
2969*4882a593Smuzhiyun u8 port_num);
2970*4882a593Smuzhiyun
2971*4882a593Smuzhiyun /**
2972*4882a593Smuzhiyun * rdma_cap_ib_switch - Check if the device is IB switch
2973*4882a593Smuzhiyun * @device: Device to check
2974*4882a593Smuzhiyun *
2975*4882a593Smuzhiyun * Device driver is responsible for setting is_switch bit on
2976*4882a593Smuzhiyun * in ib_device structure at init time.
2977*4882a593Smuzhiyun *
2978*4882a593Smuzhiyun * Return: true if the device is IB switch.
2979*4882a593Smuzhiyun */
rdma_cap_ib_switch(const struct ib_device * device)2980*4882a593Smuzhiyun static inline bool rdma_cap_ib_switch(const struct ib_device *device)
2981*4882a593Smuzhiyun {
2982*4882a593Smuzhiyun return device->is_switch;
2983*4882a593Smuzhiyun }
2984*4882a593Smuzhiyun
2985*4882a593Smuzhiyun /**
2986*4882a593Smuzhiyun * rdma_start_port - Return the first valid port number for the device
2987*4882a593Smuzhiyun * specified
2988*4882a593Smuzhiyun *
2989*4882a593Smuzhiyun * @device: Device to be checked
2990*4882a593Smuzhiyun *
2991*4882a593Smuzhiyun * Return start port number
2992*4882a593Smuzhiyun */
rdma_start_port(const struct ib_device * device)2993*4882a593Smuzhiyun static inline u8 rdma_start_port(const struct ib_device *device)
2994*4882a593Smuzhiyun {
2995*4882a593Smuzhiyun return rdma_cap_ib_switch(device) ? 0 : 1;
2996*4882a593Smuzhiyun }
2997*4882a593Smuzhiyun
2998*4882a593Smuzhiyun /**
2999*4882a593Smuzhiyun * rdma_for_each_port - Iterate over all valid port numbers of the IB device
3000*4882a593Smuzhiyun * @device - The struct ib_device * to iterate over
3001*4882a593Smuzhiyun * @iter - The unsigned int to store the port number
3002*4882a593Smuzhiyun */
3003*4882a593Smuzhiyun #define rdma_for_each_port(device, iter) \
3004*4882a593Smuzhiyun for (iter = rdma_start_port(device + BUILD_BUG_ON_ZERO(!__same_type( \
3005*4882a593Smuzhiyun unsigned int, iter))); \
3006*4882a593Smuzhiyun iter <= rdma_end_port(device); (iter)++)
3007*4882a593Smuzhiyun
3008*4882a593Smuzhiyun /**
3009*4882a593Smuzhiyun * rdma_end_port - Return the last valid port number for the device
3010*4882a593Smuzhiyun * specified
3011*4882a593Smuzhiyun *
3012*4882a593Smuzhiyun * @device: Device to be checked
3013*4882a593Smuzhiyun *
3014*4882a593Smuzhiyun * Return last port number
3015*4882a593Smuzhiyun */
rdma_end_port(const struct ib_device * device)3016*4882a593Smuzhiyun static inline u8 rdma_end_port(const struct ib_device *device)
3017*4882a593Smuzhiyun {
3018*4882a593Smuzhiyun return rdma_cap_ib_switch(device) ? 0 : device->phys_port_cnt;
3019*4882a593Smuzhiyun }
3020*4882a593Smuzhiyun
rdma_is_port_valid(const struct ib_device * device,unsigned int port)3021*4882a593Smuzhiyun static inline int rdma_is_port_valid(const struct ib_device *device,
3022*4882a593Smuzhiyun unsigned int port)
3023*4882a593Smuzhiyun {
3024*4882a593Smuzhiyun return (port >= rdma_start_port(device) &&
3025*4882a593Smuzhiyun port <= rdma_end_port(device));
3026*4882a593Smuzhiyun }
3027*4882a593Smuzhiyun
rdma_is_grh_required(const struct ib_device * device,u8 port_num)3028*4882a593Smuzhiyun static inline bool rdma_is_grh_required(const struct ib_device *device,
3029*4882a593Smuzhiyun u8 port_num)
3030*4882a593Smuzhiyun {
3031*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3032*4882a593Smuzhiyun RDMA_CORE_PORT_IB_GRH_REQUIRED;
3033*4882a593Smuzhiyun }
3034*4882a593Smuzhiyun
rdma_protocol_ib(const struct ib_device * device,u8 port_num)3035*4882a593Smuzhiyun static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num)
3036*4882a593Smuzhiyun {
3037*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3038*4882a593Smuzhiyun RDMA_CORE_CAP_PROT_IB;
3039*4882a593Smuzhiyun }
3040*4882a593Smuzhiyun
rdma_protocol_roce(const struct ib_device * device,u8 port_num)3041*4882a593Smuzhiyun static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num)
3042*4882a593Smuzhiyun {
3043*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3044*4882a593Smuzhiyun (RDMA_CORE_CAP_PROT_ROCE | RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP);
3045*4882a593Smuzhiyun }
3046*4882a593Smuzhiyun
rdma_protocol_roce_udp_encap(const struct ib_device * device,u8 port_num)3047*4882a593Smuzhiyun static inline bool rdma_protocol_roce_udp_encap(const struct ib_device *device, u8 port_num)
3048*4882a593Smuzhiyun {
3049*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3050*4882a593Smuzhiyun RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP;
3051*4882a593Smuzhiyun }
3052*4882a593Smuzhiyun
rdma_protocol_roce_eth_encap(const struct ib_device * device,u8 port_num)3053*4882a593Smuzhiyun static inline bool rdma_protocol_roce_eth_encap(const struct ib_device *device, u8 port_num)
3054*4882a593Smuzhiyun {
3055*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3056*4882a593Smuzhiyun RDMA_CORE_CAP_PROT_ROCE;
3057*4882a593Smuzhiyun }
3058*4882a593Smuzhiyun
rdma_protocol_iwarp(const struct ib_device * device,u8 port_num)3059*4882a593Smuzhiyun static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num)
3060*4882a593Smuzhiyun {
3061*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3062*4882a593Smuzhiyun RDMA_CORE_CAP_PROT_IWARP;
3063*4882a593Smuzhiyun }
3064*4882a593Smuzhiyun
rdma_ib_or_roce(const struct ib_device * device,u8 port_num)3065*4882a593Smuzhiyun static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num)
3066*4882a593Smuzhiyun {
3067*4882a593Smuzhiyun return rdma_protocol_ib(device, port_num) ||
3068*4882a593Smuzhiyun rdma_protocol_roce(device, port_num);
3069*4882a593Smuzhiyun }
3070*4882a593Smuzhiyun
rdma_protocol_raw_packet(const struct ib_device * device,u8 port_num)3071*4882a593Smuzhiyun static inline bool rdma_protocol_raw_packet(const struct ib_device *device, u8 port_num)
3072*4882a593Smuzhiyun {
3073*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3074*4882a593Smuzhiyun RDMA_CORE_CAP_PROT_RAW_PACKET;
3075*4882a593Smuzhiyun }
3076*4882a593Smuzhiyun
rdma_protocol_usnic(const struct ib_device * device,u8 port_num)3077*4882a593Smuzhiyun static inline bool rdma_protocol_usnic(const struct ib_device *device, u8 port_num)
3078*4882a593Smuzhiyun {
3079*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3080*4882a593Smuzhiyun RDMA_CORE_CAP_PROT_USNIC;
3081*4882a593Smuzhiyun }
3082*4882a593Smuzhiyun
3083*4882a593Smuzhiyun /**
3084*4882a593Smuzhiyun * rdma_cap_ib_mad - Check if the port of a device supports Infiniband
3085*4882a593Smuzhiyun * Management Datagrams.
3086*4882a593Smuzhiyun * @device: Device to check
3087*4882a593Smuzhiyun * @port_num: Port number to check
3088*4882a593Smuzhiyun *
3089*4882a593Smuzhiyun * Management Datagrams (MAD) are a required part of the InfiniBand
3090*4882a593Smuzhiyun * specification and are supported on all InfiniBand devices. A slightly
3091*4882a593Smuzhiyun * extended version are also supported on OPA interfaces.
3092*4882a593Smuzhiyun *
3093*4882a593Smuzhiyun * Return: true if the port supports sending/receiving of MAD packets.
3094*4882a593Smuzhiyun */
rdma_cap_ib_mad(const struct ib_device * device,u8 port_num)3095*4882a593Smuzhiyun static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num)
3096*4882a593Smuzhiyun {
3097*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3098*4882a593Smuzhiyun RDMA_CORE_CAP_IB_MAD;
3099*4882a593Smuzhiyun }
3100*4882a593Smuzhiyun
3101*4882a593Smuzhiyun /**
3102*4882a593Smuzhiyun * rdma_cap_opa_mad - Check if the port of device provides support for OPA
3103*4882a593Smuzhiyun * Management Datagrams.
3104*4882a593Smuzhiyun * @device: Device to check
3105*4882a593Smuzhiyun * @port_num: Port number to check
3106*4882a593Smuzhiyun *
3107*4882a593Smuzhiyun * Intel OmniPath devices extend and/or replace the InfiniBand Management
3108*4882a593Smuzhiyun * datagrams with their own versions. These OPA MADs share many but not all of
3109*4882a593Smuzhiyun * the characteristics of InfiniBand MADs.
3110*4882a593Smuzhiyun *
3111*4882a593Smuzhiyun * OPA MADs differ in the following ways:
3112*4882a593Smuzhiyun *
3113*4882a593Smuzhiyun * 1) MADs are variable size up to 2K
3114*4882a593Smuzhiyun * IBTA defined MADs remain fixed at 256 bytes
3115*4882a593Smuzhiyun * 2) OPA SMPs must carry valid PKeys
3116*4882a593Smuzhiyun * 3) OPA SMP packets are a different format
3117*4882a593Smuzhiyun *
3118*4882a593Smuzhiyun * Return: true if the port supports OPA MAD packet formats.
3119*4882a593Smuzhiyun */
rdma_cap_opa_mad(struct ib_device * device,u8 port_num)3120*4882a593Smuzhiyun static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num)
3121*4882a593Smuzhiyun {
3122*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3123*4882a593Smuzhiyun RDMA_CORE_CAP_OPA_MAD;
3124*4882a593Smuzhiyun }
3125*4882a593Smuzhiyun
3126*4882a593Smuzhiyun /**
3127*4882a593Smuzhiyun * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband
3128*4882a593Smuzhiyun * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI).
3129*4882a593Smuzhiyun * @device: Device to check
3130*4882a593Smuzhiyun * @port_num: Port number to check
3131*4882a593Smuzhiyun *
3132*4882a593Smuzhiyun * Each InfiniBand node is required to provide a Subnet Management Agent
3133*4882a593Smuzhiyun * that the subnet manager can access. Prior to the fabric being fully
3134*4882a593Smuzhiyun * configured by the subnet manager, the SMA is accessed via a well known
3135*4882a593Smuzhiyun * interface called the Subnet Management Interface (SMI). This interface
3136*4882a593Smuzhiyun * uses directed route packets to communicate with the SM to get around the
3137*4882a593Smuzhiyun * chicken and egg problem of the SM needing to know what's on the fabric
3138*4882a593Smuzhiyun * in order to configure the fabric, and needing to configure the fabric in
3139*4882a593Smuzhiyun * order to send packets to the devices on the fabric. These directed
3140*4882a593Smuzhiyun * route packets do not need the fabric fully configured in order to reach
3141*4882a593Smuzhiyun * their destination. The SMI is the only method allowed to send
3142*4882a593Smuzhiyun * directed route packets on an InfiniBand fabric.
3143*4882a593Smuzhiyun *
3144*4882a593Smuzhiyun * Return: true if the port provides an SMI.
3145*4882a593Smuzhiyun */
rdma_cap_ib_smi(const struct ib_device * device,u8 port_num)3146*4882a593Smuzhiyun static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num)
3147*4882a593Smuzhiyun {
3148*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3149*4882a593Smuzhiyun RDMA_CORE_CAP_IB_SMI;
3150*4882a593Smuzhiyun }
3151*4882a593Smuzhiyun
3152*4882a593Smuzhiyun /**
3153*4882a593Smuzhiyun * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband
3154*4882a593Smuzhiyun * Communication Manager.
3155*4882a593Smuzhiyun * @device: Device to check
3156*4882a593Smuzhiyun * @port_num: Port number to check
3157*4882a593Smuzhiyun *
3158*4882a593Smuzhiyun * The InfiniBand Communication Manager is one of many pre-defined General
3159*4882a593Smuzhiyun * Service Agents (GSA) that are accessed via the General Service
3160*4882a593Smuzhiyun * Interface (GSI). It's role is to facilitate establishment of connections
3161*4882a593Smuzhiyun * between nodes as well as other management related tasks for established
3162*4882a593Smuzhiyun * connections.
3163*4882a593Smuzhiyun *
3164*4882a593Smuzhiyun * Return: true if the port supports an IB CM (this does not guarantee that
3165*4882a593Smuzhiyun * a CM is actually running however).
3166*4882a593Smuzhiyun */
rdma_cap_ib_cm(const struct ib_device * device,u8 port_num)3167*4882a593Smuzhiyun static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num)
3168*4882a593Smuzhiyun {
3169*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3170*4882a593Smuzhiyun RDMA_CORE_CAP_IB_CM;
3171*4882a593Smuzhiyun }
3172*4882a593Smuzhiyun
3173*4882a593Smuzhiyun /**
3174*4882a593Smuzhiyun * rdma_cap_iw_cm - Check if the port of device has the capability IWARP
3175*4882a593Smuzhiyun * Communication Manager.
3176*4882a593Smuzhiyun * @device: Device to check
3177*4882a593Smuzhiyun * @port_num: Port number to check
3178*4882a593Smuzhiyun *
3179*4882a593Smuzhiyun * Similar to above, but specific to iWARP connections which have a different
3180*4882a593Smuzhiyun * managment protocol than InfiniBand.
3181*4882a593Smuzhiyun *
3182*4882a593Smuzhiyun * Return: true if the port supports an iWARP CM (this does not guarantee that
3183*4882a593Smuzhiyun * a CM is actually running however).
3184*4882a593Smuzhiyun */
rdma_cap_iw_cm(const struct ib_device * device,u8 port_num)3185*4882a593Smuzhiyun static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num)
3186*4882a593Smuzhiyun {
3187*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3188*4882a593Smuzhiyun RDMA_CORE_CAP_IW_CM;
3189*4882a593Smuzhiyun }
3190*4882a593Smuzhiyun
3191*4882a593Smuzhiyun /**
3192*4882a593Smuzhiyun * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband
3193*4882a593Smuzhiyun * Subnet Administration.
3194*4882a593Smuzhiyun * @device: Device to check
3195*4882a593Smuzhiyun * @port_num: Port number to check
3196*4882a593Smuzhiyun *
3197*4882a593Smuzhiyun * An InfiniBand Subnet Administration (SA) service is a pre-defined General
3198*4882a593Smuzhiyun * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand
3199*4882a593Smuzhiyun * fabrics, devices should resolve routes to other hosts by contacting the
3200*4882a593Smuzhiyun * SA to query the proper route.
3201*4882a593Smuzhiyun *
3202*4882a593Smuzhiyun * Return: true if the port should act as a client to the fabric Subnet
3203*4882a593Smuzhiyun * Administration interface. This does not imply that the SA service is
3204*4882a593Smuzhiyun * running locally.
3205*4882a593Smuzhiyun */
rdma_cap_ib_sa(const struct ib_device * device,u8 port_num)3206*4882a593Smuzhiyun static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num)
3207*4882a593Smuzhiyun {
3208*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3209*4882a593Smuzhiyun RDMA_CORE_CAP_IB_SA;
3210*4882a593Smuzhiyun }
3211*4882a593Smuzhiyun
3212*4882a593Smuzhiyun /**
3213*4882a593Smuzhiyun * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband
3214*4882a593Smuzhiyun * Multicast.
3215*4882a593Smuzhiyun * @device: Device to check
3216*4882a593Smuzhiyun * @port_num: Port number to check
3217*4882a593Smuzhiyun *
3218*4882a593Smuzhiyun * InfiniBand multicast registration is more complex than normal IPv4 or
3219*4882a593Smuzhiyun * IPv6 multicast registration. Each Host Channel Adapter must register
3220*4882a593Smuzhiyun * with the Subnet Manager when it wishes to join a multicast group. It
3221*4882a593Smuzhiyun * should do so only once regardless of how many queue pairs it subscribes
3222*4882a593Smuzhiyun * to this group. And it should leave the group only after all queue pairs
3223*4882a593Smuzhiyun * attached to the group have been detached.
3224*4882a593Smuzhiyun *
3225*4882a593Smuzhiyun * Return: true if the port must undertake the additional adminstrative
3226*4882a593Smuzhiyun * overhead of registering/unregistering with the SM and tracking of the
3227*4882a593Smuzhiyun * total number of queue pairs attached to the multicast group.
3228*4882a593Smuzhiyun */
rdma_cap_ib_mcast(const struct ib_device * device,u8 port_num)3229*4882a593Smuzhiyun static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num)
3230*4882a593Smuzhiyun {
3231*4882a593Smuzhiyun return rdma_cap_ib_sa(device, port_num);
3232*4882a593Smuzhiyun }
3233*4882a593Smuzhiyun
3234*4882a593Smuzhiyun /**
3235*4882a593Smuzhiyun * rdma_cap_af_ib - Check if the port of device has the capability
3236*4882a593Smuzhiyun * Native Infiniband Address.
3237*4882a593Smuzhiyun * @device: Device to check
3238*4882a593Smuzhiyun * @port_num: Port number to check
3239*4882a593Smuzhiyun *
3240*4882a593Smuzhiyun * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default
3241*4882a593Smuzhiyun * GID. RoCE uses a different mechanism, but still generates a GID via
3242*4882a593Smuzhiyun * a prescribed mechanism and port specific data.
3243*4882a593Smuzhiyun *
3244*4882a593Smuzhiyun * Return: true if the port uses a GID address to identify devices on the
3245*4882a593Smuzhiyun * network.
3246*4882a593Smuzhiyun */
rdma_cap_af_ib(const struct ib_device * device,u8 port_num)3247*4882a593Smuzhiyun static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num)
3248*4882a593Smuzhiyun {
3249*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3250*4882a593Smuzhiyun RDMA_CORE_CAP_AF_IB;
3251*4882a593Smuzhiyun }
3252*4882a593Smuzhiyun
3253*4882a593Smuzhiyun /**
3254*4882a593Smuzhiyun * rdma_cap_eth_ah - Check if the port of device has the capability
3255*4882a593Smuzhiyun * Ethernet Address Handle.
3256*4882a593Smuzhiyun * @device: Device to check
3257*4882a593Smuzhiyun * @port_num: Port number to check
3258*4882a593Smuzhiyun *
3259*4882a593Smuzhiyun * RoCE is InfiniBand over Ethernet, and it uses a well defined technique
3260*4882a593Smuzhiyun * to fabricate GIDs over Ethernet/IP specific addresses native to the
3261*4882a593Smuzhiyun * port. Normally, packet headers are generated by the sending host
3262*4882a593Smuzhiyun * adapter, but when sending connectionless datagrams, we must manually
3263*4882a593Smuzhiyun * inject the proper headers for the fabric we are communicating over.
3264*4882a593Smuzhiyun *
3265*4882a593Smuzhiyun * Return: true if we are running as a RoCE port and must force the
3266*4882a593Smuzhiyun * addition of a Global Route Header built from our Ethernet Address
3267*4882a593Smuzhiyun * Handle into our header list for connectionless packets.
3268*4882a593Smuzhiyun */
rdma_cap_eth_ah(const struct ib_device * device,u8 port_num)3269*4882a593Smuzhiyun static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num)
3270*4882a593Smuzhiyun {
3271*4882a593Smuzhiyun return device->port_data[port_num].immutable.core_cap_flags &
3272*4882a593Smuzhiyun RDMA_CORE_CAP_ETH_AH;
3273*4882a593Smuzhiyun }
3274*4882a593Smuzhiyun
3275*4882a593Smuzhiyun /**
3276*4882a593Smuzhiyun * rdma_cap_opa_ah - Check if the port of device supports
3277*4882a593Smuzhiyun * OPA Address handles
3278*4882a593Smuzhiyun * @device: Device to check
3279*4882a593Smuzhiyun * @port_num: Port number to check
3280*4882a593Smuzhiyun *
3281*4882a593Smuzhiyun * Return: true if we are running on an OPA device which supports
3282*4882a593Smuzhiyun * the extended OPA addressing.
3283*4882a593Smuzhiyun */
rdma_cap_opa_ah(struct ib_device * device,u8 port_num)3284*4882a593Smuzhiyun static inline bool rdma_cap_opa_ah(struct ib_device *device, u8 port_num)
3285*4882a593Smuzhiyun {
3286*4882a593Smuzhiyun return (device->port_data[port_num].immutable.core_cap_flags &
3287*4882a593Smuzhiyun RDMA_CORE_CAP_OPA_AH) == RDMA_CORE_CAP_OPA_AH;
3288*4882a593Smuzhiyun }
3289*4882a593Smuzhiyun
3290*4882a593Smuzhiyun /**
3291*4882a593Smuzhiyun * rdma_max_mad_size - Return the max MAD size required by this RDMA Port.
3292*4882a593Smuzhiyun *
3293*4882a593Smuzhiyun * @device: Device
3294*4882a593Smuzhiyun * @port_num: Port number
3295*4882a593Smuzhiyun *
3296*4882a593Smuzhiyun * This MAD size includes the MAD headers and MAD payload. No other headers
3297*4882a593Smuzhiyun * are included.
3298*4882a593Smuzhiyun *
3299*4882a593Smuzhiyun * Return the max MAD size required by the Port. Will return 0 if the port
3300*4882a593Smuzhiyun * does not support MADs
3301*4882a593Smuzhiyun */
rdma_max_mad_size(const struct ib_device * device,u8 port_num)3302*4882a593Smuzhiyun static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num)
3303*4882a593Smuzhiyun {
3304*4882a593Smuzhiyun return device->port_data[port_num].immutable.max_mad_size;
3305*4882a593Smuzhiyun }
3306*4882a593Smuzhiyun
3307*4882a593Smuzhiyun /**
3308*4882a593Smuzhiyun * rdma_cap_roce_gid_table - Check if the port of device uses roce_gid_table
3309*4882a593Smuzhiyun * @device: Device to check
3310*4882a593Smuzhiyun * @port_num: Port number to check
3311*4882a593Smuzhiyun *
3312*4882a593Smuzhiyun * RoCE GID table mechanism manages the various GIDs for a device.
3313*4882a593Smuzhiyun *
3314*4882a593Smuzhiyun * NOTE: if allocating the port's GID table has failed, this call will still
3315*4882a593Smuzhiyun * return true, but any RoCE GID table API will fail.
3316*4882a593Smuzhiyun *
3317*4882a593Smuzhiyun * Return: true if the port uses RoCE GID table mechanism in order to manage
3318*4882a593Smuzhiyun * its GIDs.
3319*4882a593Smuzhiyun */
rdma_cap_roce_gid_table(const struct ib_device * device,u8 port_num)3320*4882a593Smuzhiyun static inline bool rdma_cap_roce_gid_table(const struct ib_device *device,
3321*4882a593Smuzhiyun u8 port_num)
3322*4882a593Smuzhiyun {
3323*4882a593Smuzhiyun return rdma_protocol_roce(device, port_num) &&
3324*4882a593Smuzhiyun device->ops.add_gid && device->ops.del_gid;
3325*4882a593Smuzhiyun }
3326*4882a593Smuzhiyun
3327*4882a593Smuzhiyun /*
3328*4882a593Smuzhiyun * Check if the device supports READ W/ INVALIDATE.
3329*4882a593Smuzhiyun */
rdma_cap_read_inv(struct ib_device * dev,u32 port_num)3330*4882a593Smuzhiyun static inline bool rdma_cap_read_inv(struct ib_device *dev, u32 port_num)
3331*4882a593Smuzhiyun {
3332*4882a593Smuzhiyun /*
3333*4882a593Smuzhiyun * iWarp drivers must support READ W/ INVALIDATE. No other protocol
3334*4882a593Smuzhiyun * has support for it yet.
3335*4882a593Smuzhiyun */
3336*4882a593Smuzhiyun return rdma_protocol_iwarp(dev, port_num);
3337*4882a593Smuzhiyun }
3338*4882a593Smuzhiyun
3339*4882a593Smuzhiyun /**
3340*4882a593Smuzhiyun * rdma_core_cap_opa_port - Return whether the RDMA Port is OPA or not.
3341*4882a593Smuzhiyun * @device: Device
3342*4882a593Smuzhiyun * @port_num: 1 based Port number
3343*4882a593Smuzhiyun *
3344*4882a593Smuzhiyun * Return true if port is an Intel OPA port , false if not
3345*4882a593Smuzhiyun */
rdma_core_cap_opa_port(struct ib_device * device,u32 port_num)3346*4882a593Smuzhiyun static inline bool rdma_core_cap_opa_port(struct ib_device *device,
3347*4882a593Smuzhiyun u32 port_num)
3348*4882a593Smuzhiyun {
3349*4882a593Smuzhiyun return (device->port_data[port_num].immutable.core_cap_flags &
3350*4882a593Smuzhiyun RDMA_CORE_PORT_INTEL_OPA) == RDMA_CORE_PORT_INTEL_OPA;
3351*4882a593Smuzhiyun }
3352*4882a593Smuzhiyun
3353*4882a593Smuzhiyun /**
3354*4882a593Smuzhiyun * rdma_mtu_enum_to_int - Return the mtu of the port as an integer value.
3355*4882a593Smuzhiyun * @device: Device
3356*4882a593Smuzhiyun * @port_num: Port number
3357*4882a593Smuzhiyun * @mtu: enum value of MTU
3358*4882a593Smuzhiyun *
3359*4882a593Smuzhiyun * Return the MTU size supported by the port as an integer value. Will return
3360*4882a593Smuzhiyun * -1 if enum value of mtu is not supported.
3361*4882a593Smuzhiyun */
rdma_mtu_enum_to_int(struct ib_device * device,u8 port,int mtu)3362*4882a593Smuzhiyun static inline int rdma_mtu_enum_to_int(struct ib_device *device, u8 port,
3363*4882a593Smuzhiyun int mtu)
3364*4882a593Smuzhiyun {
3365*4882a593Smuzhiyun if (rdma_core_cap_opa_port(device, port))
3366*4882a593Smuzhiyun return opa_mtu_enum_to_int((enum opa_mtu)mtu);
3367*4882a593Smuzhiyun else
3368*4882a593Smuzhiyun return ib_mtu_enum_to_int((enum ib_mtu)mtu);
3369*4882a593Smuzhiyun }
3370*4882a593Smuzhiyun
3371*4882a593Smuzhiyun /**
3372*4882a593Smuzhiyun * rdma_mtu_from_attr - Return the mtu of the port from the port attribute.
3373*4882a593Smuzhiyun * @device: Device
3374*4882a593Smuzhiyun * @port_num: Port number
3375*4882a593Smuzhiyun * @attr: port attribute
3376*4882a593Smuzhiyun *
3377*4882a593Smuzhiyun * Return the MTU size supported by the port as an integer value.
3378*4882a593Smuzhiyun */
rdma_mtu_from_attr(struct ib_device * device,u8 port,struct ib_port_attr * attr)3379*4882a593Smuzhiyun static inline int rdma_mtu_from_attr(struct ib_device *device, u8 port,
3380*4882a593Smuzhiyun struct ib_port_attr *attr)
3381*4882a593Smuzhiyun {
3382*4882a593Smuzhiyun if (rdma_core_cap_opa_port(device, port))
3383*4882a593Smuzhiyun return attr->phys_mtu;
3384*4882a593Smuzhiyun else
3385*4882a593Smuzhiyun return ib_mtu_enum_to_int(attr->max_mtu);
3386*4882a593Smuzhiyun }
3387*4882a593Smuzhiyun
3388*4882a593Smuzhiyun int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
3389*4882a593Smuzhiyun int state);
3390*4882a593Smuzhiyun int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
3391*4882a593Smuzhiyun struct ifla_vf_info *info);
3392*4882a593Smuzhiyun int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
3393*4882a593Smuzhiyun struct ifla_vf_stats *stats);
3394*4882a593Smuzhiyun int ib_get_vf_guid(struct ib_device *device, int vf, u8 port,
3395*4882a593Smuzhiyun struct ifla_vf_guid *node_guid,
3396*4882a593Smuzhiyun struct ifla_vf_guid *port_guid);
3397*4882a593Smuzhiyun int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
3398*4882a593Smuzhiyun int type);
3399*4882a593Smuzhiyun
3400*4882a593Smuzhiyun int ib_query_pkey(struct ib_device *device,
3401*4882a593Smuzhiyun u8 port_num, u16 index, u16 *pkey);
3402*4882a593Smuzhiyun
3403*4882a593Smuzhiyun int ib_modify_device(struct ib_device *device,
3404*4882a593Smuzhiyun int device_modify_mask,
3405*4882a593Smuzhiyun struct ib_device_modify *device_modify);
3406*4882a593Smuzhiyun
3407*4882a593Smuzhiyun int ib_modify_port(struct ib_device *device,
3408*4882a593Smuzhiyun u8 port_num, int port_modify_mask,
3409*4882a593Smuzhiyun struct ib_port_modify *port_modify);
3410*4882a593Smuzhiyun
3411*4882a593Smuzhiyun int ib_find_gid(struct ib_device *device, union ib_gid *gid,
3412*4882a593Smuzhiyun u8 *port_num, u16 *index);
3413*4882a593Smuzhiyun
3414*4882a593Smuzhiyun int ib_find_pkey(struct ib_device *device,
3415*4882a593Smuzhiyun u8 port_num, u16 pkey, u16 *index);
3416*4882a593Smuzhiyun
3417*4882a593Smuzhiyun enum ib_pd_flags {
3418*4882a593Smuzhiyun /*
3419*4882a593Smuzhiyun * Create a memory registration for all memory in the system and place
3420*4882a593Smuzhiyun * the rkey for it into pd->unsafe_global_rkey. This can be used by
3421*4882a593Smuzhiyun * ULPs to avoid the overhead of dynamic MRs.
3422*4882a593Smuzhiyun *
3423*4882a593Smuzhiyun * This flag is generally considered unsafe and must only be used in
3424*4882a593Smuzhiyun * extremly trusted environments. Every use of it will log a warning
3425*4882a593Smuzhiyun * in the kernel log.
3426*4882a593Smuzhiyun */
3427*4882a593Smuzhiyun IB_PD_UNSAFE_GLOBAL_RKEY = 0x01,
3428*4882a593Smuzhiyun };
3429*4882a593Smuzhiyun
3430*4882a593Smuzhiyun struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags,
3431*4882a593Smuzhiyun const char *caller);
3432*4882a593Smuzhiyun
3433*4882a593Smuzhiyun #define ib_alloc_pd(device, flags) \
3434*4882a593Smuzhiyun __ib_alloc_pd((device), (flags), KBUILD_MODNAME)
3435*4882a593Smuzhiyun
3436*4882a593Smuzhiyun int ib_dealloc_pd_user(struct ib_pd *pd, struct ib_udata *udata);
3437*4882a593Smuzhiyun
3438*4882a593Smuzhiyun /**
3439*4882a593Smuzhiyun * ib_dealloc_pd - Deallocate kernel PD
3440*4882a593Smuzhiyun * @pd: The protection domain
3441*4882a593Smuzhiyun *
3442*4882a593Smuzhiyun * NOTE: for user PD use ib_dealloc_pd_user with valid udata!
3443*4882a593Smuzhiyun */
ib_dealloc_pd(struct ib_pd * pd)3444*4882a593Smuzhiyun static inline void ib_dealloc_pd(struct ib_pd *pd)
3445*4882a593Smuzhiyun {
3446*4882a593Smuzhiyun int ret = ib_dealloc_pd_user(pd, NULL);
3447*4882a593Smuzhiyun
3448*4882a593Smuzhiyun WARN_ONCE(ret, "Destroy of kernel PD shouldn't fail");
3449*4882a593Smuzhiyun }
3450*4882a593Smuzhiyun
3451*4882a593Smuzhiyun enum rdma_create_ah_flags {
3452*4882a593Smuzhiyun /* In a sleepable context */
3453*4882a593Smuzhiyun RDMA_CREATE_AH_SLEEPABLE = BIT(0),
3454*4882a593Smuzhiyun };
3455*4882a593Smuzhiyun
3456*4882a593Smuzhiyun /**
3457*4882a593Smuzhiyun * rdma_create_ah - Creates an address handle for the given address vector.
3458*4882a593Smuzhiyun * @pd: The protection domain associated with the address handle.
3459*4882a593Smuzhiyun * @ah_attr: The attributes of the address vector.
3460*4882a593Smuzhiyun * @flags: Create address handle flags (see enum rdma_create_ah_flags).
3461*4882a593Smuzhiyun *
3462*4882a593Smuzhiyun * The address handle is used to reference a local or global destination
3463*4882a593Smuzhiyun * in all UD QP post sends.
3464*4882a593Smuzhiyun */
3465*4882a593Smuzhiyun struct ib_ah *rdma_create_ah(struct ib_pd *pd, struct rdma_ah_attr *ah_attr,
3466*4882a593Smuzhiyun u32 flags);
3467*4882a593Smuzhiyun
3468*4882a593Smuzhiyun /**
3469*4882a593Smuzhiyun * rdma_create_user_ah - Creates an address handle for the given address vector.
3470*4882a593Smuzhiyun * It resolves destination mac address for ah attribute of RoCE type.
3471*4882a593Smuzhiyun * @pd: The protection domain associated with the address handle.
3472*4882a593Smuzhiyun * @ah_attr: The attributes of the address vector.
3473*4882a593Smuzhiyun * @udata: pointer to user's input output buffer information need by
3474*4882a593Smuzhiyun * provider driver.
3475*4882a593Smuzhiyun *
3476*4882a593Smuzhiyun * It returns 0 on success and returns appropriate error code on error.
3477*4882a593Smuzhiyun * The address handle is used to reference a local or global destination
3478*4882a593Smuzhiyun * in all UD QP post sends.
3479*4882a593Smuzhiyun */
3480*4882a593Smuzhiyun struct ib_ah *rdma_create_user_ah(struct ib_pd *pd,
3481*4882a593Smuzhiyun struct rdma_ah_attr *ah_attr,
3482*4882a593Smuzhiyun struct ib_udata *udata);
3483*4882a593Smuzhiyun /**
3484*4882a593Smuzhiyun * ib_get_gids_from_rdma_hdr - Get sgid and dgid from GRH or IPv4 header
3485*4882a593Smuzhiyun * work completion.
3486*4882a593Smuzhiyun * @hdr: the L3 header to parse
3487*4882a593Smuzhiyun * @net_type: type of header to parse
3488*4882a593Smuzhiyun * @sgid: place to store source gid
3489*4882a593Smuzhiyun * @dgid: place to store destination gid
3490*4882a593Smuzhiyun */
3491*4882a593Smuzhiyun int ib_get_gids_from_rdma_hdr(const union rdma_network_hdr *hdr,
3492*4882a593Smuzhiyun enum rdma_network_type net_type,
3493*4882a593Smuzhiyun union ib_gid *sgid, union ib_gid *dgid);
3494*4882a593Smuzhiyun
3495*4882a593Smuzhiyun /**
3496*4882a593Smuzhiyun * ib_get_rdma_header_version - Get the header version
3497*4882a593Smuzhiyun * @hdr: the L3 header to parse
3498*4882a593Smuzhiyun */
3499*4882a593Smuzhiyun int ib_get_rdma_header_version(const union rdma_network_hdr *hdr);
3500*4882a593Smuzhiyun
3501*4882a593Smuzhiyun /**
3502*4882a593Smuzhiyun * ib_init_ah_attr_from_wc - Initializes address handle attributes from a
3503*4882a593Smuzhiyun * work completion.
3504*4882a593Smuzhiyun * @device: Device on which the received message arrived.
3505*4882a593Smuzhiyun * @port_num: Port on which the received message arrived.
3506*4882a593Smuzhiyun * @wc: Work completion associated with the received message.
3507*4882a593Smuzhiyun * @grh: References the received global route header. This parameter is
3508*4882a593Smuzhiyun * ignored unless the work completion indicates that the GRH is valid.
3509*4882a593Smuzhiyun * @ah_attr: Returned attributes that can be used when creating an address
3510*4882a593Smuzhiyun * handle for replying to the message.
3511*4882a593Smuzhiyun * When ib_init_ah_attr_from_wc() returns success,
3512*4882a593Smuzhiyun * (a) for IB link layer it optionally contains a reference to SGID attribute
3513*4882a593Smuzhiyun * when GRH is present for IB link layer.
3514*4882a593Smuzhiyun * (b) for RoCE link layer it contains a reference to SGID attribute.
3515*4882a593Smuzhiyun * User must invoke rdma_cleanup_ah_attr_gid_attr() to release reference to SGID
3516*4882a593Smuzhiyun * attributes which are initialized using ib_init_ah_attr_from_wc().
3517*4882a593Smuzhiyun *
3518*4882a593Smuzhiyun */
3519*4882a593Smuzhiyun int ib_init_ah_attr_from_wc(struct ib_device *device, u8 port_num,
3520*4882a593Smuzhiyun const struct ib_wc *wc, const struct ib_grh *grh,
3521*4882a593Smuzhiyun struct rdma_ah_attr *ah_attr);
3522*4882a593Smuzhiyun
3523*4882a593Smuzhiyun /**
3524*4882a593Smuzhiyun * ib_create_ah_from_wc - Creates an address handle associated with the
3525*4882a593Smuzhiyun * sender of the specified work completion.
3526*4882a593Smuzhiyun * @pd: The protection domain associated with the address handle.
3527*4882a593Smuzhiyun * @wc: Work completion information associated with a received message.
3528*4882a593Smuzhiyun * @grh: References the received global route header. This parameter is
3529*4882a593Smuzhiyun * ignored unless the work completion indicates that the GRH is valid.
3530*4882a593Smuzhiyun * @port_num: The outbound port number to associate with the address.
3531*4882a593Smuzhiyun *
3532*4882a593Smuzhiyun * The address handle is used to reference a local or global destination
3533*4882a593Smuzhiyun * in all UD QP post sends.
3534*4882a593Smuzhiyun */
3535*4882a593Smuzhiyun struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
3536*4882a593Smuzhiyun const struct ib_grh *grh, u8 port_num);
3537*4882a593Smuzhiyun
3538*4882a593Smuzhiyun /**
3539*4882a593Smuzhiyun * rdma_modify_ah - Modifies the address vector associated with an address
3540*4882a593Smuzhiyun * handle.
3541*4882a593Smuzhiyun * @ah: The address handle to modify.
3542*4882a593Smuzhiyun * @ah_attr: The new address vector attributes to associate with the
3543*4882a593Smuzhiyun * address handle.
3544*4882a593Smuzhiyun */
3545*4882a593Smuzhiyun int rdma_modify_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
3546*4882a593Smuzhiyun
3547*4882a593Smuzhiyun /**
3548*4882a593Smuzhiyun * rdma_query_ah - Queries the address vector associated with an address
3549*4882a593Smuzhiyun * handle.
3550*4882a593Smuzhiyun * @ah: The address handle to query.
3551*4882a593Smuzhiyun * @ah_attr: The address vector attributes associated with the address
3552*4882a593Smuzhiyun * handle.
3553*4882a593Smuzhiyun */
3554*4882a593Smuzhiyun int rdma_query_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
3555*4882a593Smuzhiyun
3556*4882a593Smuzhiyun enum rdma_destroy_ah_flags {
3557*4882a593Smuzhiyun /* In a sleepable context */
3558*4882a593Smuzhiyun RDMA_DESTROY_AH_SLEEPABLE = BIT(0),
3559*4882a593Smuzhiyun };
3560*4882a593Smuzhiyun
3561*4882a593Smuzhiyun /**
3562*4882a593Smuzhiyun * rdma_destroy_ah_user - Destroys an address handle.
3563*4882a593Smuzhiyun * @ah: The address handle to destroy.
3564*4882a593Smuzhiyun * @flags: Destroy address handle flags (see enum rdma_destroy_ah_flags).
3565*4882a593Smuzhiyun * @udata: Valid user data or NULL for kernel objects
3566*4882a593Smuzhiyun */
3567*4882a593Smuzhiyun int rdma_destroy_ah_user(struct ib_ah *ah, u32 flags, struct ib_udata *udata);
3568*4882a593Smuzhiyun
3569*4882a593Smuzhiyun /**
3570*4882a593Smuzhiyun * rdma_destroy_ah - Destroys an kernel address handle.
3571*4882a593Smuzhiyun * @ah: The address handle to destroy.
3572*4882a593Smuzhiyun * @flags: Destroy address handle flags (see enum rdma_destroy_ah_flags).
3573*4882a593Smuzhiyun *
3574*4882a593Smuzhiyun * NOTE: for user ah use rdma_destroy_ah_user with valid udata!
3575*4882a593Smuzhiyun */
rdma_destroy_ah(struct ib_ah * ah,u32 flags)3576*4882a593Smuzhiyun static inline void rdma_destroy_ah(struct ib_ah *ah, u32 flags)
3577*4882a593Smuzhiyun {
3578*4882a593Smuzhiyun int ret = rdma_destroy_ah_user(ah, flags, NULL);
3579*4882a593Smuzhiyun
3580*4882a593Smuzhiyun WARN_ONCE(ret, "Destroy of kernel AH shouldn't fail");
3581*4882a593Smuzhiyun }
3582*4882a593Smuzhiyun
3583*4882a593Smuzhiyun struct ib_srq *ib_create_srq_user(struct ib_pd *pd,
3584*4882a593Smuzhiyun struct ib_srq_init_attr *srq_init_attr,
3585*4882a593Smuzhiyun struct ib_usrq_object *uobject,
3586*4882a593Smuzhiyun struct ib_udata *udata);
3587*4882a593Smuzhiyun static inline struct ib_srq *
ib_create_srq(struct ib_pd * pd,struct ib_srq_init_attr * srq_init_attr)3588*4882a593Smuzhiyun ib_create_srq(struct ib_pd *pd, struct ib_srq_init_attr *srq_init_attr)
3589*4882a593Smuzhiyun {
3590*4882a593Smuzhiyun if (!pd->device->ops.create_srq)
3591*4882a593Smuzhiyun return ERR_PTR(-EOPNOTSUPP);
3592*4882a593Smuzhiyun
3593*4882a593Smuzhiyun return ib_create_srq_user(pd, srq_init_attr, NULL, NULL);
3594*4882a593Smuzhiyun }
3595*4882a593Smuzhiyun
3596*4882a593Smuzhiyun /**
3597*4882a593Smuzhiyun * ib_modify_srq - Modifies the attributes for the specified SRQ.
3598*4882a593Smuzhiyun * @srq: The SRQ to modify.
3599*4882a593Smuzhiyun * @srq_attr: On input, specifies the SRQ attributes to modify. On output,
3600*4882a593Smuzhiyun * the current values of selected SRQ attributes are returned.
3601*4882a593Smuzhiyun * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ
3602*4882a593Smuzhiyun * are being modified.
3603*4882a593Smuzhiyun *
3604*4882a593Smuzhiyun * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or
3605*4882a593Smuzhiyun * IB_SRQ_LIMIT to set the SRQ's limit and request notification when
3606*4882a593Smuzhiyun * the number of receives queued drops below the limit.
3607*4882a593Smuzhiyun */
3608*4882a593Smuzhiyun int ib_modify_srq(struct ib_srq *srq,
3609*4882a593Smuzhiyun struct ib_srq_attr *srq_attr,
3610*4882a593Smuzhiyun enum ib_srq_attr_mask srq_attr_mask);
3611*4882a593Smuzhiyun
3612*4882a593Smuzhiyun /**
3613*4882a593Smuzhiyun * ib_query_srq - Returns the attribute list and current values for the
3614*4882a593Smuzhiyun * specified SRQ.
3615*4882a593Smuzhiyun * @srq: The SRQ to query.
3616*4882a593Smuzhiyun * @srq_attr: The attributes of the specified SRQ.
3617*4882a593Smuzhiyun */
3618*4882a593Smuzhiyun int ib_query_srq(struct ib_srq *srq,
3619*4882a593Smuzhiyun struct ib_srq_attr *srq_attr);
3620*4882a593Smuzhiyun
3621*4882a593Smuzhiyun /**
3622*4882a593Smuzhiyun * ib_destroy_srq_user - Destroys the specified SRQ.
3623*4882a593Smuzhiyun * @srq: The SRQ to destroy.
3624*4882a593Smuzhiyun * @udata: Valid user data or NULL for kernel objects
3625*4882a593Smuzhiyun */
3626*4882a593Smuzhiyun int ib_destroy_srq_user(struct ib_srq *srq, struct ib_udata *udata);
3627*4882a593Smuzhiyun
3628*4882a593Smuzhiyun /**
3629*4882a593Smuzhiyun * ib_destroy_srq - Destroys the specified kernel SRQ.
3630*4882a593Smuzhiyun * @srq: The SRQ to destroy.
3631*4882a593Smuzhiyun *
3632*4882a593Smuzhiyun * NOTE: for user srq use ib_destroy_srq_user with valid udata!
3633*4882a593Smuzhiyun */
ib_destroy_srq(struct ib_srq * srq)3634*4882a593Smuzhiyun static inline void ib_destroy_srq(struct ib_srq *srq)
3635*4882a593Smuzhiyun {
3636*4882a593Smuzhiyun int ret = ib_destroy_srq_user(srq, NULL);
3637*4882a593Smuzhiyun
3638*4882a593Smuzhiyun WARN_ONCE(ret, "Destroy of kernel SRQ shouldn't fail");
3639*4882a593Smuzhiyun }
3640*4882a593Smuzhiyun
3641*4882a593Smuzhiyun /**
3642*4882a593Smuzhiyun * ib_post_srq_recv - Posts a list of work requests to the specified SRQ.
3643*4882a593Smuzhiyun * @srq: The SRQ to post the work request on.
3644*4882a593Smuzhiyun * @recv_wr: A list of work requests to post on the receive queue.
3645*4882a593Smuzhiyun * @bad_recv_wr: On an immediate failure, this parameter will reference
3646*4882a593Smuzhiyun * the work request that failed to be posted on the QP.
3647*4882a593Smuzhiyun */
ib_post_srq_recv(struct ib_srq * srq,const struct ib_recv_wr * recv_wr,const struct ib_recv_wr ** bad_recv_wr)3648*4882a593Smuzhiyun static inline int ib_post_srq_recv(struct ib_srq *srq,
3649*4882a593Smuzhiyun const struct ib_recv_wr *recv_wr,
3650*4882a593Smuzhiyun const struct ib_recv_wr **bad_recv_wr)
3651*4882a593Smuzhiyun {
3652*4882a593Smuzhiyun const struct ib_recv_wr *dummy;
3653*4882a593Smuzhiyun
3654*4882a593Smuzhiyun return srq->device->ops.post_srq_recv(srq, recv_wr,
3655*4882a593Smuzhiyun bad_recv_wr ? : &dummy);
3656*4882a593Smuzhiyun }
3657*4882a593Smuzhiyun
3658*4882a593Smuzhiyun struct ib_qp *ib_create_qp(struct ib_pd *pd,
3659*4882a593Smuzhiyun struct ib_qp_init_attr *qp_init_attr);
3660*4882a593Smuzhiyun
3661*4882a593Smuzhiyun /**
3662*4882a593Smuzhiyun * ib_modify_qp_with_udata - Modifies the attributes for the specified QP.
3663*4882a593Smuzhiyun * @qp: The QP to modify.
3664*4882a593Smuzhiyun * @attr: On input, specifies the QP attributes to modify. On output,
3665*4882a593Smuzhiyun * the current values of selected QP attributes are returned.
3666*4882a593Smuzhiyun * @attr_mask: A bit-mask used to specify which attributes of the QP
3667*4882a593Smuzhiyun * are being modified.
3668*4882a593Smuzhiyun * @udata: pointer to user's input output buffer information
3669*4882a593Smuzhiyun * are being modified.
3670*4882a593Smuzhiyun * It returns 0 on success and returns appropriate error code on error.
3671*4882a593Smuzhiyun */
3672*4882a593Smuzhiyun int ib_modify_qp_with_udata(struct ib_qp *qp,
3673*4882a593Smuzhiyun struct ib_qp_attr *attr,
3674*4882a593Smuzhiyun int attr_mask,
3675*4882a593Smuzhiyun struct ib_udata *udata);
3676*4882a593Smuzhiyun
3677*4882a593Smuzhiyun /**
3678*4882a593Smuzhiyun * ib_modify_qp - Modifies the attributes for the specified QP and then
3679*4882a593Smuzhiyun * transitions the QP to the given state.
3680*4882a593Smuzhiyun * @qp: The QP to modify.
3681*4882a593Smuzhiyun * @qp_attr: On input, specifies the QP attributes to modify. On output,
3682*4882a593Smuzhiyun * the current values of selected QP attributes are returned.
3683*4882a593Smuzhiyun * @qp_attr_mask: A bit-mask used to specify which attributes of the QP
3684*4882a593Smuzhiyun * are being modified.
3685*4882a593Smuzhiyun */
3686*4882a593Smuzhiyun int ib_modify_qp(struct ib_qp *qp,
3687*4882a593Smuzhiyun struct ib_qp_attr *qp_attr,
3688*4882a593Smuzhiyun int qp_attr_mask);
3689*4882a593Smuzhiyun
3690*4882a593Smuzhiyun /**
3691*4882a593Smuzhiyun * ib_query_qp - Returns the attribute list and current values for the
3692*4882a593Smuzhiyun * specified QP.
3693*4882a593Smuzhiyun * @qp: The QP to query.
3694*4882a593Smuzhiyun * @qp_attr: The attributes of the specified QP.
3695*4882a593Smuzhiyun * @qp_attr_mask: A bit-mask used to select specific attributes to query.
3696*4882a593Smuzhiyun * @qp_init_attr: Additional attributes of the selected QP.
3697*4882a593Smuzhiyun *
3698*4882a593Smuzhiyun * The qp_attr_mask may be used to limit the query to gathering only the
3699*4882a593Smuzhiyun * selected attributes.
3700*4882a593Smuzhiyun */
3701*4882a593Smuzhiyun int ib_query_qp(struct ib_qp *qp,
3702*4882a593Smuzhiyun struct ib_qp_attr *qp_attr,
3703*4882a593Smuzhiyun int qp_attr_mask,
3704*4882a593Smuzhiyun struct ib_qp_init_attr *qp_init_attr);
3705*4882a593Smuzhiyun
3706*4882a593Smuzhiyun /**
3707*4882a593Smuzhiyun * ib_destroy_qp - Destroys the specified QP.
3708*4882a593Smuzhiyun * @qp: The QP to destroy.
3709*4882a593Smuzhiyun * @udata: Valid udata or NULL for kernel objects
3710*4882a593Smuzhiyun */
3711*4882a593Smuzhiyun int ib_destroy_qp_user(struct ib_qp *qp, struct ib_udata *udata);
3712*4882a593Smuzhiyun
3713*4882a593Smuzhiyun /**
3714*4882a593Smuzhiyun * ib_destroy_qp - Destroys the specified kernel QP.
3715*4882a593Smuzhiyun * @qp: The QP to destroy.
3716*4882a593Smuzhiyun *
3717*4882a593Smuzhiyun * NOTE: for user qp use ib_destroy_qp_user with valid udata!
3718*4882a593Smuzhiyun */
ib_destroy_qp(struct ib_qp * qp)3719*4882a593Smuzhiyun static inline int ib_destroy_qp(struct ib_qp *qp)
3720*4882a593Smuzhiyun {
3721*4882a593Smuzhiyun return ib_destroy_qp_user(qp, NULL);
3722*4882a593Smuzhiyun }
3723*4882a593Smuzhiyun
3724*4882a593Smuzhiyun /**
3725*4882a593Smuzhiyun * ib_open_qp - Obtain a reference to an existing sharable QP.
3726*4882a593Smuzhiyun * @xrcd - XRC domain
3727*4882a593Smuzhiyun * @qp_open_attr: Attributes identifying the QP to open.
3728*4882a593Smuzhiyun *
3729*4882a593Smuzhiyun * Returns a reference to a sharable QP.
3730*4882a593Smuzhiyun */
3731*4882a593Smuzhiyun struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
3732*4882a593Smuzhiyun struct ib_qp_open_attr *qp_open_attr);
3733*4882a593Smuzhiyun
3734*4882a593Smuzhiyun /**
3735*4882a593Smuzhiyun * ib_close_qp - Release an external reference to a QP.
3736*4882a593Smuzhiyun * @qp: The QP handle to release
3737*4882a593Smuzhiyun *
3738*4882a593Smuzhiyun * The opened QP handle is released by the caller. The underlying
3739*4882a593Smuzhiyun * shared QP is not destroyed until all internal references are released.
3740*4882a593Smuzhiyun */
3741*4882a593Smuzhiyun int ib_close_qp(struct ib_qp *qp);
3742*4882a593Smuzhiyun
3743*4882a593Smuzhiyun /**
3744*4882a593Smuzhiyun * ib_post_send - Posts a list of work requests to the send queue of
3745*4882a593Smuzhiyun * the specified QP.
3746*4882a593Smuzhiyun * @qp: The QP to post the work request on.
3747*4882a593Smuzhiyun * @send_wr: A list of work requests to post on the send queue.
3748*4882a593Smuzhiyun * @bad_send_wr: On an immediate failure, this parameter will reference
3749*4882a593Smuzhiyun * the work request that failed to be posted on the QP.
3750*4882a593Smuzhiyun *
3751*4882a593Smuzhiyun * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
3752*4882a593Smuzhiyun * error is returned, the QP state shall not be affected,
3753*4882a593Smuzhiyun * ib_post_send() will return an immediate error after queueing any
3754*4882a593Smuzhiyun * earlier work requests in the list.
3755*4882a593Smuzhiyun */
ib_post_send(struct ib_qp * qp,const struct ib_send_wr * send_wr,const struct ib_send_wr ** bad_send_wr)3756*4882a593Smuzhiyun static inline int ib_post_send(struct ib_qp *qp,
3757*4882a593Smuzhiyun const struct ib_send_wr *send_wr,
3758*4882a593Smuzhiyun const struct ib_send_wr **bad_send_wr)
3759*4882a593Smuzhiyun {
3760*4882a593Smuzhiyun const struct ib_send_wr *dummy;
3761*4882a593Smuzhiyun
3762*4882a593Smuzhiyun return qp->device->ops.post_send(qp, send_wr, bad_send_wr ? : &dummy);
3763*4882a593Smuzhiyun }
3764*4882a593Smuzhiyun
3765*4882a593Smuzhiyun /**
3766*4882a593Smuzhiyun * ib_post_recv - Posts a list of work requests to the receive queue of
3767*4882a593Smuzhiyun * the specified QP.
3768*4882a593Smuzhiyun * @qp: The QP to post the work request on.
3769*4882a593Smuzhiyun * @recv_wr: A list of work requests to post on the receive queue.
3770*4882a593Smuzhiyun * @bad_recv_wr: On an immediate failure, this parameter will reference
3771*4882a593Smuzhiyun * the work request that failed to be posted on the QP.
3772*4882a593Smuzhiyun */
ib_post_recv(struct ib_qp * qp,const struct ib_recv_wr * recv_wr,const struct ib_recv_wr ** bad_recv_wr)3773*4882a593Smuzhiyun static inline int ib_post_recv(struct ib_qp *qp,
3774*4882a593Smuzhiyun const struct ib_recv_wr *recv_wr,
3775*4882a593Smuzhiyun const struct ib_recv_wr **bad_recv_wr)
3776*4882a593Smuzhiyun {
3777*4882a593Smuzhiyun const struct ib_recv_wr *dummy;
3778*4882a593Smuzhiyun
3779*4882a593Smuzhiyun return qp->device->ops.post_recv(qp, recv_wr, bad_recv_wr ? : &dummy);
3780*4882a593Smuzhiyun }
3781*4882a593Smuzhiyun
3782*4882a593Smuzhiyun struct ib_cq *__ib_alloc_cq(struct ib_device *dev, void *private, int nr_cqe,
3783*4882a593Smuzhiyun int comp_vector, enum ib_poll_context poll_ctx,
3784*4882a593Smuzhiyun const char *caller);
ib_alloc_cq(struct ib_device * dev,void * private,int nr_cqe,int comp_vector,enum ib_poll_context poll_ctx)3785*4882a593Smuzhiyun static inline struct ib_cq *ib_alloc_cq(struct ib_device *dev, void *private,
3786*4882a593Smuzhiyun int nr_cqe, int comp_vector,
3787*4882a593Smuzhiyun enum ib_poll_context poll_ctx)
3788*4882a593Smuzhiyun {
3789*4882a593Smuzhiyun return __ib_alloc_cq(dev, private, nr_cqe, comp_vector, poll_ctx,
3790*4882a593Smuzhiyun KBUILD_MODNAME);
3791*4882a593Smuzhiyun }
3792*4882a593Smuzhiyun
3793*4882a593Smuzhiyun struct ib_cq *__ib_alloc_cq_any(struct ib_device *dev, void *private,
3794*4882a593Smuzhiyun int nr_cqe, enum ib_poll_context poll_ctx,
3795*4882a593Smuzhiyun const char *caller);
3796*4882a593Smuzhiyun
3797*4882a593Smuzhiyun /**
3798*4882a593Smuzhiyun * ib_alloc_cq_any: Allocate kernel CQ
3799*4882a593Smuzhiyun * @dev: The IB device
3800*4882a593Smuzhiyun * @private: Private data attached to the CQE
3801*4882a593Smuzhiyun * @nr_cqe: Number of CQEs in the CQ
3802*4882a593Smuzhiyun * @poll_ctx: Context used for polling the CQ
3803*4882a593Smuzhiyun */
ib_alloc_cq_any(struct ib_device * dev,void * private,int nr_cqe,enum ib_poll_context poll_ctx)3804*4882a593Smuzhiyun static inline struct ib_cq *ib_alloc_cq_any(struct ib_device *dev,
3805*4882a593Smuzhiyun void *private, int nr_cqe,
3806*4882a593Smuzhiyun enum ib_poll_context poll_ctx)
3807*4882a593Smuzhiyun {
3808*4882a593Smuzhiyun return __ib_alloc_cq_any(dev, private, nr_cqe, poll_ctx,
3809*4882a593Smuzhiyun KBUILD_MODNAME);
3810*4882a593Smuzhiyun }
3811*4882a593Smuzhiyun
3812*4882a593Smuzhiyun void ib_free_cq(struct ib_cq *cq);
3813*4882a593Smuzhiyun int ib_process_cq_direct(struct ib_cq *cq, int budget);
3814*4882a593Smuzhiyun
3815*4882a593Smuzhiyun /**
3816*4882a593Smuzhiyun * ib_create_cq - Creates a CQ on the specified device.
3817*4882a593Smuzhiyun * @device: The device on which to create the CQ.
3818*4882a593Smuzhiyun * @comp_handler: A user-specified callback that is invoked when a
3819*4882a593Smuzhiyun * completion event occurs on the CQ.
3820*4882a593Smuzhiyun * @event_handler: A user-specified callback that is invoked when an
3821*4882a593Smuzhiyun * asynchronous event not associated with a completion occurs on the CQ.
3822*4882a593Smuzhiyun * @cq_context: Context associated with the CQ returned to the user via
3823*4882a593Smuzhiyun * the associated completion and event handlers.
3824*4882a593Smuzhiyun * @cq_attr: The attributes the CQ should be created upon.
3825*4882a593Smuzhiyun *
3826*4882a593Smuzhiyun * Users can examine the cq structure to determine the actual CQ size.
3827*4882a593Smuzhiyun */
3828*4882a593Smuzhiyun struct ib_cq *__ib_create_cq(struct ib_device *device,
3829*4882a593Smuzhiyun ib_comp_handler comp_handler,
3830*4882a593Smuzhiyun void (*event_handler)(struct ib_event *, void *),
3831*4882a593Smuzhiyun void *cq_context,
3832*4882a593Smuzhiyun const struct ib_cq_init_attr *cq_attr,
3833*4882a593Smuzhiyun const char *caller);
3834*4882a593Smuzhiyun #define ib_create_cq(device, cmp_hndlr, evt_hndlr, cq_ctxt, cq_attr) \
3835*4882a593Smuzhiyun __ib_create_cq((device), (cmp_hndlr), (evt_hndlr), (cq_ctxt), (cq_attr), KBUILD_MODNAME)
3836*4882a593Smuzhiyun
3837*4882a593Smuzhiyun /**
3838*4882a593Smuzhiyun * ib_resize_cq - Modifies the capacity of the CQ.
3839*4882a593Smuzhiyun * @cq: The CQ to resize.
3840*4882a593Smuzhiyun * @cqe: The minimum size of the CQ.
3841*4882a593Smuzhiyun *
3842*4882a593Smuzhiyun * Users can examine the cq structure to determine the actual CQ size.
3843*4882a593Smuzhiyun */
3844*4882a593Smuzhiyun int ib_resize_cq(struct ib_cq *cq, int cqe);
3845*4882a593Smuzhiyun
3846*4882a593Smuzhiyun /**
3847*4882a593Smuzhiyun * rdma_set_cq_moderation - Modifies moderation params of the CQ
3848*4882a593Smuzhiyun * @cq: The CQ to modify.
3849*4882a593Smuzhiyun * @cq_count: number of CQEs that will trigger an event
3850*4882a593Smuzhiyun * @cq_period: max period of time in usec before triggering an event
3851*4882a593Smuzhiyun *
3852*4882a593Smuzhiyun */
3853*4882a593Smuzhiyun int rdma_set_cq_moderation(struct ib_cq *cq, u16 cq_count, u16 cq_period);
3854*4882a593Smuzhiyun
3855*4882a593Smuzhiyun /**
3856*4882a593Smuzhiyun * ib_destroy_cq_user - Destroys the specified CQ.
3857*4882a593Smuzhiyun * @cq: The CQ to destroy.
3858*4882a593Smuzhiyun * @udata: Valid user data or NULL for kernel objects
3859*4882a593Smuzhiyun */
3860*4882a593Smuzhiyun int ib_destroy_cq_user(struct ib_cq *cq, struct ib_udata *udata);
3861*4882a593Smuzhiyun
3862*4882a593Smuzhiyun /**
3863*4882a593Smuzhiyun * ib_destroy_cq - Destroys the specified kernel CQ.
3864*4882a593Smuzhiyun * @cq: The CQ to destroy.
3865*4882a593Smuzhiyun *
3866*4882a593Smuzhiyun * NOTE: for user cq use ib_destroy_cq_user with valid udata!
3867*4882a593Smuzhiyun */
ib_destroy_cq(struct ib_cq * cq)3868*4882a593Smuzhiyun static inline void ib_destroy_cq(struct ib_cq *cq)
3869*4882a593Smuzhiyun {
3870*4882a593Smuzhiyun int ret = ib_destroy_cq_user(cq, NULL);
3871*4882a593Smuzhiyun
3872*4882a593Smuzhiyun WARN_ONCE(ret, "Destroy of kernel CQ shouldn't fail");
3873*4882a593Smuzhiyun }
3874*4882a593Smuzhiyun
3875*4882a593Smuzhiyun /**
3876*4882a593Smuzhiyun * ib_poll_cq - poll a CQ for completion(s)
3877*4882a593Smuzhiyun * @cq:the CQ being polled
3878*4882a593Smuzhiyun * @num_entries:maximum number of completions to return
3879*4882a593Smuzhiyun * @wc:array of at least @num_entries &struct ib_wc where completions
3880*4882a593Smuzhiyun * will be returned
3881*4882a593Smuzhiyun *
3882*4882a593Smuzhiyun * Poll a CQ for (possibly multiple) completions. If the return value
3883*4882a593Smuzhiyun * is < 0, an error occurred. If the return value is >= 0, it is the
3884*4882a593Smuzhiyun * number of completions returned. If the return value is
3885*4882a593Smuzhiyun * non-negative and < num_entries, then the CQ was emptied.
3886*4882a593Smuzhiyun */
ib_poll_cq(struct ib_cq * cq,int num_entries,struct ib_wc * wc)3887*4882a593Smuzhiyun static inline int ib_poll_cq(struct ib_cq *cq, int num_entries,
3888*4882a593Smuzhiyun struct ib_wc *wc)
3889*4882a593Smuzhiyun {
3890*4882a593Smuzhiyun return cq->device->ops.poll_cq(cq, num_entries, wc);
3891*4882a593Smuzhiyun }
3892*4882a593Smuzhiyun
3893*4882a593Smuzhiyun /**
3894*4882a593Smuzhiyun * ib_req_notify_cq - Request completion notification on a CQ.
3895*4882a593Smuzhiyun * @cq: The CQ to generate an event for.
3896*4882a593Smuzhiyun * @flags:
3897*4882a593Smuzhiyun * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP
3898*4882a593Smuzhiyun * to request an event on the next solicited event or next work
3899*4882a593Smuzhiyun * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS
3900*4882a593Smuzhiyun * may also be |ed in to request a hint about missed events, as
3901*4882a593Smuzhiyun * described below.
3902*4882a593Smuzhiyun *
3903*4882a593Smuzhiyun * Return Value:
3904*4882a593Smuzhiyun * < 0 means an error occurred while requesting notification
3905*4882a593Smuzhiyun * == 0 means notification was requested successfully, and if
3906*4882a593Smuzhiyun * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events
3907*4882a593Smuzhiyun * were missed and it is safe to wait for another event. In
3908*4882a593Smuzhiyun * this case is it guaranteed that any work completions added
3909*4882a593Smuzhiyun * to the CQ since the last CQ poll will trigger a completion
3910*4882a593Smuzhiyun * notification event.
3911*4882a593Smuzhiyun * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed
3912*4882a593Smuzhiyun * in. It means that the consumer must poll the CQ again to
3913*4882a593Smuzhiyun * make sure it is empty to avoid missing an event because of a
3914*4882a593Smuzhiyun * race between requesting notification and an entry being
3915*4882a593Smuzhiyun * added to the CQ. This return value means it is possible
3916*4882a593Smuzhiyun * (but not guaranteed) that a work completion has been added
3917*4882a593Smuzhiyun * to the CQ since the last poll without triggering a
3918*4882a593Smuzhiyun * completion notification event.
3919*4882a593Smuzhiyun */
ib_req_notify_cq(struct ib_cq * cq,enum ib_cq_notify_flags flags)3920*4882a593Smuzhiyun static inline int ib_req_notify_cq(struct ib_cq *cq,
3921*4882a593Smuzhiyun enum ib_cq_notify_flags flags)
3922*4882a593Smuzhiyun {
3923*4882a593Smuzhiyun return cq->device->ops.req_notify_cq(cq, flags);
3924*4882a593Smuzhiyun }
3925*4882a593Smuzhiyun
3926*4882a593Smuzhiyun struct ib_cq *ib_cq_pool_get(struct ib_device *dev, unsigned int nr_cqe,
3927*4882a593Smuzhiyun int comp_vector_hint,
3928*4882a593Smuzhiyun enum ib_poll_context poll_ctx);
3929*4882a593Smuzhiyun
3930*4882a593Smuzhiyun void ib_cq_pool_put(struct ib_cq *cq, unsigned int nr_cqe);
3931*4882a593Smuzhiyun
3932*4882a593Smuzhiyun /**
3933*4882a593Smuzhiyun * ib_req_ncomp_notif - Request completion notification when there are
3934*4882a593Smuzhiyun * at least the specified number of unreaped completions on the CQ.
3935*4882a593Smuzhiyun * @cq: The CQ to generate an event for.
3936*4882a593Smuzhiyun * @wc_cnt: The number of unreaped completions that should be on the
3937*4882a593Smuzhiyun * CQ before an event is generated.
3938*4882a593Smuzhiyun */
ib_req_ncomp_notif(struct ib_cq * cq,int wc_cnt)3939*4882a593Smuzhiyun static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt)
3940*4882a593Smuzhiyun {
3941*4882a593Smuzhiyun return cq->device->ops.req_ncomp_notif ?
3942*4882a593Smuzhiyun cq->device->ops.req_ncomp_notif(cq, wc_cnt) :
3943*4882a593Smuzhiyun -ENOSYS;
3944*4882a593Smuzhiyun }
3945*4882a593Smuzhiyun
3946*4882a593Smuzhiyun /*
3947*4882a593Smuzhiyun * Drivers that don't need a DMA mapping at the RDMA layer, set dma_device to
3948*4882a593Smuzhiyun * NULL. This causes the ib_dma* helpers to just stash the kernel virtual
3949*4882a593Smuzhiyun * address into the dma address.
3950*4882a593Smuzhiyun */
ib_uses_virt_dma(struct ib_device * dev)3951*4882a593Smuzhiyun static inline bool ib_uses_virt_dma(struct ib_device *dev)
3952*4882a593Smuzhiyun {
3953*4882a593Smuzhiyun return IS_ENABLED(CONFIG_INFINIBAND_VIRT_DMA) && !dev->dma_device;
3954*4882a593Smuzhiyun }
3955*4882a593Smuzhiyun
3956*4882a593Smuzhiyun /**
3957*4882a593Smuzhiyun * ib_dma_mapping_error - check a DMA addr for error
3958*4882a593Smuzhiyun * @dev: The device for which the dma_addr was created
3959*4882a593Smuzhiyun * @dma_addr: The DMA address to check
3960*4882a593Smuzhiyun */
ib_dma_mapping_error(struct ib_device * dev,u64 dma_addr)3961*4882a593Smuzhiyun static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
3962*4882a593Smuzhiyun {
3963*4882a593Smuzhiyun if (ib_uses_virt_dma(dev))
3964*4882a593Smuzhiyun return 0;
3965*4882a593Smuzhiyun return dma_mapping_error(dev->dma_device, dma_addr);
3966*4882a593Smuzhiyun }
3967*4882a593Smuzhiyun
3968*4882a593Smuzhiyun /**
3969*4882a593Smuzhiyun * ib_dma_map_single - Map a kernel virtual address to DMA address
3970*4882a593Smuzhiyun * @dev: The device for which the dma_addr is to be created
3971*4882a593Smuzhiyun * @cpu_addr: The kernel virtual address
3972*4882a593Smuzhiyun * @size: The size of the region in bytes
3973*4882a593Smuzhiyun * @direction: The direction of the DMA
3974*4882a593Smuzhiyun */
ib_dma_map_single(struct ib_device * dev,void * cpu_addr,size_t size,enum dma_data_direction direction)3975*4882a593Smuzhiyun static inline u64 ib_dma_map_single(struct ib_device *dev,
3976*4882a593Smuzhiyun void *cpu_addr, size_t size,
3977*4882a593Smuzhiyun enum dma_data_direction direction)
3978*4882a593Smuzhiyun {
3979*4882a593Smuzhiyun if (ib_uses_virt_dma(dev))
3980*4882a593Smuzhiyun return (uintptr_t)cpu_addr;
3981*4882a593Smuzhiyun return dma_map_single(dev->dma_device, cpu_addr, size, direction);
3982*4882a593Smuzhiyun }
3983*4882a593Smuzhiyun
3984*4882a593Smuzhiyun /**
3985*4882a593Smuzhiyun * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single()
3986*4882a593Smuzhiyun * @dev: The device for which the DMA address was created
3987*4882a593Smuzhiyun * @addr: The DMA address
3988*4882a593Smuzhiyun * @size: The size of the region in bytes
3989*4882a593Smuzhiyun * @direction: The direction of the DMA
3990*4882a593Smuzhiyun */
ib_dma_unmap_single(struct ib_device * dev,u64 addr,size_t size,enum dma_data_direction direction)3991*4882a593Smuzhiyun static inline void ib_dma_unmap_single(struct ib_device *dev,
3992*4882a593Smuzhiyun u64 addr, size_t size,
3993*4882a593Smuzhiyun enum dma_data_direction direction)
3994*4882a593Smuzhiyun {
3995*4882a593Smuzhiyun if (!ib_uses_virt_dma(dev))
3996*4882a593Smuzhiyun dma_unmap_single(dev->dma_device, addr, size, direction);
3997*4882a593Smuzhiyun }
3998*4882a593Smuzhiyun
3999*4882a593Smuzhiyun /**
4000*4882a593Smuzhiyun * ib_dma_map_page - Map a physical page to DMA address
4001*4882a593Smuzhiyun * @dev: The device for which the dma_addr is to be created
4002*4882a593Smuzhiyun * @page: The page to be mapped
4003*4882a593Smuzhiyun * @offset: The offset within the page
4004*4882a593Smuzhiyun * @size: The size of the region in bytes
4005*4882a593Smuzhiyun * @direction: The direction of the DMA
4006*4882a593Smuzhiyun */
ib_dma_map_page(struct ib_device * dev,struct page * page,unsigned long offset,size_t size,enum dma_data_direction direction)4007*4882a593Smuzhiyun static inline u64 ib_dma_map_page(struct ib_device *dev,
4008*4882a593Smuzhiyun struct page *page,
4009*4882a593Smuzhiyun unsigned long offset,
4010*4882a593Smuzhiyun size_t size,
4011*4882a593Smuzhiyun enum dma_data_direction direction)
4012*4882a593Smuzhiyun {
4013*4882a593Smuzhiyun if (ib_uses_virt_dma(dev))
4014*4882a593Smuzhiyun return (uintptr_t)(page_address(page) + offset);
4015*4882a593Smuzhiyun return dma_map_page(dev->dma_device, page, offset, size, direction);
4016*4882a593Smuzhiyun }
4017*4882a593Smuzhiyun
4018*4882a593Smuzhiyun /**
4019*4882a593Smuzhiyun * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page()
4020*4882a593Smuzhiyun * @dev: The device for which the DMA address was created
4021*4882a593Smuzhiyun * @addr: The DMA address
4022*4882a593Smuzhiyun * @size: The size of the region in bytes
4023*4882a593Smuzhiyun * @direction: The direction of the DMA
4024*4882a593Smuzhiyun */
ib_dma_unmap_page(struct ib_device * dev,u64 addr,size_t size,enum dma_data_direction direction)4025*4882a593Smuzhiyun static inline void ib_dma_unmap_page(struct ib_device *dev,
4026*4882a593Smuzhiyun u64 addr, size_t size,
4027*4882a593Smuzhiyun enum dma_data_direction direction)
4028*4882a593Smuzhiyun {
4029*4882a593Smuzhiyun if (!ib_uses_virt_dma(dev))
4030*4882a593Smuzhiyun dma_unmap_page(dev->dma_device, addr, size, direction);
4031*4882a593Smuzhiyun }
4032*4882a593Smuzhiyun
4033*4882a593Smuzhiyun int ib_dma_virt_map_sg(struct ib_device *dev, struct scatterlist *sg, int nents);
ib_dma_map_sg_attrs(struct ib_device * dev,struct scatterlist * sg,int nents,enum dma_data_direction direction,unsigned long dma_attrs)4034*4882a593Smuzhiyun static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
4035*4882a593Smuzhiyun struct scatterlist *sg, int nents,
4036*4882a593Smuzhiyun enum dma_data_direction direction,
4037*4882a593Smuzhiyun unsigned long dma_attrs)
4038*4882a593Smuzhiyun {
4039*4882a593Smuzhiyun if (ib_uses_virt_dma(dev))
4040*4882a593Smuzhiyun return ib_dma_virt_map_sg(dev, sg, nents);
4041*4882a593Smuzhiyun return dma_map_sg_attrs(dev->dma_device, sg, nents, direction,
4042*4882a593Smuzhiyun dma_attrs);
4043*4882a593Smuzhiyun }
4044*4882a593Smuzhiyun
ib_dma_unmap_sg_attrs(struct ib_device * dev,struct scatterlist * sg,int nents,enum dma_data_direction direction,unsigned long dma_attrs)4045*4882a593Smuzhiyun static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
4046*4882a593Smuzhiyun struct scatterlist *sg, int nents,
4047*4882a593Smuzhiyun enum dma_data_direction direction,
4048*4882a593Smuzhiyun unsigned long dma_attrs)
4049*4882a593Smuzhiyun {
4050*4882a593Smuzhiyun if (!ib_uses_virt_dma(dev))
4051*4882a593Smuzhiyun dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction,
4052*4882a593Smuzhiyun dma_attrs);
4053*4882a593Smuzhiyun }
4054*4882a593Smuzhiyun
4055*4882a593Smuzhiyun /**
4056*4882a593Smuzhiyun * ib_dma_map_sg - Map a scatter/gather list to DMA addresses
4057*4882a593Smuzhiyun * @dev: The device for which the DMA addresses are to be created
4058*4882a593Smuzhiyun * @sg: The array of scatter/gather entries
4059*4882a593Smuzhiyun * @nents: The number of scatter/gather entries
4060*4882a593Smuzhiyun * @direction: The direction of the DMA
4061*4882a593Smuzhiyun */
ib_dma_map_sg(struct ib_device * dev,struct scatterlist * sg,int nents,enum dma_data_direction direction)4062*4882a593Smuzhiyun static inline int ib_dma_map_sg(struct ib_device *dev,
4063*4882a593Smuzhiyun struct scatterlist *sg, int nents,
4064*4882a593Smuzhiyun enum dma_data_direction direction)
4065*4882a593Smuzhiyun {
4066*4882a593Smuzhiyun return ib_dma_map_sg_attrs(dev, sg, nents, direction, 0);
4067*4882a593Smuzhiyun }
4068*4882a593Smuzhiyun
4069*4882a593Smuzhiyun /**
4070*4882a593Smuzhiyun * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses
4071*4882a593Smuzhiyun * @dev: The device for which the DMA addresses were created
4072*4882a593Smuzhiyun * @sg: The array of scatter/gather entries
4073*4882a593Smuzhiyun * @nents: The number of scatter/gather entries
4074*4882a593Smuzhiyun * @direction: The direction of the DMA
4075*4882a593Smuzhiyun */
ib_dma_unmap_sg(struct ib_device * dev,struct scatterlist * sg,int nents,enum dma_data_direction direction)4076*4882a593Smuzhiyun static inline void ib_dma_unmap_sg(struct ib_device *dev,
4077*4882a593Smuzhiyun struct scatterlist *sg, int nents,
4078*4882a593Smuzhiyun enum dma_data_direction direction)
4079*4882a593Smuzhiyun {
4080*4882a593Smuzhiyun ib_dma_unmap_sg_attrs(dev, sg, nents, direction, 0);
4081*4882a593Smuzhiyun }
4082*4882a593Smuzhiyun
4083*4882a593Smuzhiyun /**
4084*4882a593Smuzhiyun * ib_dma_max_seg_size - Return the size limit of a single DMA transfer
4085*4882a593Smuzhiyun * @dev: The device to query
4086*4882a593Smuzhiyun *
4087*4882a593Smuzhiyun * The returned value represents a size in bytes.
4088*4882a593Smuzhiyun */
ib_dma_max_seg_size(struct ib_device * dev)4089*4882a593Smuzhiyun static inline unsigned int ib_dma_max_seg_size(struct ib_device *dev)
4090*4882a593Smuzhiyun {
4091*4882a593Smuzhiyun if (ib_uses_virt_dma(dev))
4092*4882a593Smuzhiyun return UINT_MAX;
4093*4882a593Smuzhiyun return dma_get_max_seg_size(dev->dma_device);
4094*4882a593Smuzhiyun }
4095*4882a593Smuzhiyun
4096*4882a593Smuzhiyun /**
4097*4882a593Smuzhiyun * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU
4098*4882a593Smuzhiyun * @dev: The device for which the DMA address was created
4099*4882a593Smuzhiyun * @addr: The DMA address
4100*4882a593Smuzhiyun * @size: The size of the region in bytes
4101*4882a593Smuzhiyun * @dir: The direction of the DMA
4102*4882a593Smuzhiyun */
ib_dma_sync_single_for_cpu(struct ib_device * dev,u64 addr,size_t size,enum dma_data_direction dir)4103*4882a593Smuzhiyun static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev,
4104*4882a593Smuzhiyun u64 addr,
4105*4882a593Smuzhiyun size_t size,
4106*4882a593Smuzhiyun enum dma_data_direction dir)
4107*4882a593Smuzhiyun {
4108*4882a593Smuzhiyun if (!ib_uses_virt_dma(dev))
4109*4882a593Smuzhiyun dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
4110*4882a593Smuzhiyun }
4111*4882a593Smuzhiyun
4112*4882a593Smuzhiyun /**
4113*4882a593Smuzhiyun * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device
4114*4882a593Smuzhiyun * @dev: The device for which the DMA address was created
4115*4882a593Smuzhiyun * @addr: The DMA address
4116*4882a593Smuzhiyun * @size: The size of the region in bytes
4117*4882a593Smuzhiyun * @dir: The direction of the DMA
4118*4882a593Smuzhiyun */
ib_dma_sync_single_for_device(struct ib_device * dev,u64 addr,size_t size,enum dma_data_direction dir)4119*4882a593Smuzhiyun static inline void ib_dma_sync_single_for_device(struct ib_device *dev,
4120*4882a593Smuzhiyun u64 addr,
4121*4882a593Smuzhiyun size_t size,
4122*4882a593Smuzhiyun enum dma_data_direction dir)
4123*4882a593Smuzhiyun {
4124*4882a593Smuzhiyun if (!ib_uses_virt_dma(dev))
4125*4882a593Smuzhiyun dma_sync_single_for_device(dev->dma_device, addr, size, dir);
4126*4882a593Smuzhiyun }
4127*4882a593Smuzhiyun
4128*4882a593Smuzhiyun /**
4129*4882a593Smuzhiyun * ib_dma_alloc_coherent - Allocate memory and map it for DMA
4130*4882a593Smuzhiyun * @dev: The device for which the DMA address is requested
4131*4882a593Smuzhiyun * @size: The size of the region to allocate in bytes
4132*4882a593Smuzhiyun * @dma_handle: A pointer for returning the DMA address of the region
4133*4882a593Smuzhiyun * @flag: memory allocator flags
4134*4882a593Smuzhiyun */
ib_dma_alloc_coherent(struct ib_device * dev,size_t size,dma_addr_t * dma_handle,gfp_t flag)4135*4882a593Smuzhiyun static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
4136*4882a593Smuzhiyun size_t size,
4137*4882a593Smuzhiyun dma_addr_t *dma_handle,
4138*4882a593Smuzhiyun gfp_t flag)
4139*4882a593Smuzhiyun {
4140*4882a593Smuzhiyun return dma_alloc_coherent(dev->dma_device, size, dma_handle, flag);
4141*4882a593Smuzhiyun }
4142*4882a593Smuzhiyun
4143*4882a593Smuzhiyun /**
4144*4882a593Smuzhiyun * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
4145*4882a593Smuzhiyun * @dev: The device for which the DMA addresses were allocated
4146*4882a593Smuzhiyun * @size: The size of the region
4147*4882a593Smuzhiyun * @cpu_addr: the address returned by ib_dma_alloc_coherent()
4148*4882a593Smuzhiyun * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
4149*4882a593Smuzhiyun */
ib_dma_free_coherent(struct ib_device * dev,size_t size,void * cpu_addr,dma_addr_t dma_handle)4150*4882a593Smuzhiyun static inline void ib_dma_free_coherent(struct ib_device *dev,
4151*4882a593Smuzhiyun size_t size, void *cpu_addr,
4152*4882a593Smuzhiyun dma_addr_t dma_handle)
4153*4882a593Smuzhiyun {
4154*4882a593Smuzhiyun dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
4155*4882a593Smuzhiyun }
4156*4882a593Smuzhiyun
4157*4882a593Smuzhiyun /* ib_reg_user_mr - register a memory region for virtual addresses from kernel
4158*4882a593Smuzhiyun * space. This function should be called when 'current' is the owning MM.
4159*4882a593Smuzhiyun */
4160*4882a593Smuzhiyun struct ib_mr *ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
4161*4882a593Smuzhiyun u64 virt_addr, int mr_access_flags);
4162*4882a593Smuzhiyun
4163*4882a593Smuzhiyun /* ib_advise_mr - give an advice about an address range in a memory region */
4164*4882a593Smuzhiyun int ib_advise_mr(struct ib_pd *pd, enum ib_uverbs_advise_mr_advice advice,
4165*4882a593Smuzhiyun u32 flags, struct ib_sge *sg_list, u32 num_sge);
4166*4882a593Smuzhiyun /**
4167*4882a593Smuzhiyun * ib_dereg_mr_user - Deregisters a memory region and removes it from the
4168*4882a593Smuzhiyun * HCA translation table.
4169*4882a593Smuzhiyun * @mr: The memory region to deregister.
4170*4882a593Smuzhiyun * @udata: Valid user data or NULL for kernel object
4171*4882a593Smuzhiyun *
4172*4882a593Smuzhiyun * This function can fail, if the memory region has memory windows bound to it.
4173*4882a593Smuzhiyun */
4174*4882a593Smuzhiyun int ib_dereg_mr_user(struct ib_mr *mr, struct ib_udata *udata);
4175*4882a593Smuzhiyun
4176*4882a593Smuzhiyun /**
4177*4882a593Smuzhiyun * ib_dereg_mr - Deregisters a kernel memory region and removes it from the
4178*4882a593Smuzhiyun * HCA translation table.
4179*4882a593Smuzhiyun * @mr: The memory region to deregister.
4180*4882a593Smuzhiyun *
4181*4882a593Smuzhiyun * This function can fail, if the memory region has memory windows bound to it.
4182*4882a593Smuzhiyun *
4183*4882a593Smuzhiyun * NOTE: for user mr use ib_dereg_mr_user with valid udata!
4184*4882a593Smuzhiyun */
ib_dereg_mr(struct ib_mr * mr)4185*4882a593Smuzhiyun static inline int ib_dereg_mr(struct ib_mr *mr)
4186*4882a593Smuzhiyun {
4187*4882a593Smuzhiyun return ib_dereg_mr_user(mr, NULL);
4188*4882a593Smuzhiyun }
4189*4882a593Smuzhiyun
4190*4882a593Smuzhiyun struct ib_mr *ib_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
4191*4882a593Smuzhiyun u32 max_num_sg);
4192*4882a593Smuzhiyun
4193*4882a593Smuzhiyun struct ib_mr *ib_alloc_mr_integrity(struct ib_pd *pd,
4194*4882a593Smuzhiyun u32 max_num_data_sg,
4195*4882a593Smuzhiyun u32 max_num_meta_sg);
4196*4882a593Smuzhiyun
4197*4882a593Smuzhiyun /**
4198*4882a593Smuzhiyun * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
4199*4882a593Smuzhiyun * R_Key and L_Key.
4200*4882a593Smuzhiyun * @mr - struct ib_mr pointer to be updated.
4201*4882a593Smuzhiyun * @newkey - new key to be used.
4202*4882a593Smuzhiyun */
ib_update_fast_reg_key(struct ib_mr * mr,u8 newkey)4203*4882a593Smuzhiyun static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
4204*4882a593Smuzhiyun {
4205*4882a593Smuzhiyun mr->lkey = (mr->lkey & 0xffffff00) | newkey;
4206*4882a593Smuzhiyun mr->rkey = (mr->rkey & 0xffffff00) | newkey;
4207*4882a593Smuzhiyun }
4208*4882a593Smuzhiyun
4209*4882a593Smuzhiyun /**
4210*4882a593Smuzhiyun * ib_inc_rkey - increments the key portion of the given rkey. Can be used
4211*4882a593Smuzhiyun * for calculating a new rkey for type 2 memory windows.
4212*4882a593Smuzhiyun * @rkey - the rkey to increment.
4213*4882a593Smuzhiyun */
ib_inc_rkey(u32 rkey)4214*4882a593Smuzhiyun static inline u32 ib_inc_rkey(u32 rkey)
4215*4882a593Smuzhiyun {
4216*4882a593Smuzhiyun const u32 mask = 0x000000ff;
4217*4882a593Smuzhiyun return ((rkey + 1) & mask) | (rkey & ~mask);
4218*4882a593Smuzhiyun }
4219*4882a593Smuzhiyun
4220*4882a593Smuzhiyun /**
4221*4882a593Smuzhiyun * ib_attach_mcast - Attaches the specified QP to a multicast group.
4222*4882a593Smuzhiyun * @qp: QP to attach to the multicast group. The QP must be type
4223*4882a593Smuzhiyun * IB_QPT_UD.
4224*4882a593Smuzhiyun * @gid: Multicast group GID.
4225*4882a593Smuzhiyun * @lid: Multicast group LID in host byte order.
4226*4882a593Smuzhiyun *
4227*4882a593Smuzhiyun * In order to send and receive multicast packets, subnet
4228*4882a593Smuzhiyun * administration must have created the multicast group and configured
4229*4882a593Smuzhiyun * the fabric appropriately. The port associated with the specified
4230*4882a593Smuzhiyun * QP must also be a member of the multicast group.
4231*4882a593Smuzhiyun */
4232*4882a593Smuzhiyun int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
4233*4882a593Smuzhiyun
4234*4882a593Smuzhiyun /**
4235*4882a593Smuzhiyun * ib_detach_mcast - Detaches the specified QP from a multicast group.
4236*4882a593Smuzhiyun * @qp: QP to detach from the multicast group.
4237*4882a593Smuzhiyun * @gid: Multicast group GID.
4238*4882a593Smuzhiyun * @lid: Multicast group LID in host byte order.
4239*4882a593Smuzhiyun */
4240*4882a593Smuzhiyun int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
4241*4882a593Smuzhiyun
4242*4882a593Smuzhiyun struct ib_xrcd *ib_alloc_xrcd_user(struct ib_device *device,
4243*4882a593Smuzhiyun struct inode *inode, struct ib_udata *udata);
4244*4882a593Smuzhiyun int ib_dealloc_xrcd_user(struct ib_xrcd *xrcd, struct ib_udata *udata);
4245*4882a593Smuzhiyun
ib_check_mr_access(int flags)4246*4882a593Smuzhiyun static inline int ib_check_mr_access(int flags)
4247*4882a593Smuzhiyun {
4248*4882a593Smuzhiyun /*
4249*4882a593Smuzhiyun * Local write permission is required if remote write or
4250*4882a593Smuzhiyun * remote atomic permission is also requested.
4251*4882a593Smuzhiyun */
4252*4882a593Smuzhiyun if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
4253*4882a593Smuzhiyun !(flags & IB_ACCESS_LOCAL_WRITE))
4254*4882a593Smuzhiyun return -EINVAL;
4255*4882a593Smuzhiyun
4256*4882a593Smuzhiyun if (flags & ~IB_ACCESS_SUPPORTED)
4257*4882a593Smuzhiyun return -EINVAL;
4258*4882a593Smuzhiyun
4259*4882a593Smuzhiyun return 0;
4260*4882a593Smuzhiyun }
4261*4882a593Smuzhiyun
ib_access_writable(int access_flags)4262*4882a593Smuzhiyun static inline bool ib_access_writable(int access_flags)
4263*4882a593Smuzhiyun {
4264*4882a593Smuzhiyun /*
4265*4882a593Smuzhiyun * We have writable memory backing the MR if any of the following
4266*4882a593Smuzhiyun * access flags are set. "Local write" and "remote write" obviously
4267*4882a593Smuzhiyun * require write access. "Remote atomic" can do things like fetch and
4268*4882a593Smuzhiyun * add, which will modify memory, and "MW bind" can change permissions
4269*4882a593Smuzhiyun * by binding a window.
4270*4882a593Smuzhiyun */
4271*4882a593Smuzhiyun return access_flags &
4272*4882a593Smuzhiyun (IB_ACCESS_LOCAL_WRITE | IB_ACCESS_REMOTE_WRITE |
4273*4882a593Smuzhiyun IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_MW_BIND);
4274*4882a593Smuzhiyun }
4275*4882a593Smuzhiyun
4276*4882a593Smuzhiyun /**
4277*4882a593Smuzhiyun * ib_check_mr_status: lightweight check of MR status.
4278*4882a593Smuzhiyun * This routine may provide status checks on a selected
4279*4882a593Smuzhiyun * ib_mr. first use is for signature status check.
4280*4882a593Smuzhiyun *
4281*4882a593Smuzhiyun * @mr: A memory region.
4282*4882a593Smuzhiyun * @check_mask: Bitmask of which checks to perform from
4283*4882a593Smuzhiyun * ib_mr_status_check enumeration.
4284*4882a593Smuzhiyun * @mr_status: The container of relevant status checks.
4285*4882a593Smuzhiyun * failed checks will be indicated in the status bitmask
4286*4882a593Smuzhiyun * and the relevant info shall be in the error item.
4287*4882a593Smuzhiyun */
4288*4882a593Smuzhiyun int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
4289*4882a593Smuzhiyun struct ib_mr_status *mr_status);
4290*4882a593Smuzhiyun
4291*4882a593Smuzhiyun /**
4292*4882a593Smuzhiyun * ib_device_try_get: Hold a registration lock
4293*4882a593Smuzhiyun * device: The device to lock
4294*4882a593Smuzhiyun *
4295*4882a593Smuzhiyun * A device under an active registration lock cannot become unregistered. It
4296*4882a593Smuzhiyun * is only possible to obtain a registration lock on a device that is fully
4297*4882a593Smuzhiyun * registered, otherwise this function returns false.
4298*4882a593Smuzhiyun *
4299*4882a593Smuzhiyun * The registration lock is only necessary for actions which require the
4300*4882a593Smuzhiyun * device to still be registered. Uses that only require the device pointer to
4301*4882a593Smuzhiyun * be valid should use get_device(&ibdev->dev) to hold the memory.
4302*4882a593Smuzhiyun *
4303*4882a593Smuzhiyun */
ib_device_try_get(struct ib_device * dev)4304*4882a593Smuzhiyun static inline bool ib_device_try_get(struct ib_device *dev)
4305*4882a593Smuzhiyun {
4306*4882a593Smuzhiyun return refcount_inc_not_zero(&dev->refcount);
4307*4882a593Smuzhiyun }
4308*4882a593Smuzhiyun
4309*4882a593Smuzhiyun void ib_device_put(struct ib_device *device);
4310*4882a593Smuzhiyun struct ib_device *ib_device_get_by_netdev(struct net_device *ndev,
4311*4882a593Smuzhiyun enum rdma_driver_id driver_id);
4312*4882a593Smuzhiyun struct ib_device *ib_device_get_by_name(const char *name,
4313*4882a593Smuzhiyun enum rdma_driver_id driver_id);
4314*4882a593Smuzhiyun struct net_device *ib_get_net_dev_by_params(struct ib_device *dev, u8 port,
4315*4882a593Smuzhiyun u16 pkey, const union ib_gid *gid,
4316*4882a593Smuzhiyun const struct sockaddr *addr);
4317*4882a593Smuzhiyun int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev,
4318*4882a593Smuzhiyun unsigned int port);
4319*4882a593Smuzhiyun struct net_device *ib_device_netdev(struct ib_device *dev, u8 port);
4320*4882a593Smuzhiyun
4321*4882a593Smuzhiyun struct ib_wq *ib_create_wq(struct ib_pd *pd,
4322*4882a593Smuzhiyun struct ib_wq_init_attr *init_attr);
4323*4882a593Smuzhiyun int ib_destroy_wq_user(struct ib_wq *wq, struct ib_udata *udata);
4324*4882a593Smuzhiyun int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *attr,
4325*4882a593Smuzhiyun u32 wq_attr_mask);
4326*4882a593Smuzhiyun
4327*4882a593Smuzhiyun int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
4328*4882a593Smuzhiyun unsigned int *sg_offset, unsigned int page_size);
4329*4882a593Smuzhiyun int ib_map_mr_sg_pi(struct ib_mr *mr, struct scatterlist *data_sg,
4330*4882a593Smuzhiyun int data_sg_nents, unsigned int *data_sg_offset,
4331*4882a593Smuzhiyun struct scatterlist *meta_sg, int meta_sg_nents,
4332*4882a593Smuzhiyun unsigned int *meta_sg_offset, unsigned int page_size);
4333*4882a593Smuzhiyun
4334*4882a593Smuzhiyun static inline int
ib_map_mr_sg_zbva(struct ib_mr * mr,struct scatterlist * sg,int sg_nents,unsigned int * sg_offset,unsigned int page_size)4335*4882a593Smuzhiyun ib_map_mr_sg_zbva(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
4336*4882a593Smuzhiyun unsigned int *sg_offset, unsigned int page_size)
4337*4882a593Smuzhiyun {
4338*4882a593Smuzhiyun int n;
4339*4882a593Smuzhiyun
4340*4882a593Smuzhiyun n = ib_map_mr_sg(mr, sg, sg_nents, sg_offset, page_size);
4341*4882a593Smuzhiyun mr->iova = 0;
4342*4882a593Smuzhiyun
4343*4882a593Smuzhiyun return n;
4344*4882a593Smuzhiyun }
4345*4882a593Smuzhiyun
4346*4882a593Smuzhiyun int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
4347*4882a593Smuzhiyun unsigned int *sg_offset, int (*set_page)(struct ib_mr *, u64));
4348*4882a593Smuzhiyun
4349*4882a593Smuzhiyun void ib_drain_rq(struct ib_qp *qp);
4350*4882a593Smuzhiyun void ib_drain_sq(struct ib_qp *qp);
4351*4882a593Smuzhiyun void ib_drain_qp(struct ib_qp *qp);
4352*4882a593Smuzhiyun
4353*4882a593Smuzhiyun int ib_get_eth_speed(struct ib_device *dev, u8 port_num, u16 *speed, u8 *width);
4354*4882a593Smuzhiyun
rdma_ah_retrieve_dmac(struct rdma_ah_attr * attr)4355*4882a593Smuzhiyun static inline u8 *rdma_ah_retrieve_dmac(struct rdma_ah_attr *attr)
4356*4882a593Smuzhiyun {
4357*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_ROCE)
4358*4882a593Smuzhiyun return attr->roce.dmac;
4359*4882a593Smuzhiyun return NULL;
4360*4882a593Smuzhiyun }
4361*4882a593Smuzhiyun
rdma_ah_set_dlid(struct rdma_ah_attr * attr,u32 dlid)4362*4882a593Smuzhiyun static inline void rdma_ah_set_dlid(struct rdma_ah_attr *attr, u32 dlid)
4363*4882a593Smuzhiyun {
4364*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_IB)
4365*4882a593Smuzhiyun attr->ib.dlid = (u16)dlid;
4366*4882a593Smuzhiyun else if (attr->type == RDMA_AH_ATTR_TYPE_OPA)
4367*4882a593Smuzhiyun attr->opa.dlid = dlid;
4368*4882a593Smuzhiyun }
4369*4882a593Smuzhiyun
rdma_ah_get_dlid(const struct rdma_ah_attr * attr)4370*4882a593Smuzhiyun static inline u32 rdma_ah_get_dlid(const struct rdma_ah_attr *attr)
4371*4882a593Smuzhiyun {
4372*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_IB)
4373*4882a593Smuzhiyun return attr->ib.dlid;
4374*4882a593Smuzhiyun else if (attr->type == RDMA_AH_ATTR_TYPE_OPA)
4375*4882a593Smuzhiyun return attr->opa.dlid;
4376*4882a593Smuzhiyun return 0;
4377*4882a593Smuzhiyun }
4378*4882a593Smuzhiyun
rdma_ah_set_sl(struct rdma_ah_attr * attr,u8 sl)4379*4882a593Smuzhiyun static inline void rdma_ah_set_sl(struct rdma_ah_attr *attr, u8 sl)
4380*4882a593Smuzhiyun {
4381*4882a593Smuzhiyun attr->sl = sl;
4382*4882a593Smuzhiyun }
4383*4882a593Smuzhiyun
rdma_ah_get_sl(const struct rdma_ah_attr * attr)4384*4882a593Smuzhiyun static inline u8 rdma_ah_get_sl(const struct rdma_ah_attr *attr)
4385*4882a593Smuzhiyun {
4386*4882a593Smuzhiyun return attr->sl;
4387*4882a593Smuzhiyun }
4388*4882a593Smuzhiyun
rdma_ah_set_path_bits(struct rdma_ah_attr * attr,u8 src_path_bits)4389*4882a593Smuzhiyun static inline void rdma_ah_set_path_bits(struct rdma_ah_attr *attr,
4390*4882a593Smuzhiyun u8 src_path_bits)
4391*4882a593Smuzhiyun {
4392*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_IB)
4393*4882a593Smuzhiyun attr->ib.src_path_bits = src_path_bits;
4394*4882a593Smuzhiyun else if (attr->type == RDMA_AH_ATTR_TYPE_OPA)
4395*4882a593Smuzhiyun attr->opa.src_path_bits = src_path_bits;
4396*4882a593Smuzhiyun }
4397*4882a593Smuzhiyun
rdma_ah_get_path_bits(const struct rdma_ah_attr * attr)4398*4882a593Smuzhiyun static inline u8 rdma_ah_get_path_bits(const struct rdma_ah_attr *attr)
4399*4882a593Smuzhiyun {
4400*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_IB)
4401*4882a593Smuzhiyun return attr->ib.src_path_bits;
4402*4882a593Smuzhiyun else if (attr->type == RDMA_AH_ATTR_TYPE_OPA)
4403*4882a593Smuzhiyun return attr->opa.src_path_bits;
4404*4882a593Smuzhiyun return 0;
4405*4882a593Smuzhiyun }
4406*4882a593Smuzhiyun
rdma_ah_set_make_grd(struct rdma_ah_attr * attr,bool make_grd)4407*4882a593Smuzhiyun static inline void rdma_ah_set_make_grd(struct rdma_ah_attr *attr,
4408*4882a593Smuzhiyun bool make_grd)
4409*4882a593Smuzhiyun {
4410*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_OPA)
4411*4882a593Smuzhiyun attr->opa.make_grd = make_grd;
4412*4882a593Smuzhiyun }
4413*4882a593Smuzhiyun
rdma_ah_get_make_grd(const struct rdma_ah_attr * attr)4414*4882a593Smuzhiyun static inline bool rdma_ah_get_make_grd(const struct rdma_ah_attr *attr)
4415*4882a593Smuzhiyun {
4416*4882a593Smuzhiyun if (attr->type == RDMA_AH_ATTR_TYPE_OPA)
4417*4882a593Smuzhiyun return attr->opa.make_grd;
4418*4882a593Smuzhiyun return false;
4419*4882a593Smuzhiyun }
4420*4882a593Smuzhiyun
rdma_ah_set_port_num(struct rdma_ah_attr * attr,u8 port_num)4421*4882a593Smuzhiyun static inline void rdma_ah_set_port_num(struct rdma_ah_attr *attr, u8 port_num)
4422*4882a593Smuzhiyun {
4423*4882a593Smuzhiyun attr->port_num = port_num;
4424*4882a593Smuzhiyun }
4425*4882a593Smuzhiyun
rdma_ah_get_port_num(const struct rdma_ah_attr * attr)4426*4882a593Smuzhiyun static inline u8 rdma_ah_get_port_num(const struct rdma_ah_attr *attr)
4427*4882a593Smuzhiyun {
4428*4882a593Smuzhiyun return attr->port_num;
4429*4882a593Smuzhiyun }
4430*4882a593Smuzhiyun
rdma_ah_set_static_rate(struct rdma_ah_attr * attr,u8 static_rate)4431*4882a593Smuzhiyun static inline void rdma_ah_set_static_rate(struct rdma_ah_attr *attr,
4432*4882a593Smuzhiyun u8 static_rate)
4433*4882a593Smuzhiyun {
4434*4882a593Smuzhiyun attr->static_rate = static_rate;
4435*4882a593Smuzhiyun }
4436*4882a593Smuzhiyun
rdma_ah_get_static_rate(const struct rdma_ah_attr * attr)4437*4882a593Smuzhiyun static inline u8 rdma_ah_get_static_rate(const struct rdma_ah_attr *attr)
4438*4882a593Smuzhiyun {
4439*4882a593Smuzhiyun return attr->static_rate;
4440*4882a593Smuzhiyun }
4441*4882a593Smuzhiyun
rdma_ah_set_ah_flags(struct rdma_ah_attr * attr,enum ib_ah_flags flag)4442*4882a593Smuzhiyun static inline void rdma_ah_set_ah_flags(struct rdma_ah_attr *attr,
4443*4882a593Smuzhiyun enum ib_ah_flags flag)
4444*4882a593Smuzhiyun {
4445*4882a593Smuzhiyun attr->ah_flags = flag;
4446*4882a593Smuzhiyun }
4447*4882a593Smuzhiyun
4448*4882a593Smuzhiyun static inline enum ib_ah_flags
rdma_ah_get_ah_flags(const struct rdma_ah_attr * attr)4449*4882a593Smuzhiyun rdma_ah_get_ah_flags(const struct rdma_ah_attr *attr)
4450*4882a593Smuzhiyun {
4451*4882a593Smuzhiyun return attr->ah_flags;
4452*4882a593Smuzhiyun }
4453*4882a593Smuzhiyun
4454*4882a593Smuzhiyun static inline const struct ib_global_route
rdma_ah_read_grh(const struct rdma_ah_attr * attr)4455*4882a593Smuzhiyun *rdma_ah_read_grh(const struct rdma_ah_attr *attr)
4456*4882a593Smuzhiyun {
4457*4882a593Smuzhiyun return &attr->grh;
4458*4882a593Smuzhiyun }
4459*4882a593Smuzhiyun
4460*4882a593Smuzhiyun /*To retrieve and modify the grh */
4461*4882a593Smuzhiyun static inline struct ib_global_route
rdma_ah_retrieve_grh(struct rdma_ah_attr * attr)4462*4882a593Smuzhiyun *rdma_ah_retrieve_grh(struct rdma_ah_attr *attr)
4463*4882a593Smuzhiyun {
4464*4882a593Smuzhiyun return &attr->grh;
4465*4882a593Smuzhiyun }
4466*4882a593Smuzhiyun
rdma_ah_set_dgid_raw(struct rdma_ah_attr * attr,void * dgid)4467*4882a593Smuzhiyun static inline void rdma_ah_set_dgid_raw(struct rdma_ah_attr *attr, void *dgid)
4468*4882a593Smuzhiyun {
4469*4882a593Smuzhiyun struct ib_global_route *grh = rdma_ah_retrieve_grh(attr);
4470*4882a593Smuzhiyun
4471*4882a593Smuzhiyun memcpy(grh->dgid.raw, dgid, sizeof(grh->dgid));
4472*4882a593Smuzhiyun }
4473*4882a593Smuzhiyun
rdma_ah_set_subnet_prefix(struct rdma_ah_attr * attr,__be64 prefix)4474*4882a593Smuzhiyun static inline void rdma_ah_set_subnet_prefix(struct rdma_ah_attr *attr,
4475*4882a593Smuzhiyun __be64 prefix)
4476*4882a593Smuzhiyun {
4477*4882a593Smuzhiyun struct ib_global_route *grh = rdma_ah_retrieve_grh(attr);
4478*4882a593Smuzhiyun
4479*4882a593Smuzhiyun grh->dgid.global.subnet_prefix = prefix;
4480*4882a593Smuzhiyun }
4481*4882a593Smuzhiyun
rdma_ah_set_interface_id(struct rdma_ah_attr * attr,__be64 if_id)4482*4882a593Smuzhiyun static inline void rdma_ah_set_interface_id(struct rdma_ah_attr *attr,
4483*4882a593Smuzhiyun __be64 if_id)
4484*4882a593Smuzhiyun {
4485*4882a593Smuzhiyun struct ib_global_route *grh = rdma_ah_retrieve_grh(attr);
4486*4882a593Smuzhiyun
4487*4882a593Smuzhiyun grh->dgid.global.interface_id = if_id;
4488*4882a593Smuzhiyun }
4489*4882a593Smuzhiyun
rdma_ah_set_grh(struct rdma_ah_attr * attr,union ib_gid * dgid,u32 flow_label,u8 sgid_index,u8 hop_limit,u8 traffic_class)4490*4882a593Smuzhiyun static inline void rdma_ah_set_grh(struct rdma_ah_attr *attr,
4491*4882a593Smuzhiyun union ib_gid *dgid, u32 flow_label,
4492*4882a593Smuzhiyun u8 sgid_index, u8 hop_limit,
4493*4882a593Smuzhiyun u8 traffic_class)
4494*4882a593Smuzhiyun {
4495*4882a593Smuzhiyun struct ib_global_route *grh = rdma_ah_retrieve_grh(attr);
4496*4882a593Smuzhiyun
4497*4882a593Smuzhiyun attr->ah_flags = IB_AH_GRH;
4498*4882a593Smuzhiyun if (dgid)
4499*4882a593Smuzhiyun grh->dgid = *dgid;
4500*4882a593Smuzhiyun grh->flow_label = flow_label;
4501*4882a593Smuzhiyun grh->sgid_index = sgid_index;
4502*4882a593Smuzhiyun grh->hop_limit = hop_limit;
4503*4882a593Smuzhiyun grh->traffic_class = traffic_class;
4504*4882a593Smuzhiyun grh->sgid_attr = NULL;
4505*4882a593Smuzhiyun }
4506*4882a593Smuzhiyun
4507*4882a593Smuzhiyun void rdma_destroy_ah_attr(struct rdma_ah_attr *ah_attr);
4508*4882a593Smuzhiyun void rdma_move_grh_sgid_attr(struct rdma_ah_attr *attr, union ib_gid *dgid,
4509*4882a593Smuzhiyun u32 flow_label, u8 hop_limit, u8 traffic_class,
4510*4882a593Smuzhiyun const struct ib_gid_attr *sgid_attr);
4511*4882a593Smuzhiyun void rdma_copy_ah_attr(struct rdma_ah_attr *dest,
4512*4882a593Smuzhiyun const struct rdma_ah_attr *src);
4513*4882a593Smuzhiyun void rdma_replace_ah_attr(struct rdma_ah_attr *old,
4514*4882a593Smuzhiyun const struct rdma_ah_attr *new);
4515*4882a593Smuzhiyun void rdma_move_ah_attr(struct rdma_ah_attr *dest, struct rdma_ah_attr *src);
4516*4882a593Smuzhiyun
4517*4882a593Smuzhiyun /**
4518*4882a593Smuzhiyun * rdma_ah_find_type - Return address handle type.
4519*4882a593Smuzhiyun *
4520*4882a593Smuzhiyun * @dev: Device to be checked
4521*4882a593Smuzhiyun * @port_num: Port number
4522*4882a593Smuzhiyun */
rdma_ah_find_type(struct ib_device * dev,u8 port_num)4523*4882a593Smuzhiyun static inline enum rdma_ah_attr_type rdma_ah_find_type(struct ib_device *dev,
4524*4882a593Smuzhiyun u8 port_num)
4525*4882a593Smuzhiyun {
4526*4882a593Smuzhiyun if (rdma_protocol_roce(dev, port_num))
4527*4882a593Smuzhiyun return RDMA_AH_ATTR_TYPE_ROCE;
4528*4882a593Smuzhiyun if (rdma_protocol_ib(dev, port_num)) {
4529*4882a593Smuzhiyun if (rdma_cap_opa_ah(dev, port_num))
4530*4882a593Smuzhiyun return RDMA_AH_ATTR_TYPE_OPA;
4531*4882a593Smuzhiyun return RDMA_AH_ATTR_TYPE_IB;
4532*4882a593Smuzhiyun }
4533*4882a593Smuzhiyun
4534*4882a593Smuzhiyun return RDMA_AH_ATTR_TYPE_UNDEFINED;
4535*4882a593Smuzhiyun }
4536*4882a593Smuzhiyun
4537*4882a593Smuzhiyun /**
4538*4882a593Smuzhiyun * ib_lid_cpu16 - Return lid in 16bit CPU encoding.
4539*4882a593Smuzhiyun * In the current implementation the only way to get
4540*4882a593Smuzhiyun * get the 32bit lid is from other sources for OPA.
4541*4882a593Smuzhiyun * For IB, lids will always be 16bits so cast the
4542*4882a593Smuzhiyun * value accordingly.
4543*4882a593Smuzhiyun *
4544*4882a593Smuzhiyun * @lid: A 32bit LID
4545*4882a593Smuzhiyun */
ib_lid_cpu16(u32 lid)4546*4882a593Smuzhiyun static inline u16 ib_lid_cpu16(u32 lid)
4547*4882a593Smuzhiyun {
4548*4882a593Smuzhiyun WARN_ON_ONCE(lid & 0xFFFF0000);
4549*4882a593Smuzhiyun return (u16)lid;
4550*4882a593Smuzhiyun }
4551*4882a593Smuzhiyun
4552*4882a593Smuzhiyun /**
4553*4882a593Smuzhiyun * ib_lid_be16 - Return lid in 16bit BE encoding.
4554*4882a593Smuzhiyun *
4555*4882a593Smuzhiyun * @lid: A 32bit LID
4556*4882a593Smuzhiyun */
ib_lid_be16(u32 lid)4557*4882a593Smuzhiyun static inline __be16 ib_lid_be16(u32 lid)
4558*4882a593Smuzhiyun {
4559*4882a593Smuzhiyun WARN_ON_ONCE(lid & 0xFFFF0000);
4560*4882a593Smuzhiyun return cpu_to_be16((u16)lid);
4561*4882a593Smuzhiyun }
4562*4882a593Smuzhiyun
4563*4882a593Smuzhiyun /**
4564*4882a593Smuzhiyun * ib_get_vector_affinity - Get the affinity mappings of a given completion
4565*4882a593Smuzhiyun * vector
4566*4882a593Smuzhiyun * @device: the rdma device
4567*4882a593Smuzhiyun * @comp_vector: index of completion vector
4568*4882a593Smuzhiyun *
4569*4882a593Smuzhiyun * Returns NULL on failure, otherwise a corresponding cpu map of the
4570*4882a593Smuzhiyun * completion vector (returns all-cpus map if the device driver doesn't
4571*4882a593Smuzhiyun * implement get_vector_affinity).
4572*4882a593Smuzhiyun */
4573*4882a593Smuzhiyun static inline const struct cpumask *
ib_get_vector_affinity(struct ib_device * device,int comp_vector)4574*4882a593Smuzhiyun ib_get_vector_affinity(struct ib_device *device, int comp_vector)
4575*4882a593Smuzhiyun {
4576*4882a593Smuzhiyun if (comp_vector < 0 || comp_vector >= device->num_comp_vectors ||
4577*4882a593Smuzhiyun !device->ops.get_vector_affinity)
4578*4882a593Smuzhiyun return NULL;
4579*4882a593Smuzhiyun
4580*4882a593Smuzhiyun return device->ops.get_vector_affinity(device, comp_vector);
4581*4882a593Smuzhiyun
4582*4882a593Smuzhiyun }
4583*4882a593Smuzhiyun
4584*4882a593Smuzhiyun /**
4585*4882a593Smuzhiyun * rdma_roce_rescan_device - Rescan all of the network devices in the system
4586*4882a593Smuzhiyun * and add their gids, as needed, to the relevant RoCE devices.
4587*4882a593Smuzhiyun *
4588*4882a593Smuzhiyun * @device: the rdma device
4589*4882a593Smuzhiyun */
4590*4882a593Smuzhiyun void rdma_roce_rescan_device(struct ib_device *ibdev);
4591*4882a593Smuzhiyun
4592*4882a593Smuzhiyun struct ib_ucontext *ib_uverbs_get_ucontext_file(struct ib_uverbs_file *ufile);
4593*4882a593Smuzhiyun
4594*4882a593Smuzhiyun int uverbs_destroy_def_handler(struct uverbs_attr_bundle *attrs);
4595*4882a593Smuzhiyun
4596*4882a593Smuzhiyun struct net_device *rdma_alloc_netdev(struct ib_device *device, u8 port_num,
4597*4882a593Smuzhiyun enum rdma_netdev_t type, const char *name,
4598*4882a593Smuzhiyun unsigned char name_assign_type,
4599*4882a593Smuzhiyun void (*setup)(struct net_device *));
4600*4882a593Smuzhiyun
4601*4882a593Smuzhiyun int rdma_init_netdev(struct ib_device *device, u8 port_num,
4602*4882a593Smuzhiyun enum rdma_netdev_t type, const char *name,
4603*4882a593Smuzhiyun unsigned char name_assign_type,
4604*4882a593Smuzhiyun void (*setup)(struct net_device *),
4605*4882a593Smuzhiyun struct net_device *netdev);
4606*4882a593Smuzhiyun
4607*4882a593Smuzhiyun /**
4608*4882a593Smuzhiyun * rdma_set_device_sysfs_group - Set device attributes group to have
4609*4882a593Smuzhiyun * driver specific sysfs entries at
4610*4882a593Smuzhiyun * for infiniband class.
4611*4882a593Smuzhiyun *
4612*4882a593Smuzhiyun * @device: device pointer for which attributes to be created
4613*4882a593Smuzhiyun * @group: Pointer to group which should be added when device
4614*4882a593Smuzhiyun * is registered with sysfs.
4615*4882a593Smuzhiyun * rdma_set_device_sysfs_group() allows existing drivers to expose one
4616*4882a593Smuzhiyun * group per device to have sysfs attributes.
4617*4882a593Smuzhiyun *
4618*4882a593Smuzhiyun * NOTE: New drivers should not make use of this API; instead new device
4619*4882a593Smuzhiyun * parameter should be exposed via netlink command. This API and mechanism
4620*4882a593Smuzhiyun * exist only for existing drivers.
4621*4882a593Smuzhiyun */
4622*4882a593Smuzhiyun static inline void
rdma_set_device_sysfs_group(struct ib_device * dev,const struct attribute_group * group)4623*4882a593Smuzhiyun rdma_set_device_sysfs_group(struct ib_device *dev,
4624*4882a593Smuzhiyun const struct attribute_group *group)
4625*4882a593Smuzhiyun {
4626*4882a593Smuzhiyun dev->groups[1] = group;
4627*4882a593Smuzhiyun }
4628*4882a593Smuzhiyun
4629*4882a593Smuzhiyun /**
4630*4882a593Smuzhiyun * rdma_device_to_ibdev - Get ib_device pointer from device pointer
4631*4882a593Smuzhiyun *
4632*4882a593Smuzhiyun * @device: device pointer for which ib_device pointer to retrieve
4633*4882a593Smuzhiyun *
4634*4882a593Smuzhiyun * rdma_device_to_ibdev() retrieves ib_device pointer from device.
4635*4882a593Smuzhiyun *
4636*4882a593Smuzhiyun */
rdma_device_to_ibdev(struct device * device)4637*4882a593Smuzhiyun static inline struct ib_device *rdma_device_to_ibdev(struct device *device)
4638*4882a593Smuzhiyun {
4639*4882a593Smuzhiyun struct ib_core_device *coredev =
4640*4882a593Smuzhiyun container_of(device, struct ib_core_device, dev);
4641*4882a593Smuzhiyun
4642*4882a593Smuzhiyun return coredev->owner;
4643*4882a593Smuzhiyun }
4644*4882a593Smuzhiyun
4645*4882a593Smuzhiyun /**
4646*4882a593Smuzhiyun * ibdev_to_node - return the NUMA node for a given ib_device
4647*4882a593Smuzhiyun * @dev: device to get the NUMA node for.
4648*4882a593Smuzhiyun */
ibdev_to_node(struct ib_device * ibdev)4649*4882a593Smuzhiyun static inline int ibdev_to_node(struct ib_device *ibdev)
4650*4882a593Smuzhiyun {
4651*4882a593Smuzhiyun struct device *parent = ibdev->dev.parent;
4652*4882a593Smuzhiyun
4653*4882a593Smuzhiyun if (!parent)
4654*4882a593Smuzhiyun return NUMA_NO_NODE;
4655*4882a593Smuzhiyun return dev_to_node(parent);
4656*4882a593Smuzhiyun }
4657*4882a593Smuzhiyun
4658*4882a593Smuzhiyun /**
4659*4882a593Smuzhiyun * rdma_device_to_drv_device - Helper macro to reach back to driver's
4660*4882a593Smuzhiyun * ib_device holder structure from device pointer.
4661*4882a593Smuzhiyun *
4662*4882a593Smuzhiyun * NOTE: New drivers should not make use of this API; This API is only for
4663*4882a593Smuzhiyun * existing drivers who have exposed sysfs entries using
4664*4882a593Smuzhiyun * rdma_set_device_sysfs_group().
4665*4882a593Smuzhiyun */
4666*4882a593Smuzhiyun #define rdma_device_to_drv_device(dev, drv_dev_struct, ibdev_member) \
4667*4882a593Smuzhiyun container_of(rdma_device_to_ibdev(dev), drv_dev_struct, ibdev_member)
4668*4882a593Smuzhiyun
4669*4882a593Smuzhiyun bool rdma_dev_access_netns(const struct ib_device *device,
4670*4882a593Smuzhiyun const struct net *net);
4671*4882a593Smuzhiyun
4672*4882a593Smuzhiyun #define IB_ROCE_UDP_ENCAP_VALID_PORT_MIN (0xC000)
4673*4882a593Smuzhiyun #define IB_ROCE_UDP_ENCAP_VALID_PORT_MAX (0xFFFF)
4674*4882a593Smuzhiyun #define IB_GRH_FLOWLABEL_MASK (0x000FFFFF)
4675*4882a593Smuzhiyun
4676*4882a593Smuzhiyun /**
4677*4882a593Smuzhiyun * rdma_flow_label_to_udp_sport - generate a RoCE v2 UDP src port value based
4678*4882a593Smuzhiyun * on the flow_label
4679*4882a593Smuzhiyun *
4680*4882a593Smuzhiyun * This function will convert the 20 bit flow_label input to a valid RoCE v2
4681*4882a593Smuzhiyun * UDP src port 14 bit value. All RoCE V2 drivers should use this same
4682*4882a593Smuzhiyun * convention.
4683*4882a593Smuzhiyun */
rdma_flow_label_to_udp_sport(u32 fl)4684*4882a593Smuzhiyun static inline u16 rdma_flow_label_to_udp_sport(u32 fl)
4685*4882a593Smuzhiyun {
4686*4882a593Smuzhiyun u32 fl_low = fl & 0x03fff, fl_high = fl & 0xFC000;
4687*4882a593Smuzhiyun
4688*4882a593Smuzhiyun fl_low ^= fl_high >> 14;
4689*4882a593Smuzhiyun return (u16)(fl_low | IB_ROCE_UDP_ENCAP_VALID_PORT_MIN);
4690*4882a593Smuzhiyun }
4691*4882a593Smuzhiyun
4692*4882a593Smuzhiyun /**
4693*4882a593Smuzhiyun * rdma_calc_flow_label - generate a RDMA symmetric flow label value based on
4694*4882a593Smuzhiyun * local and remote qpn values
4695*4882a593Smuzhiyun *
4696*4882a593Smuzhiyun * This function folded the multiplication results of two qpns, 24 bit each,
4697*4882a593Smuzhiyun * fields, and converts it to a 20 bit results.
4698*4882a593Smuzhiyun *
4699*4882a593Smuzhiyun * This function will create symmetric flow_label value based on the local
4700*4882a593Smuzhiyun * and remote qpn values. this will allow both the requester and responder
4701*4882a593Smuzhiyun * to calculate the same flow_label for a given connection.
4702*4882a593Smuzhiyun *
4703*4882a593Smuzhiyun * This helper function should be used by driver in case the upper layer
4704*4882a593Smuzhiyun * provide a zero flow_label value. This is to improve entropy of RDMA
4705*4882a593Smuzhiyun * traffic in the network.
4706*4882a593Smuzhiyun */
rdma_calc_flow_label(u32 lqpn,u32 rqpn)4707*4882a593Smuzhiyun static inline u32 rdma_calc_flow_label(u32 lqpn, u32 rqpn)
4708*4882a593Smuzhiyun {
4709*4882a593Smuzhiyun u64 v = (u64)lqpn * rqpn;
4710*4882a593Smuzhiyun
4711*4882a593Smuzhiyun v ^= v >> 20;
4712*4882a593Smuzhiyun v ^= v >> 40;
4713*4882a593Smuzhiyun
4714*4882a593Smuzhiyun return (u32)(v & IB_GRH_FLOWLABEL_MASK);
4715*4882a593Smuzhiyun }
4716*4882a593Smuzhiyun #endif /* IB_VERBS_H */
4717