1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* Interface for implementing AF_XDP zero-copy support in drivers.
3*4882a593Smuzhiyun * Copyright(c) 2020 Intel Corporation.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef _LINUX_XDP_SOCK_DRV_H
7*4882a593Smuzhiyun #define _LINUX_XDP_SOCK_DRV_H
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <net/xdp_sock.h>
10*4882a593Smuzhiyun #include <net/xsk_buff_pool.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #ifdef CONFIG_XDP_SOCKETS
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun void xsk_tx_completed(struct xsk_buff_pool *pool, u32 nb_entries);
15*4882a593Smuzhiyun bool xsk_tx_peek_desc(struct xsk_buff_pool *pool, struct xdp_desc *desc);
16*4882a593Smuzhiyun void xsk_tx_release(struct xsk_buff_pool *pool);
17*4882a593Smuzhiyun struct xsk_buff_pool *xsk_get_pool_from_qid(struct net_device *dev,
18*4882a593Smuzhiyun u16 queue_id);
19*4882a593Smuzhiyun void xsk_set_rx_need_wakeup(struct xsk_buff_pool *pool);
20*4882a593Smuzhiyun void xsk_set_tx_need_wakeup(struct xsk_buff_pool *pool);
21*4882a593Smuzhiyun void xsk_clear_rx_need_wakeup(struct xsk_buff_pool *pool);
22*4882a593Smuzhiyun void xsk_clear_tx_need_wakeup(struct xsk_buff_pool *pool);
23*4882a593Smuzhiyun bool xsk_uses_need_wakeup(struct xsk_buff_pool *pool);
24*4882a593Smuzhiyun
xsk_pool_get_headroom(struct xsk_buff_pool * pool)25*4882a593Smuzhiyun static inline u32 xsk_pool_get_headroom(struct xsk_buff_pool *pool)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun return XDP_PACKET_HEADROOM + pool->headroom;
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
xsk_pool_get_chunk_size(struct xsk_buff_pool * pool)30*4882a593Smuzhiyun static inline u32 xsk_pool_get_chunk_size(struct xsk_buff_pool *pool)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun return pool->chunk_size;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
xsk_pool_get_rx_frame_size(struct xsk_buff_pool * pool)35*4882a593Smuzhiyun static inline u32 xsk_pool_get_rx_frame_size(struct xsk_buff_pool *pool)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun return xsk_pool_get_chunk_size(pool) - xsk_pool_get_headroom(pool);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
xsk_pool_set_rxq_info(struct xsk_buff_pool * pool,struct xdp_rxq_info * rxq)40*4882a593Smuzhiyun static inline void xsk_pool_set_rxq_info(struct xsk_buff_pool *pool,
41*4882a593Smuzhiyun struct xdp_rxq_info *rxq)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun xp_set_rxq_info(pool, rxq);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
xsk_pool_dma_unmap(struct xsk_buff_pool * pool,unsigned long attrs)46*4882a593Smuzhiyun static inline void xsk_pool_dma_unmap(struct xsk_buff_pool *pool,
47*4882a593Smuzhiyun unsigned long attrs)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun xp_dma_unmap(pool, attrs);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
xsk_pool_dma_map(struct xsk_buff_pool * pool,struct device * dev,unsigned long attrs)52*4882a593Smuzhiyun static inline int xsk_pool_dma_map(struct xsk_buff_pool *pool,
53*4882a593Smuzhiyun struct device *dev, unsigned long attrs)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct xdp_umem *umem = pool->umem;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return xp_dma_map(pool, dev, attrs, umem->pgs, umem->npgs);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
xsk_buff_xdp_get_dma(struct xdp_buff * xdp)60*4882a593Smuzhiyun static inline dma_addr_t xsk_buff_xdp_get_dma(struct xdp_buff *xdp)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun struct xdp_buff_xsk *xskb = container_of(xdp, struct xdp_buff_xsk, xdp);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return xp_get_dma(xskb);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
xsk_buff_xdp_get_frame_dma(struct xdp_buff * xdp)67*4882a593Smuzhiyun static inline dma_addr_t xsk_buff_xdp_get_frame_dma(struct xdp_buff *xdp)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct xdp_buff_xsk *xskb = container_of(xdp, struct xdp_buff_xsk, xdp);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return xp_get_frame_dma(xskb);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
xsk_buff_alloc(struct xsk_buff_pool * pool)74*4882a593Smuzhiyun static inline struct xdp_buff *xsk_buff_alloc(struct xsk_buff_pool *pool)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun return xp_alloc(pool);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
xsk_buff_can_alloc(struct xsk_buff_pool * pool,u32 count)79*4882a593Smuzhiyun static inline bool xsk_buff_can_alloc(struct xsk_buff_pool *pool, u32 count)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun return xp_can_alloc(pool, count);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
xsk_buff_free(struct xdp_buff * xdp)84*4882a593Smuzhiyun static inline void xsk_buff_free(struct xdp_buff *xdp)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct xdp_buff_xsk *xskb = container_of(xdp, struct xdp_buff_xsk, xdp);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun xp_free(xskb);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
xsk_buff_raw_get_dma(struct xsk_buff_pool * pool,u64 addr)91*4882a593Smuzhiyun static inline dma_addr_t xsk_buff_raw_get_dma(struct xsk_buff_pool *pool,
92*4882a593Smuzhiyun u64 addr)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun return xp_raw_get_dma(pool, addr);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
xsk_buff_raw_get_data(struct xsk_buff_pool * pool,u64 addr)97*4882a593Smuzhiyun static inline void *xsk_buff_raw_get_data(struct xsk_buff_pool *pool, u64 addr)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return xp_raw_get_data(pool, addr);
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
xsk_buff_dma_sync_for_cpu(struct xdp_buff * xdp,struct xsk_buff_pool * pool)102*4882a593Smuzhiyun static inline void xsk_buff_dma_sync_for_cpu(struct xdp_buff *xdp, struct xsk_buff_pool *pool)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun struct xdp_buff_xsk *xskb = container_of(xdp, struct xdp_buff_xsk, xdp);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun if (!pool->dma_need_sync)
107*4882a593Smuzhiyun return;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun xp_dma_sync_for_cpu(xskb);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
xsk_buff_raw_dma_sync_for_device(struct xsk_buff_pool * pool,dma_addr_t dma,size_t size)112*4882a593Smuzhiyun static inline void xsk_buff_raw_dma_sync_for_device(struct xsk_buff_pool *pool,
113*4882a593Smuzhiyun dma_addr_t dma,
114*4882a593Smuzhiyun size_t size)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun xp_dma_sync_for_device(pool, dma, size);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun #else
120*4882a593Smuzhiyun
xsk_tx_completed(struct xsk_buff_pool * pool,u32 nb_entries)121*4882a593Smuzhiyun static inline void xsk_tx_completed(struct xsk_buff_pool *pool, u32 nb_entries)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
xsk_tx_peek_desc(struct xsk_buff_pool * pool,struct xdp_desc * desc)125*4882a593Smuzhiyun static inline bool xsk_tx_peek_desc(struct xsk_buff_pool *pool,
126*4882a593Smuzhiyun struct xdp_desc *desc)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun return false;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
xsk_tx_release(struct xsk_buff_pool * pool)131*4882a593Smuzhiyun static inline void xsk_tx_release(struct xsk_buff_pool *pool)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static inline struct xsk_buff_pool *
xsk_get_pool_from_qid(struct net_device * dev,u16 queue_id)136*4882a593Smuzhiyun xsk_get_pool_from_qid(struct net_device *dev, u16 queue_id)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun return NULL;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
xsk_set_rx_need_wakeup(struct xsk_buff_pool * pool)141*4882a593Smuzhiyun static inline void xsk_set_rx_need_wakeup(struct xsk_buff_pool *pool)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
xsk_set_tx_need_wakeup(struct xsk_buff_pool * pool)145*4882a593Smuzhiyun static inline void xsk_set_tx_need_wakeup(struct xsk_buff_pool *pool)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
xsk_clear_rx_need_wakeup(struct xsk_buff_pool * pool)149*4882a593Smuzhiyun static inline void xsk_clear_rx_need_wakeup(struct xsk_buff_pool *pool)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
xsk_clear_tx_need_wakeup(struct xsk_buff_pool * pool)153*4882a593Smuzhiyun static inline void xsk_clear_tx_need_wakeup(struct xsk_buff_pool *pool)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
xsk_uses_need_wakeup(struct xsk_buff_pool * pool)157*4882a593Smuzhiyun static inline bool xsk_uses_need_wakeup(struct xsk_buff_pool *pool)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun return false;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
xsk_pool_get_headroom(struct xsk_buff_pool * pool)162*4882a593Smuzhiyun static inline u32 xsk_pool_get_headroom(struct xsk_buff_pool *pool)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun
xsk_pool_get_chunk_size(struct xsk_buff_pool * pool)167*4882a593Smuzhiyun static inline u32 xsk_pool_get_chunk_size(struct xsk_buff_pool *pool)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
xsk_pool_get_rx_frame_size(struct xsk_buff_pool * pool)172*4882a593Smuzhiyun static inline u32 xsk_pool_get_rx_frame_size(struct xsk_buff_pool *pool)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
xsk_pool_set_rxq_info(struct xsk_buff_pool * pool,struct xdp_rxq_info * rxq)177*4882a593Smuzhiyun static inline void xsk_pool_set_rxq_info(struct xsk_buff_pool *pool,
178*4882a593Smuzhiyun struct xdp_rxq_info *rxq)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
xsk_pool_dma_unmap(struct xsk_buff_pool * pool,unsigned long attrs)182*4882a593Smuzhiyun static inline void xsk_pool_dma_unmap(struct xsk_buff_pool *pool,
183*4882a593Smuzhiyun unsigned long attrs)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
xsk_pool_dma_map(struct xsk_buff_pool * pool,struct device * dev,unsigned long attrs)187*4882a593Smuzhiyun static inline int xsk_pool_dma_map(struct xsk_buff_pool *pool,
188*4882a593Smuzhiyun struct device *dev, unsigned long attrs)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
xsk_buff_xdp_get_dma(struct xdp_buff * xdp)193*4882a593Smuzhiyun static inline dma_addr_t xsk_buff_xdp_get_dma(struct xdp_buff *xdp)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun return 0;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
xsk_buff_xdp_get_frame_dma(struct xdp_buff * xdp)198*4882a593Smuzhiyun static inline dma_addr_t xsk_buff_xdp_get_frame_dma(struct xdp_buff *xdp)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
xsk_buff_alloc(struct xsk_buff_pool * pool)203*4882a593Smuzhiyun static inline struct xdp_buff *xsk_buff_alloc(struct xsk_buff_pool *pool)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun return NULL;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
xsk_buff_can_alloc(struct xsk_buff_pool * pool,u32 count)208*4882a593Smuzhiyun static inline bool xsk_buff_can_alloc(struct xsk_buff_pool *pool, u32 count)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun return false;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
xsk_buff_free(struct xdp_buff * xdp)213*4882a593Smuzhiyun static inline void xsk_buff_free(struct xdp_buff *xdp)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
xsk_buff_raw_get_dma(struct xsk_buff_pool * pool,u64 addr)217*4882a593Smuzhiyun static inline dma_addr_t xsk_buff_raw_get_dma(struct xsk_buff_pool *pool,
218*4882a593Smuzhiyun u64 addr)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun return 0;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
xsk_buff_raw_get_data(struct xsk_buff_pool * pool,u64 addr)223*4882a593Smuzhiyun static inline void *xsk_buff_raw_get_data(struct xsk_buff_pool *pool, u64 addr)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun return NULL;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
xsk_buff_dma_sync_for_cpu(struct xdp_buff * xdp,struct xsk_buff_pool * pool)228*4882a593Smuzhiyun static inline void xsk_buff_dma_sync_for_cpu(struct xdp_buff *xdp, struct xsk_buff_pool *pool)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
xsk_buff_raw_dma_sync_for_device(struct xsk_buff_pool * pool,dma_addr_t dma,size_t size)232*4882a593Smuzhiyun static inline void xsk_buff_raw_dma_sync_for_device(struct xsk_buff_pool *pool,
233*4882a593Smuzhiyun dma_addr_t dma,
234*4882a593Smuzhiyun size_t size)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun #endif /* CONFIG_XDP_SOCKETS */
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun #endif /* _LINUX_XDP_SOCK_DRV_H */
241