xref: /OK3568_Linux_fs/kernel/include/net/bluetooth/hci.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun    BlueZ - Bluetooth protocol stack for Linux
3*4882a593Smuzhiyun    Copyright (C) 2000-2001 Qualcomm Incorporated
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun    Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun    This program is free software; you can redistribute it and/or modify
8*4882a593Smuzhiyun    it under the terms of the GNU General Public License version 2 as
9*4882a593Smuzhiyun    published by the Free Software Foundation;
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
12*4882a593Smuzhiyun    OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
13*4882a593Smuzhiyun    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY RIGHTS.
14*4882a593Smuzhiyun    IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) AND AUTHOR(S) BE LIABLE FOR ANY
15*4882a593Smuzhiyun    CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES
16*4882a593Smuzhiyun    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17*4882a593Smuzhiyun    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18*4882a593Smuzhiyun    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun    ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF ANY PATENTS,
21*4882a593Smuzhiyun    COPYRIGHTS, TRADEMARKS OR OTHER RIGHTS, RELATING TO USE OF THIS
22*4882a593Smuzhiyun    SOFTWARE IS DISCLAIMED.
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #ifndef __HCI_H
26*4882a593Smuzhiyun #define __HCI_H
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define HCI_MAX_ACL_SIZE	1024
29*4882a593Smuzhiyun #define HCI_MAX_SCO_SIZE	255
30*4882a593Smuzhiyun #define HCI_MAX_ISO_SIZE	251
31*4882a593Smuzhiyun #define HCI_MAX_EVENT_SIZE	260
32*4882a593Smuzhiyun #define HCI_MAX_FRAME_SIZE	(HCI_MAX_ACL_SIZE + 4)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define HCI_LINK_KEY_SIZE	16
35*4882a593Smuzhiyun #define HCI_AMP_LINK_KEY_SIZE	(2 * HCI_LINK_KEY_SIZE)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define HCI_MAX_AMP_ASSOC_SIZE	672
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define HCI_MAX_CSB_DATA_SIZE	252
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* HCI dev events */
42*4882a593Smuzhiyun #define HCI_DEV_REG			1
43*4882a593Smuzhiyun #define HCI_DEV_UNREG			2
44*4882a593Smuzhiyun #define HCI_DEV_UP			3
45*4882a593Smuzhiyun #define HCI_DEV_DOWN			4
46*4882a593Smuzhiyun #define HCI_DEV_SUSPEND			5
47*4882a593Smuzhiyun #define HCI_DEV_RESUME			6
48*4882a593Smuzhiyun #define HCI_DEV_OPEN			7
49*4882a593Smuzhiyun #define HCI_DEV_CLOSE			8
50*4882a593Smuzhiyun #define HCI_DEV_SETUP			9
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* HCI notify events */
53*4882a593Smuzhiyun #define HCI_NOTIFY_CONN_ADD		1
54*4882a593Smuzhiyun #define HCI_NOTIFY_CONN_DEL		2
55*4882a593Smuzhiyun #define HCI_NOTIFY_VOICE_SETTING	3
56*4882a593Smuzhiyun #define HCI_NOTIFY_ENABLE_SCO_CVSD	4
57*4882a593Smuzhiyun #define HCI_NOTIFY_ENABLE_SCO_TRANSP	5
58*4882a593Smuzhiyun #define HCI_NOTIFY_DISABLE_SCO		6
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* HCI bus types */
61*4882a593Smuzhiyun #define HCI_VIRTUAL	0
62*4882a593Smuzhiyun #define HCI_USB		1
63*4882a593Smuzhiyun #define HCI_PCCARD	2
64*4882a593Smuzhiyun #define HCI_UART	3
65*4882a593Smuzhiyun #define HCI_RS232	4
66*4882a593Smuzhiyun #define HCI_PCI		5
67*4882a593Smuzhiyun #define HCI_SDIO	6
68*4882a593Smuzhiyun #define HCI_SPI		7
69*4882a593Smuzhiyun #define HCI_I2C		8
70*4882a593Smuzhiyun #define HCI_SMD		9
71*4882a593Smuzhiyun #define HCI_VIRTIO	10
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /* HCI controller types */
74*4882a593Smuzhiyun #define HCI_PRIMARY	0x00
75*4882a593Smuzhiyun #define HCI_AMP		0x01
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* First BR/EDR Controller shall have ID = 0 */
78*4882a593Smuzhiyun #define AMP_ID_BREDR	0x00
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* AMP controller types */
81*4882a593Smuzhiyun #define AMP_TYPE_BREDR	0x00
82*4882a593Smuzhiyun #define AMP_TYPE_80211	0x01
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* AMP controller status */
85*4882a593Smuzhiyun #define AMP_STATUS_POWERED_DOWN			0x00
86*4882a593Smuzhiyun #define AMP_STATUS_BLUETOOTH_ONLY		0x01
87*4882a593Smuzhiyun #define AMP_STATUS_NO_CAPACITY			0x02
88*4882a593Smuzhiyun #define AMP_STATUS_LOW_CAPACITY			0x03
89*4882a593Smuzhiyun #define AMP_STATUS_MEDIUM_CAPACITY		0x04
90*4882a593Smuzhiyun #define AMP_STATUS_HIGH_CAPACITY		0x05
91*4882a593Smuzhiyun #define AMP_STATUS_FULL_CAPACITY		0x06
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* HCI device quirks */
94*4882a593Smuzhiyun enum {
95*4882a593Smuzhiyun 	/* When this quirk is set, the HCI Reset command is send when
96*4882a593Smuzhiyun 	 * closing the transport instead of when opening it.
97*4882a593Smuzhiyun 	 *
98*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
99*4882a593Smuzhiyun 	 */
100*4882a593Smuzhiyun 	HCI_QUIRK_RESET_ON_CLOSE,
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/* When this quirk is set, the device is turned into a raw-only
103*4882a593Smuzhiyun 	 * device and it will stay in unconfigured state.
104*4882a593Smuzhiyun 	 *
105*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
106*4882a593Smuzhiyun 	 */
107*4882a593Smuzhiyun 	HCI_QUIRK_RAW_DEVICE,
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	/* When this quirk is set, the buffer sizes reported by
110*4882a593Smuzhiyun 	 * HCI Read Buffer Size command are corrected if invalid.
111*4882a593Smuzhiyun 	 *
112*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
113*4882a593Smuzhiyun 	 */
114*4882a593Smuzhiyun 	HCI_QUIRK_FIXUP_BUFFER_SIZE,
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* When this quirk is set, then a controller that does not
117*4882a593Smuzhiyun 	 * indicate support for Inquiry Result with RSSI is assumed to
118*4882a593Smuzhiyun 	 * support it anyway. Some early Bluetooth 1.2 controllers had
119*4882a593Smuzhiyun 	 * wrongly configured local features that will require forcing
120*4882a593Smuzhiyun 	 * them to enable this mode. Getting RSSI information with the
121*4882a593Smuzhiyun 	 * inquiry responses is preferred since it allows for a better
122*4882a593Smuzhiyun 	 * user experience.
123*4882a593Smuzhiyun 	 *
124*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
125*4882a593Smuzhiyun 	 */
126*4882a593Smuzhiyun 	HCI_QUIRK_FIXUP_INQUIRY_MODE,
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	/* When this quirk is set, then the HCI Read Local Supported
129*4882a593Smuzhiyun 	 * Commands command is not supported. In general Bluetooth 1.2
130*4882a593Smuzhiyun 	 * and later controllers should support this command. However
131*4882a593Smuzhiyun 	 * some controllers indicate Bluetooth 1.2 support, but do
132*4882a593Smuzhiyun 	 * not support this command.
133*4882a593Smuzhiyun 	 *
134*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
135*4882a593Smuzhiyun 	 */
136*4882a593Smuzhiyun 	HCI_QUIRK_BROKEN_LOCAL_COMMANDS,
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	/* When this quirk is set, then no stored link key handling
139*4882a593Smuzhiyun 	 * is performed. This is mainly due to the fact that the
140*4882a593Smuzhiyun 	 * HCI Delete Stored Link Key command is advertised, but
141*4882a593Smuzhiyun 	 * not supported.
142*4882a593Smuzhiyun 	 *
143*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
144*4882a593Smuzhiyun 	 */
145*4882a593Smuzhiyun 	HCI_QUIRK_BROKEN_STORED_LINK_KEY,
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	/* When this quirk is set, an external configuration step
148*4882a593Smuzhiyun 	 * is required and will be indicated with the controller
149*4882a593Smuzhiyun 	 * configuration.
150*4882a593Smuzhiyun 	 *
151*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
152*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
153*4882a593Smuzhiyun 	 */
154*4882a593Smuzhiyun 	HCI_QUIRK_EXTERNAL_CONFIG,
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	/* When this quirk is set, the public Bluetooth address
157*4882a593Smuzhiyun 	 * initially reported by HCI Read BD Address command
158*4882a593Smuzhiyun 	 * is considered invalid. Controller configuration is
159*4882a593Smuzhiyun 	 * required before this device can be used.
160*4882a593Smuzhiyun 	 *
161*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
162*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
163*4882a593Smuzhiyun 	 */
164*4882a593Smuzhiyun 	HCI_QUIRK_INVALID_BDADDR,
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	/* When this quirk is set, the public Bluetooth address
167*4882a593Smuzhiyun 	 * initially reported by HCI Read BD Address command
168*4882a593Smuzhiyun 	 * is considered invalid. The public BD Address can be
169*4882a593Smuzhiyun 	 * specified in the fwnode property 'local-bd-address'.
170*4882a593Smuzhiyun 	 * If this property does not exist or is invalid controller
171*4882a593Smuzhiyun 	 * configuration is required before this device can be used.
172*4882a593Smuzhiyun 	 *
173*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
174*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
175*4882a593Smuzhiyun 	 */
176*4882a593Smuzhiyun 	HCI_QUIRK_USE_BDADDR_PROPERTY,
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/* When this quirk is set, the duplicate filtering during
179*4882a593Smuzhiyun 	 * scanning is based on Bluetooth devices addresses. To allow
180*4882a593Smuzhiyun 	 * RSSI based updates, restart scanning if needed.
181*4882a593Smuzhiyun 	 *
182*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
183*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
184*4882a593Smuzhiyun 	 */
185*4882a593Smuzhiyun 	HCI_QUIRK_STRICT_DUPLICATE_FILTER,
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	/* When this quirk is set, LE scan and BR/EDR inquiry is done
188*4882a593Smuzhiyun 	 * simultaneously, otherwise it's interleaved.
189*4882a593Smuzhiyun 	 *
190*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
191*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
192*4882a593Smuzhiyun 	 */
193*4882a593Smuzhiyun 	HCI_QUIRK_SIMULTANEOUS_DISCOVERY,
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	/* When this quirk is set, the enabling of diagnostic mode is
196*4882a593Smuzhiyun 	 * not persistent over HCI Reset. Every time the controller
197*4882a593Smuzhiyun 	 * is brought up it needs to be reprogrammed.
198*4882a593Smuzhiyun 	 *
199*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
200*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
201*4882a593Smuzhiyun 	 */
202*4882a593Smuzhiyun 	HCI_QUIRK_NON_PERSISTENT_DIAG,
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	/* When this quirk is set, setup() would be run after every
205*4882a593Smuzhiyun 	 * open() and not just after the first open().
206*4882a593Smuzhiyun 	 *
207*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
208*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
209*4882a593Smuzhiyun 	 *
210*4882a593Smuzhiyun 	 */
211*4882a593Smuzhiyun 	HCI_QUIRK_NON_PERSISTENT_SETUP,
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/* When this quirk is set, wide band speech is supported by
214*4882a593Smuzhiyun 	 * the driver since no reliable mechanism exist to report
215*4882a593Smuzhiyun 	 * this from the hardware, a driver flag is use to convey
216*4882a593Smuzhiyun 	 * this support
217*4882a593Smuzhiyun 	 *
218*4882a593Smuzhiyun 	 * This quirk must be set before hci_register_dev is called.
219*4882a593Smuzhiyun 	 */
220*4882a593Smuzhiyun 	HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	/* When this quirk is set, the controller has validated that
223*4882a593Smuzhiyun 	 * LE states reported through the HCI_LE_READ_SUPPORTED_STATES are
224*4882a593Smuzhiyun 	 * valid.  This mechanism is necessary as many controllers have
225*4882a593Smuzhiyun 	 * been seen has having trouble initiating a connectable
226*4882a593Smuzhiyun 	 * advertisement despite the state combination being reported as
227*4882a593Smuzhiyun 	 * supported.
228*4882a593Smuzhiyun 	 */
229*4882a593Smuzhiyun 	HCI_QUIRK_VALID_LE_STATES,
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/* When this quirk is set, then erroneous data reporting
232*4882a593Smuzhiyun 	 * is ignored. This is mainly due to the fact that the HCI
233*4882a593Smuzhiyun 	 * Read Default Erroneous Data Reporting command is advertised,
234*4882a593Smuzhiyun 	 * but not supported; these controllers often reply with unknown
235*4882a593Smuzhiyun 	 * command and tend to lock up randomly. Needing a hard reset.
236*4882a593Smuzhiyun 	 *
237*4882a593Smuzhiyun 	 * This quirk can be set before hci_register_dev is called or
238*4882a593Smuzhiyun 	 * during the hdev->setup vendor callback.
239*4882a593Smuzhiyun 	 */
240*4882a593Smuzhiyun 	HCI_QUIRK_BROKEN_ERR_DATA_REPORTING,
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	/*
243*4882a593Smuzhiyun 	 * When this quirk is set, then the hci_suspend_notifier is not
244*4882a593Smuzhiyun 	 * registered. This is intended for devices which drop completely
245*4882a593Smuzhiyun 	 * from the bus on system-suspend and which will show up as a new
246*4882a593Smuzhiyun 	 * HCI after resume.
247*4882a593Smuzhiyun 	 */
248*4882a593Smuzhiyun 	HCI_QUIRK_NO_SUSPEND_NOTIFIER,
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /* HCI device flags */
252*4882a593Smuzhiyun enum {
253*4882a593Smuzhiyun 	HCI_UP,
254*4882a593Smuzhiyun 	HCI_INIT,
255*4882a593Smuzhiyun 	HCI_RUNNING,
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	HCI_PSCAN,
258*4882a593Smuzhiyun 	HCI_ISCAN,
259*4882a593Smuzhiyun 	HCI_AUTH,
260*4882a593Smuzhiyun 	HCI_ENCRYPT,
261*4882a593Smuzhiyun 	HCI_INQUIRY,
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	HCI_RAW,
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	HCI_RESET,
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun /* HCI socket flags */
269*4882a593Smuzhiyun enum {
270*4882a593Smuzhiyun 	HCI_SOCK_TRUSTED,
271*4882a593Smuzhiyun 	HCI_MGMT_INDEX_EVENTS,
272*4882a593Smuzhiyun 	HCI_MGMT_UNCONF_INDEX_EVENTS,
273*4882a593Smuzhiyun 	HCI_MGMT_EXT_INDEX_EVENTS,
274*4882a593Smuzhiyun 	HCI_MGMT_EXT_INFO_EVENTS,
275*4882a593Smuzhiyun 	HCI_MGMT_OPTION_EVENTS,
276*4882a593Smuzhiyun 	HCI_MGMT_SETTING_EVENTS,
277*4882a593Smuzhiyun 	HCI_MGMT_DEV_CLASS_EVENTS,
278*4882a593Smuzhiyun 	HCI_MGMT_LOCAL_NAME_EVENTS,
279*4882a593Smuzhiyun 	HCI_MGMT_OOB_DATA_EVENTS,
280*4882a593Smuzhiyun 	HCI_MGMT_EXP_FEATURE_EVENTS,
281*4882a593Smuzhiyun };
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun /*
284*4882a593Smuzhiyun  * BR/EDR and/or LE controller flags: the flags defined here should represent
285*4882a593Smuzhiyun  * states from the controller.
286*4882a593Smuzhiyun  */
287*4882a593Smuzhiyun enum {
288*4882a593Smuzhiyun 	HCI_SETUP,
289*4882a593Smuzhiyun 	HCI_CONFIG,
290*4882a593Smuzhiyun 	HCI_AUTO_OFF,
291*4882a593Smuzhiyun 	HCI_RFKILLED,
292*4882a593Smuzhiyun 	HCI_MGMT,
293*4882a593Smuzhiyun 	HCI_BONDABLE,
294*4882a593Smuzhiyun 	HCI_SERVICE_CACHE,
295*4882a593Smuzhiyun 	HCI_KEEP_DEBUG_KEYS,
296*4882a593Smuzhiyun 	HCI_USE_DEBUG_KEYS,
297*4882a593Smuzhiyun 	HCI_UNREGISTER,
298*4882a593Smuzhiyun 	HCI_UNCONFIGURED,
299*4882a593Smuzhiyun 	HCI_USER_CHANNEL,
300*4882a593Smuzhiyun 	HCI_EXT_CONFIGURED,
301*4882a593Smuzhiyun 	HCI_LE_ADV,
302*4882a593Smuzhiyun 	HCI_LE_SCAN,
303*4882a593Smuzhiyun 	HCI_SSP_ENABLED,
304*4882a593Smuzhiyun 	HCI_SC_ENABLED,
305*4882a593Smuzhiyun 	HCI_SC_ONLY,
306*4882a593Smuzhiyun 	HCI_PRIVACY,
307*4882a593Smuzhiyun 	HCI_LIMITED_PRIVACY,
308*4882a593Smuzhiyun 	HCI_RPA_EXPIRED,
309*4882a593Smuzhiyun 	HCI_RPA_RESOLVING,
310*4882a593Smuzhiyun 	HCI_HS_ENABLED,
311*4882a593Smuzhiyun 	HCI_LE_ENABLED,
312*4882a593Smuzhiyun 	HCI_ADVERTISING,
313*4882a593Smuzhiyun 	HCI_ADVERTISING_CONNECTABLE,
314*4882a593Smuzhiyun 	HCI_CONNECTABLE,
315*4882a593Smuzhiyun 	HCI_DISCOVERABLE,
316*4882a593Smuzhiyun 	HCI_LIMITED_DISCOVERABLE,
317*4882a593Smuzhiyun 	HCI_LINK_SECURITY,
318*4882a593Smuzhiyun 	HCI_PERIODIC_INQ,
319*4882a593Smuzhiyun 	HCI_FAST_CONNECTABLE,
320*4882a593Smuzhiyun 	HCI_BREDR_ENABLED,
321*4882a593Smuzhiyun 	HCI_LE_SCAN_INTERRUPTED,
322*4882a593Smuzhiyun 	HCI_WIDEBAND_SPEECH_ENABLED,
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	HCI_DUT_MODE,
325*4882a593Smuzhiyun 	HCI_VENDOR_DIAG,
326*4882a593Smuzhiyun 	HCI_FORCE_BREDR_SMP,
327*4882a593Smuzhiyun 	HCI_FORCE_STATIC_ADDR,
328*4882a593Smuzhiyun 	HCI_LL_RPA_RESOLUTION,
329*4882a593Smuzhiyun 	HCI_ENABLE_LL_PRIVACY,
330*4882a593Smuzhiyun 	HCI_CMD_PENDING,
331*4882a593Smuzhiyun 	HCI_FORCE_NO_MITM,
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	__HCI_NUM_FLAGS,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun /* HCI timeouts */
337*4882a593Smuzhiyun #define HCI_DISCONN_TIMEOUT	msecs_to_jiffies(2000)	/* 2 seconds */
338*4882a593Smuzhiyun #define HCI_PAIRING_TIMEOUT	msecs_to_jiffies(60000)	/* 60 seconds */
339*4882a593Smuzhiyun #define HCI_INIT_TIMEOUT	msecs_to_jiffies(10000)	/* 10 seconds */
340*4882a593Smuzhiyun #define HCI_CMD_TIMEOUT		msecs_to_jiffies(2000)	/* 2 seconds */
341*4882a593Smuzhiyun #define HCI_ACL_TX_TIMEOUT	msecs_to_jiffies(45000)	/* 45 seconds */
342*4882a593Smuzhiyun #define HCI_AUTO_OFF_TIMEOUT	msecs_to_jiffies(2000)	/* 2 seconds */
343*4882a593Smuzhiyun #define HCI_POWER_OFF_TIMEOUT	msecs_to_jiffies(5000)	/* 5 seconds */
344*4882a593Smuzhiyun #define HCI_LE_CONN_TIMEOUT	msecs_to_jiffies(20000)	/* 20 seconds */
345*4882a593Smuzhiyun #define HCI_LE_AUTOCONN_TIMEOUT	msecs_to_jiffies(4000)	/* 4 seconds */
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun /* HCI data types */
348*4882a593Smuzhiyun #define HCI_COMMAND_PKT		0x01
349*4882a593Smuzhiyun #define HCI_ACLDATA_PKT		0x02
350*4882a593Smuzhiyun #define HCI_SCODATA_PKT		0x03
351*4882a593Smuzhiyun #define HCI_EVENT_PKT		0x04
352*4882a593Smuzhiyun #define HCI_ISODATA_PKT		0x05
353*4882a593Smuzhiyun #define HCI_DIAG_PKT		0xf0
354*4882a593Smuzhiyun #define HCI_VENDOR_PKT		0xff
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun /* HCI packet types */
357*4882a593Smuzhiyun #define HCI_DM1		0x0008
358*4882a593Smuzhiyun #define HCI_DM3		0x0400
359*4882a593Smuzhiyun #define HCI_DM5		0x4000
360*4882a593Smuzhiyun #define HCI_DH1		0x0010
361*4882a593Smuzhiyun #define HCI_DH3		0x0800
362*4882a593Smuzhiyun #define HCI_DH5		0x8000
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun /* HCI packet types inverted masks */
365*4882a593Smuzhiyun #define HCI_2DH1	0x0002
366*4882a593Smuzhiyun #define HCI_3DH1	0x0004
367*4882a593Smuzhiyun #define HCI_2DH3	0x0100
368*4882a593Smuzhiyun #define HCI_3DH3	0x0200
369*4882a593Smuzhiyun #define HCI_2DH5	0x1000
370*4882a593Smuzhiyun #define HCI_3DH5	0x2000
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun #define HCI_HV1		0x0020
373*4882a593Smuzhiyun #define HCI_HV2		0x0040
374*4882a593Smuzhiyun #define HCI_HV3		0x0080
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun #define SCO_PTYPE_MASK	(HCI_HV1 | HCI_HV2 | HCI_HV3)
377*4882a593Smuzhiyun #define ACL_PTYPE_MASK	(~SCO_PTYPE_MASK)
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun /* eSCO packet types */
380*4882a593Smuzhiyun #define ESCO_HV1	0x0001
381*4882a593Smuzhiyun #define ESCO_HV2	0x0002
382*4882a593Smuzhiyun #define ESCO_HV3	0x0004
383*4882a593Smuzhiyun #define ESCO_EV3	0x0008
384*4882a593Smuzhiyun #define ESCO_EV4	0x0010
385*4882a593Smuzhiyun #define ESCO_EV5	0x0020
386*4882a593Smuzhiyun #define ESCO_2EV3	0x0040
387*4882a593Smuzhiyun #define ESCO_3EV3	0x0080
388*4882a593Smuzhiyun #define ESCO_2EV5	0x0100
389*4882a593Smuzhiyun #define ESCO_3EV5	0x0200
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun #define SCO_ESCO_MASK  (ESCO_HV1 | ESCO_HV2 | ESCO_HV3)
392*4882a593Smuzhiyun #define EDR_ESCO_MASK  (ESCO_2EV3 | ESCO_3EV3 | ESCO_2EV5 | ESCO_3EV5)
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun /* ACL flags */
395*4882a593Smuzhiyun #define ACL_START_NO_FLUSH	0x00
396*4882a593Smuzhiyun #define ACL_CONT		0x01
397*4882a593Smuzhiyun #define ACL_START		0x02
398*4882a593Smuzhiyun #define ACL_COMPLETE		0x03
399*4882a593Smuzhiyun #define ACL_ACTIVE_BCAST	0x04
400*4882a593Smuzhiyun #define ACL_PICO_BCAST		0x08
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun /* ISO PB flags */
403*4882a593Smuzhiyun #define ISO_START		0x00
404*4882a593Smuzhiyun #define ISO_CONT		0x01
405*4882a593Smuzhiyun #define ISO_SINGLE		0x02
406*4882a593Smuzhiyun #define ISO_END			0x03
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun /* ISO TS flags */
409*4882a593Smuzhiyun #define ISO_TS			0x01
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun /* Baseband links */
412*4882a593Smuzhiyun #define SCO_LINK	0x00
413*4882a593Smuzhiyun #define ACL_LINK	0x01
414*4882a593Smuzhiyun #define ESCO_LINK	0x02
415*4882a593Smuzhiyun /* Low Energy links do not have defined link type. Use invented one */
416*4882a593Smuzhiyun #define LE_LINK		0x80
417*4882a593Smuzhiyun #define AMP_LINK	0x81
418*4882a593Smuzhiyun #define ISO_LINK	0x82
419*4882a593Smuzhiyun #define INVALID_LINK	0xff
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun /* LMP features */
422*4882a593Smuzhiyun #define LMP_3SLOT	0x01
423*4882a593Smuzhiyun #define LMP_5SLOT	0x02
424*4882a593Smuzhiyun #define LMP_ENCRYPT	0x04
425*4882a593Smuzhiyun #define LMP_SOFFSET	0x08
426*4882a593Smuzhiyun #define LMP_TACCURACY	0x10
427*4882a593Smuzhiyun #define LMP_RSWITCH	0x20
428*4882a593Smuzhiyun #define LMP_HOLD	0x40
429*4882a593Smuzhiyun #define LMP_SNIFF	0x80
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun #define LMP_PARK	0x01
432*4882a593Smuzhiyun #define LMP_RSSI	0x02
433*4882a593Smuzhiyun #define LMP_QUALITY	0x04
434*4882a593Smuzhiyun #define LMP_SCO		0x08
435*4882a593Smuzhiyun #define LMP_HV2		0x10
436*4882a593Smuzhiyun #define LMP_HV3		0x20
437*4882a593Smuzhiyun #define LMP_ULAW	0x40
438*4882a593Smuzhiyun #define LMP_ALAW	0x80
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun #define LMP_CVSD	0x01
441*4882a593Smuzhiyun #define LMP_PSCHEME	0x02
442*4882a593Smuzhiyun #define LMP_PCONTROL	0x04
443*4882a593Smuzhiyun #define LMP_TRANSPARENT	0x08
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun #define LMP_EDR_2M		0x02
446*4882a593Smuzhiyun #define LMP_EDR_3M		0x04
447*4882a593Smuzhiyun #define LMP_RSSI_INQ	0x40
448*4882a593Smuzhiyun #define LMP_ESCO	0x80
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun #define LMP_EV4		0x01
451*4882a593Smuzhiyun #define LMP_EV5		0x02
452*4882a593Smuzhiyun #define LMP_NO_BREDR	0x20
453*4882a593Smuzhiyun #define LMP_LE		0x40
454*4882a593Smuzhiyun #define LMP_EDR_3SLOT	0x80
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun #define LMP_EDR_5SLOT	0x01
457*4882a593Smuzhiyun #define LMP_SNIFF_SUBR	0x02
458*4882a593Smuzhiyun #define LMP_PAUSE_ENC	0x04
459*4882a593Smuzhiyun #define LMP_EDR_ESCO_2M	0x20
460*4882a593Smuzhiyun #define LMP_EDR_ESCO_3M	0x40
461*4882a593Smuzhiyun #define LMP_EDR_3S_ESCO	0x80
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun #define LMP_EXT_INQ	0x01
464*4882a593Smuzhiyun #define LMP_SIMUL_LE_BR	0x02
465*4882a593Smuzhiyun #define LMP_SIMPLE_PAIR	0x08
466*4882a593Smuzhiyun #define LMP_NO_FLUSH	0x40
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun #define LMP_LSTO	0x01
469*4882a593Smuzhiyun #define LMP_INQ_TX_PWR	0x02
470*4882a593Smuzhiyun #define LMP_EXTFEATURES	0x80
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun /* Extended LMP features */
473*4882a593Smuzhiyun #define LMP_CSB_MASTER	0x01
474*4882a593Smuzhiyun #define LMP_CSB_SLAVE	0x02
475*4882a593Smuzhiyun #define LMP_SYNC_TRAIN	0x04
476*4882a593Smuzhiyun #define LMP_SYNC_SCAN	0x08
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun #define LMP_SC		0x01
479*4882a593Smuzhiyun #define LMP_PING	0x02
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun /* Host features */
482*4882a593Smuzhiyun #define LMP_HOST_SSP		0x01
483*4882a593Smuzhiyun #define LMP_HOST_LE		0x02
484*4882a593Smuzhiyun #define LMP_HOST_LE_BREDR	0x04
485*4882a593Smuzhiyun #define LMP_HOST_SC		0x08
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun /* LE features */
488*4882a593Smuzhiyun #define HCI_LE_ENCRYPTION		0x01
489*4882a593Smuzhiyun #define HCI_LE_CONN_PARAM_REQ_PROC	0x02
490*4882a593Smuzhiyun #define HCI_LE_SLAVE_FEATURES		0x08
491*4882a593Smuzhiyun #define HCI_LE_PING			0x10
492*4882a593Smuzhiyun #define HCI_LE_DATA_LEN_EXT		0x20
493*4882a593Smuzhiyun #define HCI_LE_LL_PRIVACY		0x40
494*4882a593Smuzhiyun #define HCI_LE_EXT_SCAN_POLICY		0x80
495*4882a593Smuzhiyun #define HCI_LE_PHY_2M			0x01
496*4882a593Smuzhiyun #define HCI_LE_PHY_CODED		0x08
497*4882a593Smuzhiyun #define HCI_LE_EXT_ADV			0x10
498*4882a593Smuzhiyun #define HCI_LE_CHAN_SEL_ALG2		0x40
499*4882a593Smuzhiyun #define HCI_LE_CIS_MASTER		0x10
500*4882a593Smuzhiyun #define HCI_LE_CIS_SLAVE		0x20
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun /* Connection modes */
503*4882a593Smuzhiyun #define HCI_CM_ACTIVE	0x0000
504*4882a593Smuzhiyun #define HCI_CM_HOLD	0x0001
505*4882a593Smuzhiyun #define HCI_CM_SNIFF	0x0002
506*4882a593Smuzhiyun #define HCI_CM_PARK	0x0003
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun /* Link policies */
509*4882a593Smuzhiyun #define HCI_LP_RSWITCH	0x0001
510*4882a593Smuzhiyun #define HCI_LP_HOLD	0x0002
511*4882a593Smuzhiyun #define HCI_LP_SNIFF	0x0004
512*4882a593Smuzhiyun #define HCI_LP_PARK	0x0008
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun /* Link modes */
515*4882a593Smuzhiyun #define HCI_LM_ACCEPT	0x8000
516*4882a593Smuzhiyun #define HCI_LM_MASTER	0x0001
517*4882a593Smuzhiyun #define HCI_LM_AUTH	0x0002
518*4882a593Smuzhiyun #define HCI_LM_ENCRYPT	0x0004
519*4882a593Smuzhiyun #define HCI_LM_TRUSTED	0x0008
520*4882a593Smuzhiyun #define HCI_LM_RELIABLE	0x0010
521*4882a593Smuzhiyun #define HCI_LM_SECURE	0x0020
522*4882a593Smuzhiyun #define HCI_LM_FIPS	0x0040
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun /* Authentication types */
525*4882a593Smuzhiyun #define HCI_AT_NO_BONDING		0x00
526*4882a593Smuzhiyun #define HCI_AT_NO_BONDING_MITM		0x01
527*4882a593Smuzhiyun #define HCI_AT_DEDICATED_BONDING	0x02
528*4882a593Smuzhiyun #define HCI_AT_DEDICATED_BONDING_MITM	0x03
529*4882a593Smuzhiyun #define HCI_AT_GENERAL_BONDING		0x04
530*4882a593Smuzhiyun #define HCI_AT_GENERAL_BONDING_MITM	0x05
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun /* I/O capabilities */
533*4882a593Smuzhiyun #define HCI_IO_DISPLAY_ONLY	0x00
534*4882a593Smuzhiyun #define HCI_IO_DISPLAY_YESNO	0x01
535*4882a593Smuzhiyun #define HCI_IO_KEYBOARD_ONLY	0x02
536*4882a593Smuzhiyun #define HCI_IO_NO_INPUT_OUTPUT	0x03
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun /* Link Key types */
539*4882a593Smuzhiyun #define HCI_LK_COMBINATION		0x00
540*4882a593Smuzhiyun #define HCI_LK_LOCAL_UNIT		0x01
541*4882a593Smuzhiyun #define HCI_LK_REMOTE_UNIT		0x02
542*4882a593Smuzhiyun #define HCI_LK_DEBUG_COMBINATION	0x03
543*4882a593Smuzhiyun #define HCI_LK_UNAUTH_COMBINATION_P192	0x04
544*4882a593Smuzhiyun #define HCI_LK_AUTH_COMBINATION_P192	0x05
545*4882a593Smuzhiyun #define HCI_LK_CHANGED_COMBINATION	0x06
546*4882a593Smuzhiyun #define HCI_LK_UNAUTH_COMBINATION_P256	0x07
547*4882a593Smuzhiyun #define HCI_LK_AUTH_COMBINATION_P256	0x08
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun /* ---- HCI Error Codes ---- */
550*4882a593Smuzhiyun #define HCI_ERROR_UNKNOWN_CONN_ID	0x02
551*4882a593Smuzhiyun #define HCI_ERROR_AUTH_FAILURE		0x05
552*4882a593Smuzhiyun #define HCI_ERROR_PIN_OR_KEY_MISSING	0x06
553*4882a593Smuzhiyun #define HCI_ERROR_MEMORY_EXCEEDED	0x07
554*4882a593Smuzhiyun #define HCI_ERROR_CONNECTION_TIMEOUT	0x08
555*4882a593Smuzhiyun #define HCI_ERROR_REJ_LIMITED_RESOURCES	0x0d
556*4882a593Smuzhiyun #define HCI_ERROR_REJ_BAD_ADDR		0x0f
557*4882a593Smuzhiyun #define HCI_ERROR_REMOTE_USER_TERM	0x13
558*4882a593Smuzhiyun #define HCI_ERROR_REMOTE_LOW_RESOURCES	0x14
559*4882a593Smuzhiyun #define HCI_ERROR_REMOTE_POWER_OFF	0x15
560*4882a593Smuzhiyun #define HCI_ERROR_LOCAL_HOST_TERM	0x16
561*4882a593Smuzhiyun #define HCI_ERROR_PAIRING_NOT_ALLOWED	0x18
562*4882a593Smuzhiyun #define HCI_ERROR_INVALID_LL_PARAMS	0x1e
563*4882a593Smuzhiyun #define HCI_ERROR_UNSPECIFIED		0x1f
564*4882a593Smuzhiyun #define HCI_ERROR_ADVERTISING_TIMEOUT	0x3c
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun /* Flow control modes */
567*4882a593Smuzhiyun #define HCI_FLOW_CTL_MODE_PACKET_BASED	0x00
568*4882a593Smuzhiyun #define HCI_FLOW_CTL_MODE_BLOCK_BASED	0x01
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun /* The core spec defines 127 as the "not available" value */
571*4882a593Smuzhiyun #define HCI_TX_POWER_INVALID	127
572*4882a593Smuzhiyun #define HCI_RSSI_INVALID	127
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun #define HCI_ROLE_MASTER		0x00
575*4882a593Smuzhiyun #define HCI_ROLE_SLAVE		0x01
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun /* Extended Inquiry Response field types */
578*4882a593Smuzhiyun #define EIR_FLAGS		0x01 /* flags */
579*4882a593Smuzhiyun #define EIR_UUID16_SOME		0x02 /* 16-bit UUID, more available */
580*4882a593Smuzhiyun #define EIR_UUID16_ALL		0x03 /* 16-bit UUID, all listed */
581*4882a593Smuzhiyun #define EIR_UUID32_SOME		0x04 /* 32-bit UUID, more available */
582*4882a593Smuzhiyun #define EIR_UUID32_ALL		0x05 /* 32-bit UUID, all listed */
583*4882a593Smuzhiyun #define EIR_UUID128_SOME	0x06 /* 128-bit UUID, more available */
584*4882a593Smuzhiyun #define EIR_UUID128_ALL		0x07 /* 128-bit UUID, all listed */
585*4882a593Smuzhiyun #define EIR_NAME_SHORT		0x08 /* shortened local name */
586*4882a593Smuzhiyun #define EIR_NAME_COMPLETE	0x09 /* complete local name */
587*4882a593Smuzhiyun #define EIR_TX_POWER		0x0A /* transmit power level */
588*4882a593Smuzhiyun #define EIR_CLASS_OF_DEV	0x0D /* Class of Device */
589*4882a593Smuzhiyun #define EIR_SSP_HASH_C192	0x0E /* Simple Pairing Hash C-192 */
590*4882a593Smuzhiyun #define EIR_SSP_RAND_R192	0x0F /* Simple Pairing Randomizer R-192 */
591*4882a593Smuzhiyun #define EIR_DEVICE_ID		0x10 /* device ID */
592*4882a593Smuzhiyun #define EIR_APPEARANCE		0x19 /* Device appearance */
593*4882a593Smuzhiyun #define EIR_LE_BDADDR		0x1B /* LE Bluetooth device address */
594*4882a593Smuzhiyun #define EIR_LE_ROLE		0x1C /* LE role */
595*4882a593Smuzhiyun #define EIR_SSP_HASH_C256	0x1D /* Simple Pairing Hash C-256 */
596*4882a593Smuzhiyun #define EIR_SSP_RAND_R256	0x1E /* Simple Pairing Rand R-256 */
597*4882a593Smuzhiyun #define EIR_LE_SC_CONFIRM	0x22 /* LE SC Confirmation Value */
598*4882a593Smuzhiyun #define EIR_LE_SC_RANDOM	0x23 /* LE SC Random Value */
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun /* Low Energy Advertising Flags */
601*4882a593Smuzhiyun #define LE_AD_LIMITED		0x01 /* Limited Discoverable */
602*4882a593Smuzhiyun #define LE_AD_GENERAL		0x02 /* General Discoverable */
603*4882a593Smuzhiyun #define LE_AD_NO_BREDR		0x04 /* BR/EDR not supported */
604*4882a593Smuzhiyun #define LE_AD_SIM_LE_BREDR_CTRL	0x08 /* Simultaneous LE & BR/EDR Controller */
605*4882a593Smuzhiyun #define LE_AD_SIM_LE_BREDR_HOST	0x10 /* Simultaneous LE & BR/EDR Host */
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun /* -----  HCI Commands ---- */
608*4882a593Smuzhiyun #define HCI_OP_NOP			0x0000
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun #define HCI_OP_INQUIRY			0x0401
611*4882a593Smuzhiyun struct hci_cp_inquiry {
612*4882a593Smuzhiyun 	__u8     lap[3];
613*4882a593Smuzhiyun 	__u8     length;
614*4882a593Smuzhiyun 	__u8     num_rsp;
615*4882a593Smuzhiyun } __packed;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun #define HCI_OP_INQUIRY_CANCEL		0x0402
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun #define HCI_OP_PERIODIC_INQ		0x0403
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun #define HCI_OP_EXIT_PERIODIC_INQ	0x0404
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun #define HCI_OP_CREATE_CONN		0x0405
624*4882a593Smuzhiyun struct hci_cp_create_conn {
625*4882a593Smuzhiyun 	bdaddr_t bdaddr;
626*4882a593Smuzhiyun 	__le16   pkt_type;
627*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
628*4882a593Smuzhiyun 	__u8     pscan_mode;
629*4882a593Smuzhiyun 	__le16   clock_offset;
630*4882a593Smuzhiyun 	__u8     role_switch;
631*4882a593Smuzhiyun } __packed;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun #define HCI_OP_DISCONNECT		0x0406
634*4882a593Smuzhiyun struct hci_cp_disconnect {
635*4882a593Smuzhiyun 	__le16   handle;
636*4882a593Smuzhiyun 	__u8     reason;
637*4882a593Smuzhiyun } __packed;
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun #define HCI_OP_ADD_SCO			0x0407
640*4882a593Smuzhiyun struct hci_cp_add_sco {
641*4882a593Smuzhiyun 	__le16   handle;
642*4882a593Smuzhiyun 	__le16   pkt_type;
643*4882a593Smuzhiyun } __packed;
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun #define HCI_OP_CREATE_CONN_CANCEL	0x0408
646*4882a593Smuzhiyun struct hci_cp_create_conn_cancel {
647*4882a593Smuzhiyun 	bdaddr_t bdaddr;
648*4882a593Smuzhiyun } __packed;
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun #define HCI_OP_ACCEPT_CONN_REQ		0x0409
651*4882a593Smuzhiyun struct hci_cp_accept_conn_req {
652*4882a593Smuzhiyun 	bdaddr_t bdaddr;
653*4882a593Smuzhiyun 	__u8     role;
654*4882a593Smuzhiyun } __packed;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun #define HCI_OP_REJECT_CONN_REQ		0x040a
657*4882a593Smuzhiyun struct hci_cp_reject_conn_req {
658*4882a593Smuzhiyun 	bdaddr_t bdaddr;
659*4882a593Smuzhiyun 	__u8     reason;
660*4882a593Smuzhiyun } __packed;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun #define HCI_OP_LINK_KEY_REPLY		0x040b
663*4882a593Smuzhiyun struct hci_cp_link_key_reply {
664*4882a593Smuzhiyun 	bdaddr_t bdaddr;
665*4882a593Smuzhiyun 	__u8     link_key[HCI_LINK_KEY_SIZE];
666*4882a593Smuzhiyun } __packed;
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun #define HCI_OP_LINK_KEY_NEG_REPLY	0x040c
669*4882a593Smuzhiyun struct hci_cp_link_key_neg_reply {
670*4882a593Smuzhiyun 	bdaddr_t bdaddr;
671*4882a593Smuzhiyun } __packed;
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun #define HCI_OP_PIN_CODE_REPLY		0x040d
674*4882a593Smuzhiyun struct hci_cp_pin_code_reply {
675*4882a593Smuzhiyun 	bdaddr_t bdaddr;
676*4882a593Smuzhiyun 	__u8     pin_len;
677*4882a593Smuzhiyun 	__u8     pin_code[16];
678*4882a593Smuzhiyun } __packed;
679*4882a593Smuzhiyun struct hci_rp_pin_code_reply {
680*4882a593Smuzhiyun 	__u8     status;
681*4882a593Smuzhiyun 	bdaddr_t bdaddr;
682*4882a593Smuzhiyun } __packed;
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun #define HCI_OP_PIN_CODE_NEG_REPLY	0x040e
685*4882a593Smuzhiyun struct hci_cp_pin_code_neg_reply {
686*4882a593Smuzhiyun 	bdaddr_t bdaddr;
687*4882a593Smuzhiyun } __packed;
688*4882a593Smuzhiyun struct hci_rp_pin_code_neg_reply {
689*4882a593Smuzhiyun 	__u8     status;
690*4882a593Smuzhiyun 	bdaddr_t bdaddr;
691*4882a593Smuzhiyun } __packed;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun #define HCI_OP_CHANGE_CONN_PTYPE	0x040f
694*4882a593Smuzhiyun struct hci_cp_change_conn_ptype {
695*4882a593Smuzhiyun 	__le16   handle;
696*4882a593Smuzhiyun 	__le16   pkt_type;
697*4882a593Smuzhiyun } __packed;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun #define HCI_OP_AUTH_REQUESTED		0x0411
700*4882a593Smuzhiyun struct hci_cp_auth_requested {
701*4882a593Smuzhiyun 	__le16   handle;
702*4882a593Smuzhiyun } __packed;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun #define HCI_OP_SET_CONN_ENCRYPT		0x0413
705*4882a593Smuzhiyun struct hci_cp_set_conn_encrypt {
706*4882a593Smuzhiyun 	__le16   handle;
707*4882a593Smuzhiyun 	__u8     encrypt;
708*4882a593Smuzhiyun } __packed;
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun #define HCI_OP_CHANGE_CONN_LINK_KEY	0x0415
711*4882a593Smuzhiyun struct hci_cp_change_conn_link_key {
712*4882a593Smuzhiyun 	__le16   handle;
713*4882a593Smuzhiyun } __packed;
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun #define HCI_OP_REMOTE_NAME_REQ		0x0419
716*4882a593Smuzhiyun struct hci_cp_remote_name_req {
717*4882a593Smuzhiyun 	bdaddr_t bdaddr;
718*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
719*4882a593Smuzhiyun 	__u8     pscan_mode;
720*4882a593Smuzhiyun 	__le16   clock_offset;
721*4882a593Smuzhiyun } __packed;
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun #define HCI_OP_REMOTE_NAME_REQ_CANCEL	0x041a
724*4882a593Smuzhiyun struct hci_cp_remote_name_req_cancel {
725*4882a593Smuzhiyun 	bdaddr_t bdaddr;
726*4882a593Smuzhiyun } __packed;
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun #define HCI_OP_READ_REMOTE_FEATURES	0x041b
729*4882a593Smuzhiyun struct hci_cp_read_remote_features {
730*4882a593Smuzhiyun 	__le16   handle;
731*4882a593Smuzhiyun } __packed;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun #define HCI_OP_READ_REMOTE_EXT_FEATURES	0x041c
734*4882a593Smuzhiyun struct hci_cp_read_remote_ext_features {
735*4882a593Smuzhiyun 	__le16   handle;
736*4882a593Smuzhiyun 	__u8     page;
737*4882a593Smuzhiyun } __packed;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun #define HCI_OP_READ_REMOTE_VERSION	0x041d
740*4882a593Smuzhiyun struct hci_cp_read_remote_version {
741*4882a593Smuzhiyun 	__le16   handle;
742*4882a593Smuzhiyun } __packed;
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun #define HCI_OP_READ_CLOCK_OFFSET	0x041f
745*4882a593Smuzhiyun struct hci_cp_read_clock_offset {
746*4882a593Smuzhiyun 	__le16   handle;
747*4882a593Smuzhiyun } __packed;
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun #define HCI_OP_SETUP_SYNC_CONN		0x0428
750*4882a593Smuzhiyun struct hci_cp_setup_sync_conn {
751*4882a593Smuzhiyun 	__le16   handle;
752*4882a593Smuzhiyun 	__le32   tx_bandwidth;
753*4882a593Smuzhiyun 	__le32   rx_bandwidth;
754*4882a593Smuzhiyun 	__le16   max_latency;
755*4882a593Smuzhiyun 	__le16   voice_setting;
756*4882a593Smuzhiyun 	__u8     retrans_effort;
757*4882a593Smuzhiyun 	__le16   pkt_type;
758*4882a593Smuzhiyun } __packed;
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun #define HCI_OP_ACCEPT_SYNC_CONN_REQ	0x0429
761*4882a593Smuzhiyun struct hci_cp_accept_sync_conn_req {
762*4882a593Smuzhiyun 	bdaddr_t bdaddr;
763*4882a593Smuzhiyun 	__le32   tx_bandwidth;
764*4882a593Smuzhiyun 	__le32   rx_bandwidth;
765*4882a593Smuzhiyun 	__le16   max_latency;
766*4882a593Smuzhiyun 	__le16   content_format;
767*4882a593Smuzhiyun 	__u8     retrans_effort;
768*4882a593Smuzhiyun 	__le16   pkt_type;
769*4882a593Smuzhiyun } __packed;
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun #define HCI_OP_REJECT_SYNC_CONN_REQ	0x042a
772*4882a593Smuzhiyun struct hci_cp_reject_sync_conn_req {
773*4882a593Smuzhiyun 	bdaddr_t bdaddr;
774*4882a593Smuzhiyun 	__u8     reason;
775*4882a593Smuzhiyun } __packed;
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun #define HCI_OP_IO_CAPABILITY_REPLY	0x042b
778*4882a593Smuzhiyun struct hci_cp_io_capability_reply {
779*4882a593Smuzhiyun 	bdaddr_t bdaddr;
780*4882a593Smuzhiyun 	__u8     capability;
781*4882a593Smuzhiyun 	__u8     oob_data;
782*4882a593Smuzhiyun 	__u8     authentication;
783*4882a593Smuzhiyun } __packed;
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun #define HCI_OP_USER_CONFIRM_REPLY		0x042c
786*4882a593Smuzhiyun struct hci_cp_user_confirm_reply {
787*4882a593Smuzhiyun 	bdaddr_t bdaddr;
788*4882a593Smuzhiyun } __packed;
789*4882a593Smuzhiyun struct hci_rp_user_confirm_reply {
790*4882a593Smuzhiyun 	__u8     status;
791*4882a593Smuzhiyun 	bdaddr_t bdaddr;
792*4882a593Smuzhiyun } __packed;
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun #define HCI_OP_USER_CONFIRM_NEG_REPLY	0x042d
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun #define HCI_OP_USER_PASSKEY_REPLY		0x042e
797*4882a593Smuzhiyun struct hci_cp_user_passkey_reply {
798*4882a593Smuzhiyun 	bdaddr_t bdaddr;
799*4882a593Smuzhiyun 	__le32	passkey;
800*4882a593Smuzhiyun } __packed;
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun #define HCI_OP_USER_PASSKEY_NEG_REPLY	0x042f
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun #define HCI_OP_REMOTE_OOB_DATA_REPLY	0x0430
805*4882a593Smuzhiyun struct hci_cp_remote_oob_data_reply {
806*4882a593Smuzhiyun 	bdaddr_t bdaddr;
807*4882a593Smuzhiyun 	__u8     hash[16];
808*4882a593Smuzhiyun 	__u8     rand[16];
809*4882a593Smuzhiyun } __packed;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun #define HCI_OP_REMOTE_OOB_DATA_NEG_REPLY	0x0433
812*4882a593Smuzhiyun struct hci_cp_remote_oob_data_neg_reply {
813*4882a593Smuzhiyun 	bdaddr_t bdaddr;
814*4882a593Smuzhiyun } __packed;
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun #define HCI_OP_IO_CAPABILITY_NEG_REPLY	0x0434
817*4882a593Smuzhiyun struct hci_cp_io_capability_neg_reply {
818*4882a593Smuzhiyun 	bdaddr_t bdaddr;
819*4882a593Smuzhiyun 	__u8     reason;
820*4882a593Smuzhiyun } __packed;
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun #define HCI_OP_CREATE_PHY_LINK		0x0435
823*4882a593Smuzhiyun struct hci_cp_create_phy_link {
824*4882a593Smuzhiyun 	__u8     phy_handle;
825*4882a593Smuzhiyun 	__u8     key_len;
826*4882a593Smuzhiyun 	__u8     key_type;
827*4882a593Smuzhiyun 	__u8     key[HCI_AMP_LINK_KEY_SIZE];
828*4882a593Smuzhiyun } __packed;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun #define HCI_OP_ACCEPT_PHY_LINK		0x0436
831*4882a593Smuzhiyun struct hci_cp_accept_phy_link {
832*4882a593Smuzhiyun 	__u8     phy_handle;
833*4882a593Smuzhiyun 	__u8     key_len;
834*4882a593Smuzhiyun 	__u8     key_type;
835*4882a593Smuzhiyun 	__u8     key[HCI_AMP_LINK_KEY_SIZE];
836*4882a593Smuzhiyun } __packed;
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun #define HCI_OP_DISCONN_PHY_LINK		0x0437
839*4882a593Smuzhiyun struct hci_cp_disconn_phy_link {
840*4882a593Smuzhiyun 	__u8     phy_handle;
841*4882a593Smuzhiyun 	__u8     reason;
842*4882a593Smuzhiyun } __packed;
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun struct ext_flow_spec {
845*4882a593Smuzhiyun 	__u8       id;
846*4882a593Smuzhiyun 	__u8       stype;
847*4882a593Smuzhiyun 	__le16     msdu;
848*4882a593Smuzhiyun 	__le32     sdu_itime;
849*4882a593Smuzhiyun 	__le32     acc_lat;
850*4882a593Smuzhiyun 	__le32     flush_to;
851*4882a593Smuzhiyun } __packed;
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun #define HCI_OP_CREATE_LOGICAL_LINK	0x0438
854*4882a593Smuzhiyun #define HCI_OP_ACCEPT_LOGICAL_LINK	0x0439
855*4882a593Smuzhiyun struct hci_cp_create_accept_logical_link {
856*4882a593Smuzhiyun 	__u8                  phy_handle;
857*4882a593Smuzhiyun 	struct ext_flow_spec  tx_flow_spec;
858*4882a593Smuzhiyun 	struct ext_flow_spec  rx_flow_spec;
859*4882a593Smuzhiyun } __packed;
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun #define HCI_OP_DISCONN_LOGICAL_LINK	0x043a
862*4882a593Smuzhiyun struct hci_cp_disconn_logical_link {
863*4882a593Smuzhiyun 	__le16   log_handle;
864*4882a593Smuzhiyun } __packed;
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun #define HCI_OP_LOGICAL_LINK_CANCEL	0x043b
867*4882a593Smuzhiyun struct hci_cp_logical_link_cancel {
868*4882a593Smuzhiyun 	__u8     phy_handle;
869*4882a593Smuzhiyun 	__u8     flow_spec_id;
870*4882a593Smuzhiyun } __packed;
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun struct hci_rp_logical_link_cancel {
873*4882a593Smuzhiyun 	__u8     status;
874*4882a593Smuzhiyun 	__u8     phy_handle;
875*4882a593Smuzhiyun 	__u8     flow_spec_id;
876*4882a593Smuzhiyun } __packed;
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun #define HCI_OP_SET_CSB			0x0441
879*4882a593Smuzhiyun struct hci_cp_set_csb {
880*4882a593Smuzhiyun 	__u8	enable;
881*4882a593Smuzhiyun 	__u8	lt_addr;
882*4882a593Smuzhiyun 	__u8	lpo_allowed;
883*4882a593Smuzhiyun 	__le16	packet_type;
884*4882a593Smuzhiyun 	__le16	interval_min;
885*4882a593Smuzhiyun 	__le16	interval_max;
886*4882a593Smuzhiyun 	__le16	csb_sv_tout;
887*4882a593Smuzhiyun } __packed;
888*4882a593Smuzhiyun struct hci_rp_set_csb {
889*4882a593Smuzhiyun 	__u8	status;
890*4882a593Smuzhiyun 	__u8	lt_addr;
891*4882a593Smuzhiyun 	__le16	interval;
892*4882a593Smuzhiyun } __packed;
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun #define HCI_OP_START_SYNC_TRAIN		0x0443
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun #define HCI_OP_REMOTE_OOB_EXT_DATA_REPLY	0x0445
897*4882a593Smuzhiyun struct hci_cp_remote_oob_ext_data_reply {
898*4882a593Smuzhiyun 	bdaddr_t bdaddr;
899*4882a593Smuzhiyun 	__u8     hash192[16];
900*4882a593Smuzhiyun 	__u8     rand192[16];
901*4882a593Smuzhiyun 	__u8     hash256[16];
902*4882a593Smuzhiyun 	__u8     rand256[16];
903*4882a593Smuzhiyun } __packed;
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun #define HCI_OP_SNIFF_MODE		0x0803
906*4882a593Smuzhiyun struct hci_cp_sniff_mode {
907*4882a593Smuzhiyun 	__le16   handle;
908*4882a593Smuzhiyun 	__le16   max_interval;
909*4882a593Smuzhiyun 	__le16   min_interval;
910*4882a593Smuzhiyun 	__le16   attempt;
911*4882a593Smuzhiyun 	__le16   timeout;
912*4882a593Smuzhiyun } __packed;
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun #define HCI_OP_EXIT_SNIFF_MODE		0x0804
915*4882a593Smuzhiyun struct hci_cp_exit_sniff_mode {
916*4882a593Smuzhiyun 	__le16   handle;
917*4882a593Smuzhiyun } __packed;
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun #define HCI_OP_ROLE_DISCOVERY		0x0809
920*4882a593Smuzhiyun struct hci_cp_role_discovery {
921*4882a593Smuzhiyun 	__le16   handle;
922*4882a593Smuzhiyun } __packed;
923*4882a593Smuzhiyun struct hci_rp_role_discovery {
924*4882a593Smuzhiyun 	__u8     status;
925*4882a593Smuzhiyun 	__le16   handle;
926*4882a593Smuzhiyun 	__u8     role;
927*4882a593Smuzhiyun } __packed;
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun #define HCI_OP_SWITCH_ROLE		0x080b
930*4882a593Smuzhiyun struct hci_cp_switch_role {
931*4882a593Smuzhiyun 	bdaddr_t bdaddr;
932*4882a593Smuzhiyun 	__u8     role;
933*4882a593Smuzhiyun } __packed;
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun #define HCI_OP_READ_LINK_POLICY		0x080c
936*4882a593Smuzhiyun struct hci_cp_read_link_policy {
937*4882a593Smuzhiyun 	__le16   handle;
938*4882a593Smuzhiyun } __packed;
939*4882a593Smuzhiyun struct hci_rp_read_link_policy {
940*4882a593Smuzhiyun 	__u8     status;
941*4882a593Smuzhiyun 	__le16   handle;
942*4882a593Smuzhiyun 	__le16   policy;
943*4882a593Smuzhiyun } __packed;
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun #define HCI_OP_WRITE_LINK_POLICY	0x080d
946*4882a593Smuzhiyun struct hci_cp_write_link_policy {
947*4882a593Smuzhiyun 	__le16   handle;
948*4882a593Smuzhiyun 	__le16   policy;
949*4882a593Smuzhiyun } __packed;
950*4882a593Smuzhiyun struct hci_rp_write_link_policy {
951*4882a593Smuzhiyun 	__u8     status;
952*4882a593Smuzhiyun 	__le16   handle;
953*4882a593Smuzhiyun } __packed;
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun #define HCI_OP_READ_DEF_LINK_POLICY	0x080e
956*4882a593Smuzhiyun struct hci_rp_read_def_link_policy {
957*4882a593Smuzhiyun 	__u8     status;
958*4882a593Smuzhiyun 	__le16   policy;
959*4882a593Smuzhiyun } __packed;
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun #define HCI_OP_WRITE_DEF_LINK_POLICY	0x080f
962*4882a593Smuzhiyun struct hci_cp_write_def_link_policy {
963*4882a593Smuzhiyun 	__le16   policy;
964*4882a593Smuzhiyun } __packed;
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun #define HCI_OP_SNIFF_SUBRATE		0x0811
967*4882a593Smuzhiyun struct hci_cp_sniff_subrate {
968*4882a593Smuzhiyun 	__le16   handle;
969*4882a593Smuzhiyun 	__le16   max_latency;
970*4882a593Smuzhiyun 	__le16   min_remote_timeout;
971*4882a593Smuzhiyun 	__le16   min_local_timeout;
972*4882a593Smuzhiyun } __packed;
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun #define HCI_OP_SET_EVENT_MASK		0x0c01
975*4882a593Smuzhiyun 
976*4882a593Smuzhiyun #define HCI_OP_RESET			0x0c03
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun #define HCI_OP_SET_EVENT_FLT		0x0c05
979*4882a593Smuzhiyun #define HCI_SET_EVENT_FLT_SIZE		9
980*4882a593Smuzhiyun struct hci_cp_set_event_filter {
981*4882a593Smuzhiyun 	__u8		flt_type;
982*4882a593Smuzhiyun 	__u8		cond_type;
983*4882a593Smuzhiyun 	struct {
984*4882a593Smuzhiyun 		bdaddr_t bdaddr;
985*4882a593Smuzhiyun 		__u8 auto_accept;
986*4882a593Smuzhiyun 	} __packed	addr_conn_flt;
987*4882a593Smuzhiyun } __packed;
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun /* Filter types */
990*4882a593Smuzhiyun #define HCI_FLT_CLEAR_ALL	0x00
991*4882a593Smuzhiyun #define HCI_FLT_INQ_RESULT	0x01
992*4882a593Smuzhiyun #define HCI_FLT_CONN_SETUP	0x02
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun /* CONN_SETUP Condition types */
995*4882a593Smuzhiyun #define HCI_CONN_SETUP_ALLOW_ALL	0x00
996*4882a593Smuzhiyun #define HCI_CONN_SETUP_ALLOW_CLASS	0x01
997*4882a593Smuzhiyun #define HCI_CONN_SETUP_ALLOW_BDADDR	0x02
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun /* CONN_SETUP Conditions */
1000*4882a593Smuzhiyun #define HCI_CONN_SETUP_AUTO_OFF		0x01
1001*4882a593Smuzhiyun #define HCI_CONN_SETUP_AUTO_ON		0x02
1002*4882a593Smuzhiyun #define HCI_CONN_SETUP_AUTO_ON_WITH_RS	0x03
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun #define HCI_OP_READ_STORED_LINK_KEY	0x0c0d
1005*4882a593Smuzhiyun struct hci_cp_read_stored_link_key {
1006*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1007*4882a593Smuzhiyun 	__u8     read_all;
1008*4882a593Smuzhiyun } __packed;
1009*4882a593Smuzhiyun struct hci_rp_read_stored_link_key {
1010*4882a593Smuzhiyun 	__u8     status;
1011*4882a593Smuzhiyun 	__u8     max_keys;
1012*4882a593Smuzhiyun 	__u8     num_keys;
1013*4882a593Smuzhiyun } __packed;
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun #define HCI_OP_DELETE_STORED_LINK_KEY	0x0c12
1016*4882a593Smuzhiyun struct hci_cp_delete_stored_link_key {
1017*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1018*4882a593Smuzhiyun 	__u8     delete_all;
1019*4882a593Smuzhiyun } __packed;
1020*4882a593Smuzhiyun struct hci_rp_delete_stored_link_key {
1021*4882a593Smuzhiyun 	__u8     status;
1022*4882a593Smuzhiyun 	__u8     num_keys;
1023*4882a593Smuzhiyun } __packed;
1024*4882a593Smuzhiyun 
1025*4882a593Smuzhiyun #define HCI_MAX_NAME_LENGTH		248
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun #define HCI_OP_WRITE_LOCAL_NAME		0x0c13
1028*4882a593Smuzhiyun struct hci_cp_write_local_name {
1029*4882a593Smuzhiyun 	__u8     name[HCI_MAX_NAME_LENGTH];
1030*4882a593Smuzhiyun } __packed;
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_NAME		0x0c14
1033*4882a593Smuzhiyun struct hci_rp_read_local_name {
1034*4882a593Smuzhiyun 	__u8     status;
1035*4882a593Smuzhiyun 	__u8     name[HCI_MAX_NAME_LENGTH];
1036*4882a593Smuzhiyun } __packed;
1037*4882a593Smuzhiyun 
1038*4882a593Smuzhiyun #define HCI_OP_WRITE_CA_TIMEOUT		0x0c16
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun #define HCI_OP_WRITE_PG_TIMEOUT		0x0c18
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun #define HCI_OP_WRITE_SCAN_ENABLE	0x0c1a
1043*4882a593Smuzhiyun 	#define SCAN_DISABLED		0x00
1044*4882a593Smuzhiyun 	#define SCAN_INQUIRY		0x01
1045*4882a593Smuzhiyun 	#define SCAN_PAGE		0x02
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun #define HCI_OP_READ_AUTH_ENABLE		0x0c1f
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun #define HCI_OP_WRITE_AUTH_ENABLE	0x0c20
1050*4882a593Smuzhiyun 	#define AUTH_DISABLED		0x00
1051*4882a593Smuzhiyun 	#define AUTH_ENABLED		0x01
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun #define HCI_OP_READ_ENCRYPT_MODE	0x0c21
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun #define HCI_OP_WRITE_ENCRYPT_MODE	0x0c22
1056*4882a593Smuzhiyun 	#define ENCRYPT_DISABLED	0x00
1057*4882a593Smuzhiyun 	#define ENCRYPT_P2P		0x01
1058*4882a593Smuzhiyun 	#define ENCRYPT_BOTH		0x02
1059*4882a593Smuzhiyun 
1060*4882a593Smuzhiyun #define HCI_OP_READ_CLASS_OF_DEV	0x0c23
1061*4882a593Smuzhiyun struct hci_rp_read_class_of_dev {
1062*4882a593Smuzhiyun 	__u8     status;
1063*4882a593Smuzhiyun 	__u8     dev_class[3];
1064*4882a593Smuzhiyun } __packed;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun #define HCI_OP_WRITE_CLASS_OF_DEV	0x0c24
1067*4882a593Smuzhiyun struct hci_cp_write_class_of_dev {
1068*4882a593Smuzhiyun 	__u8     dev_class[3];
1069*4882a593Smuzhiyun } __packed;
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun #define HCI_OP_READ_VOICE_SETTING	0x0c25
1072*4882a593Smuzhiyun struct hci_rp_read_voice_setting {
1073*4882a593Smuzhiyun 	__u8     status;
1074*4882a593Smuzhiyun 	__le16   voice_setting;
1075*4882a593Smuzhiyun } __packed;
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun #define HCI_OP_WRITE_VOICE_SETTING	0x0c26
1078*4882a593Smuzhiyun struct hci_cp_write_voice_setting {
1079*4882a593Smuzhiyun 	__le16   voice_setting;
1080*4882a593Smuzhiyun } __packed;
1081*4882a593Smuzhiyun 
1082*4882a593Smuzhiyun #define HCI_OP_HOST_BUFFER_SIZE		0x0c33
1083*4882a593Smuzhiyun struct hci_cp_host_buffer_size {
1084*4882a593Smuzhiyun 	__le16   acl_mtu;
1085*4882a593Smuzhiyun 	__u8     sco_mtu;
1086*4882a593Smuzhiyun 	__le16   acl_max_pkt;
1087*4882a593Smuzhiyun 	__le16   sco_max_pkt;
1088*4882a593Smuzhiyun } __packed;
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun #define HCI_OP_READ_NUM_SUPPORTED_IAC	0x0c38
1091*4882a593Smuzhiyun struct hci_rp_read_num_supported_iac {
1092*4882a593Smuzhiyun 	__u8	status;
1093*4882a593Smuzhiyun 	__u8	num_iac;
1094*4882a593Smuzhiyun } __packed;
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun #define HCI_OP_READ_CURRENT_IAC_LAP	0x0c39
1097*4882a593Smuzhiyun 
1098*4882a593Smuzhiyun #define HCI_OP_WRITE_CURRENT_IAC_LAP	0x0c3a
1099*4882a593Smuzhiyun struct hci_cp_write_current_iac_lap {
1100*4882a593Smuzhiyun 	__u8	num_iac;
1101*4882a593Smuzhiyun 	__u8	iac_lap[6];
1102*4882a593Smuzhiyun } __packed;
1103*4882a593Smuzhiyun 
1104*4882a593Smuzhiyun #define HCI_OP_WRITE_INQUIRY_MODE	0x0c45
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun #define HCI_MAX_EIR_LENGTH		240
1107*4882a593Smuzhiyun 
1108*4882a593Smuzhiyun #define HCI_OP_WRITE_EIR		0x0c52
1109*4882a593Smuzhiyun struct hci_cp_write_eir {
1110*4882a593Smuzhiyun 	__u8	fec;
1111*4882a593Smuzhiyun 	__u8	data[HCI_MAX_EIR_LENGTH];
1112*4882a593Smuzhiyun } __packed;
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun #define HCI_OP_READ_SSP_MODE		0x0c55
1115*4882a593Smuzhiyun struct hci_rp_read_ssp_mode {
1116*4882a593Smuzhiyun 	__u8     status;
1117*4882a593Smuzhiyun 	__u8     mode;
1118*4882a593Smuzhiyun } __packed;
1119*4882a593Smuzhiyun 
1120*4882a593Smuzhiyun #define HCI_OP_WRITE_SSP_MODE		0x0c56
1121*4882a593Smuzhiyun struct hci_cp_write_ssp_mode {
1122*4882a593Smuzhiyun 	__u8     mode;
1123*4882a593Smuzhiyun } __packed;
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_OOB_DATA		0x0c57
1126*4882a593Smuzhiyun struct hci_rp_read_local_oob_data {
1127*4882a593Smuzhiyun 	__u8     status;
1128*4882a593Smuzhiyun 	__u8     hash[16];
1129*4882a593Smuzhiyun 	__u8     rand[16];
1130*4882a593Smuzhiyun } __packed;
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun #define HCI_OP_READ_INQ_RSP_TX_POWER	0x0c58
1133*4882a593Smuzhiyun struct hci_rp_read_inq_rsp_tx_power {
1134*4882a593Smuzhiyun 	__u8     status;
1135*4882a593Smuzhiyun 	__s8     tx_power;
1136*4882a593Smuzhiyun } __packed;
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun #define HCI_OP_READ_DEF_ERR_DATA_REPORTING	0x0c5a
1139*4882a593Smuzhiyun 	#define ERR_DATA_REPORTING_DISABLED	0x00
1140*4882a593Smuzhiyun 	#define ERR_DATA_REPORTING_ENABLED	0x01
1141*4882a593Smuzhiyun struct hci_rp_read_def_err_data_reporting {
1142*4882a593Smuzhiyun 	__u8     status;
1143*4882a593Smuzhiyun 	__u8     err_data_reporting;
1144*4882a593Smuzhiyun } __packed;
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun #define HCI_OP_WRITE_DEF_ERR_DATA_REPORTING	0x0c5b
1147*4882a593Smuzhiyun struct hci_cp_write_def_err_data_reporting {
1148*4882a593Smuzhiyun 	__u8     err_data_reporting;
1149*4882a593Smuzhiyun } __packed;
1150*4882a593Smuzhiyun 
1151*4882a593Smuzhiyun #define HCI_OP_SET_EVENT_MASK_PAGE_2	0x0c63
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun #define HCI_OP_READ_LOCATION_DATA	0x0c64
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun #define HCI_OP_READ_FLOW_CONTROL_MODE	0x0c66
1156*4882a593Smuzhiyun struct hci_rp_read_flow_control_mode {
1157*4882a593Smuzhiyun 	__u8     status;
1158*4882a593Smuzhiyun 	__u8     mode;
1159*4882a593Smuzhiyun } __packed;
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun #define HCI_OP_WRITE_LE_HOST_SUPPORTED	0x0c6d
1162*4882a593Smuzhiyun struct hci_cp_write_le_host_supported {
1163*4882a593Smuzhiyun 	__u8	le;
1164*4882a593Smuzhiyun 	__u8	simul;
1165*4882a593Smuzhiyun } __packed;
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun #define HCI_OP_SET_RESERVED_LT_ADDR	0x0c74
1168*4882a593Smuzhiyun struct hci_cp_set_reserved_lt_addr {
1169*4882a593Smuzhiyun 	__u8	lt_addr;
1170*4882a593Smuzhiyun } __packed;
1171*4882a593Smuzhiyun struct hci_rp_set_reserved_lt_addr {
1172*4882a593Smuzhiyun 	__u8	status;
1173*4882a593Smuzhiyun 	__u8	lt_addr;
1174*4882a593Smuzhiyun } __packed;
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun #define HCI_OP_DELETE_RESERVED_LT_ADDR	0x0c75
1177*4882a593Smuzhiyun struct hci_cp_delete_reserved_lt_addr {
1178*4882a593Smuzhiyun 	__u8	lt_addr;
1179*4882a593Smuzhiyun } __packed;
1180*4882a593Smuzhiyun struct hci_rp_delete_reserved_lt_addr {
1181*4882a593Smuzhiyun 	__u8	status;
1182*4882a593Smuzhiyun 	__u8	lt_addr;
1183*4882a593Smuzhiyun } __packed;
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun #define HCI_OP_SET_CSB_DATA		0x0c76
1186*4882a593Smuzhiyun struct hci_cp_set_csb_data {
1187*4882a593Smuzhiyun 	__u8	lt_addr;
1188*4882a593Smuzhiyun 	__u8	fragment;
1189*4882a593Smuzhiyun 	__u8	data_length;
1190*4882a593Smuzhiyun 	__u8	data[HCI_MAX_CSB_DATA_SIZE];
1191*4882a593Smuzhiyun } __packed;
1192*4882a593Smuzhiyun struct hci_rp_set_csb_data {
1193*4882a593Smuzhiyun 	__u8	status;
1194*4882a593Smuzhiyun 	__u8	lt_addr;
1195*4882a593Smuzhiyun } __packed;
1196*4882a593Smuzhiyun 
1197*4882a593Smuzhiyun #define HCI_OP_READ_SYNC_TRAIN_PARAMS	0x0c77
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun #define HCI_OP_WRITE_SYNC_TRAIN_PARAMS	0x0c78
1200*4882a593Smuzhiyun struct hci_cp_write_sync_train_params {
1201*4882a593Smuzhiyun 	__le16	interval_min;
1202*4882a593Smuzhiyun 	__le16	interval_max;
1203*4882a593Smuzhiyun 	__le32	sync_train_tout;
1204*4882a593Smuzhiyun 	__u8	service_data;
1205*4882a593Smuzhiyun } __packed;
1206*4882a593Smuzhiyun struct hci_rp_write_sync_train_params {
1207*4882a593Smuzhiyun 	__u8	status;
1208*4882a593Smuzhiyun 	__le16	sync_train_int;
1209*4882a593Smuzhiyun } __packed;
1210*4882a593Smuzhiyun 
1211*4882a593Smuzhiyun #define HCI_OP_READ_SC_SUPPORT		0x0c79
1212*4882a593Smuzhiyun struct hci_rp_read_sc_support {
1213*4882a593Smuzhiyun 	__u8	status;
1214*4882a593Smuzhiyun 	__u8	support;
1215*4882a593Smuzhiyun } __packed;
1216*4882a593Smuzhiyun 
1217*4882a593Smuzhiyun #define HCI_OP_WRITE_SC_SUPPORT		0x0c7a
1218*4882a593Smuzhiyun struct hci_cp_write_sc_support {
1219*4882a593Smuzhiyun 	__u8	support;
1220*4882a593Smuzhiyun } __packed;
1221*4882a593Smuzhiyun 
1222*4882a593Smuzhiyun #define HCI_OP_READ_AUTH_PAYLOAD_TO    0x0c7b
1223*4882a593Smuzhiyun struct hci_cp_read_auth_payload_to {
1224*4882a593Smuzhiyun 	__le16  handle;
1225*4882a593Smuzhiyun } __packed;
1226*4882a593Smuzhiyun struct hci_rp_read_auth_payload_to {
1227*4882a593Smuzhiyun 	__u8    status;
1228*4882a593Smuzhiyun 	__le16  handle;
1229*4882a593Smuzhiyun 	__le16  timeout;
1230*4882a593Smuzhiyun } __packed;
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun #define HCI_OP_WRITE_AUTH_PAYLOAD_TO    0x0c7c
1233*4882a593Smuzhiyun struct hci_cp_write_auth_payload_to {
1234*4882a593Smuzhiyun 	__le16  handle;
1235*4882a593Smuzhiyun 	__le16  timeout;
1236*4882a593Smuzhiyun } __packed;
1237*4882a593Smuzhiyun struct hci_rp_write_auth_payload_to {
1238*4882a593Smuzhiyun 	__u8    status;
1239*4882a593Smuzhiyun 	__le16  handle;
1240*4882a593Smuzhiyun } __packed;
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_OOB_EXT_DATA	0x0c7d
1243*4882a593Smuzhiyun struct hci_rp_read_local_oob_ext_data {
1244*4882a593Smuzhiyun 	__u8     status;
1245*4882a593Smuzhiyun 	__u8     hash192[16];
1246*4882a593Smuzhiyun 	__u8     rand192[16];
1247*4882a593Smuzhiyun 	__u8     hash256[16];
1248*4882a593Smuzhiyun 	__u8     rand256[16];
1249*4882a593Smuzhiyun } __packed;
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_VERSION	0x1001
1252*4882a593Smuzhiyun struct hci_rp_read_local_version {
1253*4882a593Smuzhiyun 	__u8     status;
1254*4882a593Smuzhiyun 	__u8     hci_ver;
1255*4882a593Smuzhiyun 	__le16   hci_rev;
1256*4882a593Smuzhiyun 	__u8     lmp_ver;
1257*4882a593Smuzhiyun 	__le16   manufacturer;
1258*4882a593Smuzhiyun 	__le16   lmp_subver;
1259*4882a593Smuzhiyun } __packed;
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_COMMANDS	0x1002
1262*4882a593Smuzhiyun struct hci_rp_read_local_commands {
1263*4882a593Smuzhiyun 	__u8     status;
1264*4882a593Smuzhiyun 	__u8     commands[64];
1265*4882a593Smuzhiyun } __packed;
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_FEATURES	0x1003
1268*4882a593Smuzhiyun struct hci_rp_read_local_features {
1269*4882a593Smuzhiyun 	__u8     status;
1270*4882a593Smuzhiyun 	__u8     features[8];
1271*4882a593Smuzhiyun } __packed;
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_EXT_FEATURES	0x1004
1274*4882a593Smuzhiyun struct hci_cp_read_local_ext_features {
1275*4882a593Smuzhiyun 	__u8     page;
1276*4882a593Smuzhiyun } __packed;
1277*4882a593Smuzhiyun struct hci_rp_read_local_ext_features {
1278*4882a593Smuzhiyun 	__u8     status;
1279*4882a593Smuzhiyun 	__u8     page;
1280*4882a593Smuzhiyun 	__u8     max_page;
1281*4882a593Smuzhiyun 	__u8     features[8];
1282*4882a593Smuzhiyun } __packed;
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun #define HCI_OP_READ_BUFFER_SIZE		0x1005
1285*4882a593Smuzhiyun struct hci_rp_read_buffer_size {
1286*4882a593Smuzhiyun 	__u8     status;
1287*4882a593Smuzhiyun 	__le16   acl_mtu;
1288*4882a593Smuzhiyun 	__u8     sco_mtu;
1289*4882a593Smuzhiyun 	__le16   acl_max_pkt;
1290*4882a593Smuzhiyun 	__le16   sco_max_pkt;
1291*4882a593Smuzhiyun } __packed;
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun #define HCI_OP_READ_BD_ADDR		0x1009
1294*4882a593Smuzhiyun struct hci_rp_read_bd_addr {
1295*4882a593Smuzhiyun 	__u8     status;
1296*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1297*4882a593Smuzhiyun } __packed;
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun #define HCI_OP_READ_DATA_BLOCK_SIZE	0x100a
1300*4882a593Smuzhiyun struct hci_rp_read_data_block_size {
1301*4882a593Smuzhiyun 	__u8     status;
1302*4882a593Smuzhiyun 	__le16   max_acl_len;
1303*4882a593Smuzhiyun 	__le16   block_len;
1304*4882a593Smuzhiyun 	__le16   num_blocks;
1305*4882a593Smuzhiyun } __packed;
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_CODECS	0x100b
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_PAIRING_OPTS	0x100c
1310*4882a593Smuzhiyun struct hci_rp_read_local_pairing_opts {
1311*4882a593Smuzhiyun 	__u8     status;
1312*4882a593Smuzhiyun 	__u8     pairing_opts;
1313*4882a593Smuzhiyun 	__u8     max_key_size;
1314*4882a593Smuzhiyun } __packed;
1315*4882a593Smuzhiyun 
1316*4882a593Smuzhiyun #define HCI_OP_READ_PAGE_SCAN_ACTIVITY	0x0c1b
1317*4882a593Smuzhiyun struct hci_rp_read_page_scan_activity {
1318*4882a593Smuzhiyun 	__u8     status;
1319*4882a593Smuzhiyun 	__le16   interval;
1320*4882a593Smuzhiyun 	__le16   window;
1321*4882a593Smuzhiyun } __packed;
1322*4882a593Smuzhiyun 
1323*4882a593Smuzhiyun #define HCI_OP_WRITE_PAGE_SCAN_ACTIVITY	0x0c1c
1324*4882a593Smuzhiyun struct hci_cp_write_page_scan_activity {
1325*4882a593Smuzhiyun 	__le16   interval;
1326*4882a593Smuzhiyun 	__le16   window;
1327*4882a593Smuzhiyun } __packed;
1328*4882a593Smuzhiyun 
1329*4882a593Smuzhiyun #define HCI_OP_READ_TX_POWER		0x0c2d
1330*4882a593Smuzhiyun struct hci_cp_read_tx_power {
1331*4882a593Smuzhiyun 	__le16   handle;
1332*4882a593Smuzhiyun 	__u8     type;
1333*4882a593Smuzhiyun } __packed;
1334*4882a593Smuzhiyun struct hci_rp_read_tx_power {
1335*4882a593Smuzhiyun 	__u8     status;
1336*4882a593Smuzhiyun 	__le16   handle;
1337*4882a593Smuzhiyun 	__s8     tx_power;
1338*4882a593Smuzhiyun } __packed;
1339*4882a593Smuzhiyun 
1340*4882a593Smuzhiyun #define HCI_OP_READ_PAGE_SCAN_TYPE	0x0c46
1341*4882a593Smuzhiyun struct hci_rp_read_page_scan_type {
1342*4882a593Smuzhiyun 	__u8     status;
1343*4882a593Smuzhiyun 	__u8     type;
1344*4882a593Smuzhiyun } __packed;
1345*4882a593Smuzhiyun 
1346*4882a593Smuzhiyun #define HCI_OP_WRITE_PAGE_SCAN_TYPE	0x0c47
1347*4882a593Smuzhiyun 	#define PAGE_SCAN_TYPE_STANDARD		0x00
1348*4882a593Smuzhiyun 	#define PAGE_SCAN_TYPE_INTERLACED	0x01
1349*4882a593Smuzhiyun 
1350*4882a593Smuzhiyun #define HCI_OP_READ_RSSI		0x1405
1351*4882a593Smuzhiyun struct hci_cp_read_rssi {
1352*4882a593Smuzhiyun 	__le16   handle;
1353*4882a593Smuzhiyun } __packed;
1354*4882a593Smuzhiyun struct hci_rp_read_rssi {
1355*4882a593Smuzhiyun 	__u8     status;
1356*4882a593Smuzhiyun 	__le16   handle;
1357*4882a593Smuzhiyun 	__s8     rssi;
1358*4882a593Smuzhiyun } __packed;
1359*4882a593Smuzhiyun 
1360*4882a593Smuzhiyun #define HCI_OP_READ_CLOCK		0x1407
1361*4882a593Smuzhiyun struct hci_cp_read_clock {
1362*4882a593Smuzhiyun 	__le16   handle;
1363*4882a593Smuzhiyun 	__u8     which;
1364*4882a593Smuzhiyun } __packed;
1365*4882a593Smuzhiyun struct hci_rp_read_clock {
1366*4882a593Smuzhiyun 	__u8     status;
1367*4882a593Smuzhiyun 	__le16   handle;
1368*4882a593Smuzhiyun 	__le32   clock;
1369*4882a593Smuzhiyun 	__le16   accuracy;
1370*4882a593Smuzhiyun } __packed;
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun #define HCI_OP_READ_ENC_KEY_SIZE	0x1408
1373*4882a593Smuzhiyun struct hci_cp_read_enc_key_size {
1374*4882a593Smuzhiyun 	__le16   handle;
1375*4882a593Smuzhiyun } __packed;
1376*4882a593Smuzhiyun struct hci_rp_read_enc_key_size {
1377*4882a593Smuzhiyun 	__u8     status;
1378*4882a593Smuzhiyun 	__le16   handle;
1379*4882a593Smuzhiyun 	__u8     key_size;
1380*4882a593Smuzhiyun } __packed;
1381*4882a593Smuzhiyun 
1382*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_AMP_INFO	0x1409
1383*4882a593Smuzhiyun struct hci_rp_read_local_amp_info {
1384*4882a593Smuzhiyun 	__u8     status;
1385*4882a593Smuzhiyun 	__u8     amp_status;
1386*4882a593Smuzhiyun 	__le32   total_bw;
1387*4882a593Smuzhiyun 	__le32   max_bw;
1388*4882a593Smuzhiyun 	__le32   min_latency;
1389*4882a593Smuzhiyun 	__le32   max_pdu;
1390*4882a593Smuzhiyun 	__u8     amp_type;
1391*4882a593Smuzhiyun 	__le16   pal_cap;
1392*4882a593Smuzhiyun 	__le16   max_assoc_size;
1393*4882a593Smuzhiyun 	__le32   max_flush_to;
1394*4882a593Smuzhiyun 	__le32   be_flush_to;
1395*4882a593Smuzhiyun } __packed;
1396*4882a593Smuzhiyun 
1397*4882a593Smuzhiyun #define HCI_OP_READ_LOCAL_AMP_ASSOC	0x140a
1398*4882a593Smuzhiyun struct hci_cp_read_local_amp_assoc {
1399*4882a593Smuzhiyun 	__u8     phy_handle;
1400*4882a593Smuzhiyun 	__le16   len_so_far;
1401*4882a593Smuzhiyun 	__le16   max_len;
1402*4882a593Smuzhiyun } __packed;
1403*4882a593Smuzhiyun struct hci_rp_read_local_amp_assoc {
1404*4882a593Smuzhiyun 	__u8     status;
1405*4882a593Smuzhiyun 	__u8     phy_handle;
1406*4882a593Smuzhiyun 	__le16   rem_len;
1407*4882a593Smuzhiyun 	__u8     frag[];
1408*4882a593Smuzhiyun } __packed;
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun #define HCI_OP_WRITE_REMOTE_AMP_ASSOC	0x140b
1411*4882a593Smuzhiyun struct hci_cp_write_remote_amp_assoc {
1412*4882a593Smuzhiyun 	__u8     phy_handle;
1413*4882a593Smuzhiyun 	__le16   len_so_far;
1414*4882a593Smuzhiyun 	__le16   rem_len;
1415*4882a593Smuzhiyun 	__u8     frag[];
1416*4882a593Smuzhiyun } __packed;
1417*4882a593Smuzhiyun struct hci_rp_write_remote_amp_assoc {
1418*4882a593Smuzhiyun 	__u8     status;
1419*4882a593Smuzhiyun 	__u8     phy_handle;
1420*4882a593Smuzhiyun } __packed;
1421*4882a593Smuzhiyun 
1422*4882a593Smuzhiyun #define HCI_OP_GET_MWS_TRANSPORT_CONFIG	0x140c
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun #define HCI_OP_ENABLE_DUT_MODE		0x1803
1425*4882a593Smuzhiyun 
1426*4882a593Smuzhiyun #define HCI_OP_WRITE_SSP_DEBUG_MODE	0x1804
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun #define HCI_OP_LE_SET_EVENT_MASK	0x2001
1429*4882a593Smuzhiyun struct hci_cp_le_set_event_mask {
1430*4882a593Smuzhiyun 	__u8     mask[8];
1431*4882a593Smuzhiyun } __packed;
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun #define HCI_OP_LE_READ_BUFFER_SIZE	0x2002
1434*4882a593Smuzhiyun struct hci_rp_le_read_buffer_size {
1435*4882a593Smuzhiyun 	__u8     status;
1436*4882a593Smuzhiyun 	__le16   le_mtu;
1437*4882a593Smuzhiyun 	__u8     le_max_pkt;
1438*4882a593Smuzhiyun } __packed;
1439*4882a593Smuzhiyun 
1440*4882a593Smuzhiyun #define HCI_OP_LE_READ_LOCAL_FEATURES	0x2003
1441*4882a593Smuzhiyun struct hci_rp_le_read_local_features {
1442*4882a593Smuzhiyun 	__u8     status;
1443*4882a593Smuzhiyun 	__u8     features[8];
1444*4882a593Smuzhiyun } __packed;
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun #define HCI_OP_LE_SET_RANDOM_ADDR	0x2005
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun #define HCI_OP_LE_SET_ADV_PARAM		0x2006
1449*4882a593Smuzhiyun struct hci_cp_le_set_adv_param {
1450*4882a593Smuzhiyun 	__le16   min_interval;
1451*4882a593Smuzhiyun 	__le16   max_interval;
1452*4882a593Smuzhiyun 	__u8     type;
1453*4882a593Smuzhiyun 	__u8     own_address_type;
1454*4882a593Smuzhiyun 	__u8     direct_addr_type;
1455*4882a593Smuzhiyun 	bdaddr_t direct_addr;
1456*4882a593Smuzhiyun 	__u8     channel_map;
1457*4882a593Smuzhiyun 	__u8     filter_policy;
1458*4882a593Smuzhiyun } __packed;
1459*4882a593Smuzhiyun 
1460*4882a593Smuzhiyun #define HCI_OP_LE_READ_ADV_TX_POWER	0x2007
1461*4882a593Smuzhiyun struct hci_rp_le_read_adv_tx_power {
1462*4882a593Smuzhiyun 	__u8	status;
1463*4882a593Smuzhiyun 	__s8	tx_power;
1464*4882a593Smuzhiyun } __packed;
1465*4882a593Smuzhiyun 
1466*4882a593Smuzhiyun #define HCI_MAX_AD_LENGTH		31
1467*4882a593Smuzhiyun 
1468*4882a593Smuzhiyun #define HCI_OP_LE_SET_ADV_DATA		0x2008
1469*4882a593Smuzhiyun struct hci_cp_le_set_adv_data {
1470*4882a593Smuzhiyun 	__u8	length;
1471*4882a593Smuzhiyun 	__u8	data[HCI_MAX_AD_LENGTH];
1472*4882a593Smuzhiyun } __packed;
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun #define HCI_OP_LE_SET_SCAN_RSP_DATA	0x2009
1475*4882a593Smuzhiyun struct hci_cp_le_set_scan_rsp_data {
1476*4882a593Smuzhiyun 	__u8	length;
1477*4882a593Smuzhiyun 	__u8	data[HCI_MAX_AD_LENGTH];
1478*4882a593Smuzhiyun } __packed;
1479*4882a593Smuzhiyun 
1480*4882a593Smuzhiyun #define HCI_OP_LE_SET_ADV_ENABLE	0x200a
1481*4882a593Smuzhiyun 
1482*4882a593Smuzhiyun #define LE_SCAN_PASSIVE			0x00
1483*4882a593Smuzhiyun #define LE_SCAN_ACTIVE			0x01
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun #define HCI_OP_LE_SET_SCAN_PARAM	0x200b
1486*4882a593Smuzhiyun struct hci_cp_le_set_scan_param {
1487*4882a593Smuzhiyun 	__u8    type;
1488*4882a593Smuzhiyun 	__le16  interval;
1489*4882a593Smuzhiyun 	__le16  window;
1490*4882a593Smuzhiyun 	__u8    own_address_type;
1491*4882a593Smuzhiyun 	__u8    filter_policy;
1492*4882a593Smuzhiyun } __packed;
1493*4882a593Smuzhiyun 
1494*4882a593Smuzhiyun #define LE_SCAN_DISABLE			0x00
1495*4882a593Smuzhiyun #define LE_SCAN_ENABLE			0x01
1496*4882a593Smuzhiyun #define LE_SCAN_FILTER_DUP_DISABLE	0x00
1497*4882a593Smuzhiyun #define LE_SCAN_FILTER_DUP_ENABLE	0x01
1498*4882a593Smuzhiyun 
1499*4882a593Smuzhiyun #define HCI_OP_LE_SET_SCAN_ENABLE	0x200c
1500*4882a593Smuzhiyun struct hci_cp_le_set_scan_enable {
1501*4882a593Smuzhiyun 	__u8     enable;
1502*4882a593Smuzhiyun 	__u8     filter_dup;
1503*4882a593Smuzhiyun } __packed;
1504*4882a593Smuzhiyun 
1505*4882a593Smuzhiyun #define HCI_LE_USE_PEER_ADDR		0x00
1506*4882a593Smuzhiyun #define HCI_LE_USE_WHITELIST		0x01
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun #define HCI_OP_LE_CREATE_CONN		0x200d
1509*4882a593Smuzhiyun struct hci_cp_le_create_conn {
1510*4882a593Smuzhiyun 	__le16   scan_interval;
1511*4882a593Smuzhiyun 	__le16   scan_window;
1512*4882a593Smuzhiyun 	__u8     filter_policy;
1513*4882a593Smuzhiyun 	__u8     peer_addr_type;
1514*4882a593Smuzhiyun 	bdaddr_t peer_addr;
1515*4882a593Smuzhiyun 	__u8     own_address_type;
1516*4882a593Smuzhiyun 	__le16   conn_interval_min;
1517*4882a593Smuzhiyun 	__le16   conn_interval_max;
1518*4882a593Smuzhiyun 	__le16   conn_latency;
1519*4882a593Smuzhiyun 	__le16   supervision_timeout;
1520*4882a593Smuzhiyun 	__le16   min_ce_len;
1521*4882a593Smuzhiyun 	__le16   max_ce_len;
1522*4882a593Smuzhiyun } __packed;
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun #define HCI_OP_LE_CREATE_CONN_CANCEL	0x200e
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun #define HCI_OP_LE_READ_WHITE_LIST_SIZE	0x200f
1527*4882a593Smuzhiyun struct hci_rp_le_read_white_list_size {
1528*4882a593Smuzhiyun 	__u8	status;
1529*4882a593Smuzhiyun 	__u8	size;
1530*4882a593Smuzhiyun } __packed;
1531*4882a593Smuzhiyun 
1532*4882a593Smuzhiyun #define HCI_OP_LE_CLEAR_WHITE_LIST	0x2010
1533*4882a593Smuzhiyun 
1534*4882a593Smuzhiyun #define HCI_OP_LE_ADD_TO_WHITE_LIST	0x2011
1535*4882a593Smuzhiyun struct hci_cp_le_add_to_white_list {
1536*4882a593Smuzhiyun 	__u8     bdaddr_type;
1537*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1538*4882a593Smuzhiyun } __packed;
1539*4882a593Smuzhiyun 
1540*4882a593Smuzhiyun #define HCI_OP_LE_DEL_FROM_WHITE_LIST	0x2012
1541*4882a593Smuzhiyun struct hci_cp_le_del_from_white_list {
1542*4882a593Smuzhiyun 	__u8     bdaddr_type;
1543*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1544*4882a593Smuzhiyun } __packed;
1545*4882a593Smuzhiyun 
1546*4882a593Smuzhiyun #define HCI_OP_LE_CONN_UPDATE		0x2013
1547*4882a593Smuzhiyun struct hci_cp_le_conn_update {
1548*4882a593Smuzhiyun 	__le16   handle;
1549*4882a593Smuzhiyun 	__le16   conn_interval_min;
1550*4882a593Smuzhiyun 	__le16   conn_interval_max;
1551*4882a593Smuzhiyun 	__le16   conn_latency;
1552*4882a593Smuzhiyun 	__le16   supervision_timeout;
1553*4882a593Smuzhiyun 	__le16   min_ce_len;
1554*4882a593Smuzhiyun 	__le16   max_ce_len;
1555*4882a593Smuzhiyun } __packed;
1556*4882a593Smuzhiyun 
1557*4882a593Smuzhiyun #define HCI_OP_LE_READ_REMOTE_FEATURES	0x2016
1558*4882a593Smuzhiyun struct hci_cp_le_read_remote_features {
1559*4882a593Smuzhiyun 	__le16	 handle;
1560*4882a593Smuzhiyun } __packed;
1561*4882a593Smuzhiyun 
1562*4882a593Smuzhiyun #define HCI_OP_LE_START_ENC		0x2019
1563*4882a593Smuzhiyun struct hci_cp_le_start_enc {
1564*4882a593Smuzhiyun 	__le16	handle;
1565*4882a593Smuzhiyun 	__le64	rand;
1566*4882a593Smuzhiyun 	__le16	ediv;
1567*4882a593Smuzhiyun 	__u8	ltk[16];
1568*4882a593Smuzhiyun } __packed;
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun #define HCI_OP_LE_LTK_REPLY		0x201a
1571*4882a593Smuzhiyun struct hci_cp_le_ltk_reply {
1572*4882a593Smuzhiyun 	__le16	handle;
1573*4882a593Smuzhiyun 	__u8	ltk[16];
1574*4882a593Smuzhiyun } __packed;
1575*4882a593Smuzhiyun struct hci_rp_le_ltk_reply {
1576*4882a593Smuzhiyun 	__u8	status;
1577*4882a593Smuzhiyun 	__le16	handle;
1578*4882a593Smuzhiyun } __packed;
1579*4882a593Smuzhiyun 
1580*4882a593Smuzhiyun #define HCI_OP_LE_LTK_NEG_REPLY		0x201b
1581*4882a593Smuzhiyun struct hci_cp_le_ltk_neg_reply {
1582*4882a593Smuzhiyun 	__le16	handle;
1583*4882a593Smuzhiyun } __packed;
1584*4882a593Smuzhiyun struct hci_rp_le_ltk_neg_reply {
1585*4882a593Smuzhiyun 	__u8	status;
1586*4882a593Smuzhiyun 	__le16	handle;
1587*4882a593Smuzhiyun } __packed;
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun #define HCI_OP_LE_READ_SUPPORTED_STATES	0x201c
1590*4882a593Smuzhiyun struct hci_rp_le_read_supported_states {
1591*4882a593Smuzhiyun 	__u8	status;
1592*4882a593Smuzhiyun 	__u8	le_states[8];
1593*4882a593Smuzhiyun } __packed;
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun #define HCI_OP_LE_CONN_PARAM_REQ_REPLY	0x2020
1596*4882a593Smuzhiyun struct hci_cp_le_conn_param_req_reply {
1597*4882a593Smuzhiyun 	__le16	handle;
1598*4882a593Smuzhiyun 	__le16	interval_min;
1599*4882a593Smuzhiyun 	__le16	interval_max;
1600*4882a593Smuzhiyun 	__le16	latency;
1601*4882a593Smuzhiyun 	__le16	timeout;
1602*4882a593Smuzhiyun 	__le16	min_ce_len;
1603*4882a593Smuzhiyun 	__le16	max_ce_len;
1604*4882a593Smuzhiyun } __packed;
1605*4882a593Smuzhiyun 
1606*4882a593Smuzhiyun #define HCI_OP_LE_CONN_PARAM_REQ_NEG_REPLY	0x2021
1607*4882a593Smuzhiyun struct hci_cp_le_conn_param_req_neg_reply {
1608*4882a593Smuzhiyun 	__le16	handle;
1609*4882a593Smuzhiyun 	__u8	reason;
1610*4882a593Smuzhiyun } __packed;
1611*4882a593Smuzhiyun 
1612*4882a593Smuzhiyun #define HCI_OP_LE_SET_DATA_LEN		0x2022
1613*4882a593Smuzhiyun struct hci_cp_le_set_data_len {
1614*4882a593Smuzhiyun 	__le16	handle;
1615*4882a593Smuzhiyun 	__le16	tx_len;
1616*4882a593Smuzhiyun 	__le16	tx_time;
1617*4882a593Smuzhiyun } __packed;
1618*4882a593Smuzhiyun struct hci_rp_le_set_data_len {
1619*4882a593Smuzhiyun 	__u8	status;
1620*4882a593Smuzhiyun 	__le16	handle;
1621*4882a593Smuzhiyun } __packed;
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun #define HCI_OP_LE_READ_DEF_DATA_LEN	0x2023
1624*4882a593Smuzhiyun struct hci_rp_le_read_def_data_len {
1625*4882a593Smuzhiyun 	__u8	status;
1626*4882a593Smuzhiyun 	__le16	tx_len;
1627*4882a593Smuzhiyun 	__le16	tx_time;
1628*4882a593Smuzhiyun } __packed;
1629*4882a593Smuzhiyun 
1630*4882a593Smuzhiyun #define HCI_OP_LE_WRITE_DEF_DATA_LEN	0x2024
1631*4882a593Smuzhiyun struct hci_cp_le_write_def_data_len {
1632*4882a593Smuzhiyun 	__le16	tx_len;
1633*4882a593Smuzhiyun 	__le16	tx_time;
1634*4882a593Smuzhiyun } __packed;
1635*4882a593Smuzhiyun 
1636*4882a593Smuzhiyun #define HCI_OP_LE_ADD_TO_RESOLV_LIST	0x2027
1637*4882a593Smuzhiyun struct hci_cp_le_add_to_resolv_list {
1638*4882a593Smuzhiyun 	__u8	 bdaddr_type;
1639*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1640*4882a593Smuzhiyun 	__u8	 peer_irk[16];
1641*4882a593Smuzhiyun 	__u8	 local_irk[16];
1642*4882a593Smuzhiyun } __packed;
1643*4882a593Smuzhiyun 
1644*4882a593Smuzhiyun #define HCI_OP_LE_DEL_FROM_RESOLV_LIST	0x2028
1645*4882a593Smuzhiyun struct hci_cp_le_del_from_resolv_list {
1646*4882a593Smuzhiyun 	__u8	 bdaddr_type;
1647*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1648*4882a593Smuzhiyun } __packed;
1649*4882a593Smuzhiyun 
1650*4882a593Smuzhiyun #define HCI_OP_LE_CLEAR_RESOLV_LIST	0x2029
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun #define HCI_OP_LE_READ_RESOLV_LIST_SIZE	0x202a
1653*4882a593Smuzhiyun struct hci_rp_le_read_resolv_list_size {
1654*4882a593Smuzhiyun 	__u8	status;
1655*4882a593Smuzhiyun 	__u8	size;
1656*4882a593Smuzhiyun } __packed;
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun #define HCI_OP_LE_SET_ADDR_RESOLV_ENABLE 0x202d
1659*4882a593Smuzhiyun 
1660*4882a593Smuzhiyun #define HCI_OP_LE_SET_RPA_TIMEOUT	0x202e
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun #define HCI_OP_LE_READ_MAX_DATA_LEN	0x202f
1663*4882a593Smuzhiyun struct hci_rp_le_read_max_data_len {
1664*4882a593Smuzhiyun 	__u8	status;
1665*4882a593Smuzhiyun 	__le16	tx_len;
1666*4882a593Smuzhiyun 	__le16	tx_time;
1667*4882a593Smuzhiyun 	__le16	rx_len;
1668*4882a593Smuzhiyun 	__le16	rx_time;
1669*4882a593Smuzhiyun } __packed;
1670*4882a593Smuzhiyun 
1671*4882a593Smuzhiyun #define HCI_OP_LE_SET_DEFAULT_PHY	0x2031
1672*4882a593Smuzhiyun struct hci_cp_le_set_default_phy {
1673*4882a593Smuzhiyun 	__u8    all_phys;
1674*4882a593Smuzhiyun 	__u8    tx_phys;
1675*4882a593Smuzhiyun 	__u8    rx_phys;
1676*4882a593Smuzhiyun } __packed;
1677*4882a593Smuzhiyun 
1678*4882a593Smuzhiyun #define HCI_LE_SET_PHY_1M		0x01
1679*4882a593Smuzhiyun #define HCI_LE_SET_PHY_2M		0x02
1680*4882a593Smuzhiyun #define HCI_LE_SET_PHY_CODED		0x04
1681*4882a593Smuzhiyun 
1682*4882a593Smuzhiyun #define HCI_OP_LE_SET_EXT_SCAN_PARAMS   0x2041
1683*4882a593Smuzhiyun struct hci_cp_le_set_ext_scan_params {
1684*4882a593Smuzhiyun 	__u8    own_addr_type;
1685*4882a593Smuzhiyun 	__u8    filter_policy;
1686*4882a593Smuzhiyun 	__u8    scanning_phys;
1687*4882a593Smuzhiyun 	__u8    data[];
1688*4882a593Smuzhiyun } __packed;
1689*4882a593Smuzhiyun 
1690*4882a593Smuzhiyun #define LE_SCAN_PHY_1M		0x01
1691*4882a593Smuzhiyun #define LE_SCAN_PHY_2M		0x02
1692*4882a593Smuzhiyun #define LE_SCAN_PHY_CODED	0x04
1693*4882a593Smuzhiyun 
1694*4882a593Smuzhiyun struct hci_cp_le_scan_phy_params {
1695*4882a593Smuzhiyun 	__u8    type;
1696*4882a593Smuzhiyun 	__le16  interval;
1697*4882a593Smuzhiyun 	__le16  window;
1698*4882a593Smuzhiyun } __packed;
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun #define HCI_OP_LE_SET_EXT_SCAN_ENABLE   0x2042
1701*4882a593Smuzhiyun struct hci_cp_le_set_ext_scan_enable {
1702*4882a593Smuzhiyun 	__u8    enable;
1703*4882a593Smuzhiyun 	__u8    filter_dup;
1704*4882a593Smuzhiyun 	__le16  duration;
1705*4882a593Smuzhiyun 	__le16  period;
1706*4882a593Smuzhiyun } __packed;
1707*4882a593Smuzhiyun 
1708*4882a593Smuzhiyun #define HCI_OP_LE_EXT_CREATE_CONN    0x2043
1709*4882a593Smuzhiyun struct hci_cp_le_ext_create_conn {
1710*4882a593Smuzhiyun 	__u8      filter_policy;
1711*4882a593Smuzhiyun 	__u8      own_addr_type;
1712*4882a593Smuzhiyun 	__u8      peer_addr_type;
1713*4882a593Smuzhiyun 	bdaddr_t  peer_addr;
1714*4882a593Smuzhiyun 	__u8      phys;
1715*4882a593Smuzhiyun 	__u8      data[];
1716*4882a593Smuzhiyun } __packed;
1717*4882a593Smuzhiyun 
1718*4882a593Smuzhiyun struct hci_cp_le_ext_conn_param {
1719*4882a593Smuzhiyun 	__le16 scan_interval;
1720*4882a593Smuzhiyun 	__le16 scan_window;
1721*4882a593Smuzhiyun 	__le16 conn_interval_min;
1722*4882a593Smuzhiyun 	__le16 conn_interval_max;
1723*4882a593Smuzhiyun 	__le16 conn_latency;
1724*4882a593Smuzhiyun 	__le16 supervision_timeout;
1725*4882a593Smuzhiyun 	__le16 min_ce_len;
1726*4882a593Smuzhiyun 	__le16 max_ce_len;
1727*4882a593Smuzhiyun } __packed;
1728*4882a593Smuzhiyun 
1729*4882a593Smuzhiyun #define HCI_OP_LE_READ_NUM_SUPPORTED_ADV_SETS	0x203b
1730*4882a593Smuzhiyun struct hci_rp_le_read_num_supported_adv_sets {
1731*4882a593Smuzhiyun 	__u8  status;
1732*4882a593Smuzhiyun 	__u8  num_of_sets;
1733*4882a593Smuzhiyun } __packed;
1734*4882a593Smuzhiyun 
1735*4882a593Smuzhiyun #define HCI_OP_LE_SET_EXT_ADV_PARAMS		0x2036
1736*4882a593Smuzhiyun struct hci_cp_le_set_ext_adv_params {
1737*4882a593Smuzhiyun 	__u8      handle;
1738*4882a593Smuzhiyun 	__le16    evt_properties;
1739*4882a593Smuzhiyun 	__u8      min_interval[3];
1740*4882a593Smuzhiyun 	__u8      max_interval[3];
1741*4882a593Smuzhiyun 	__u8      channel_map;
1742*4882a593Smuzhiyun 	__u8      own_addr_type;
1743*4882a593Smuzhiyun 	__u8      peer_addr_type;
1744*4882a593Smuzhiyun 	bdaddr_t  peer_addr;
1745*4882a593Smuzhiyun 	__u8      filter_policy;
1746*4882a593Smuzhiyun 	__u8      tx_power;
1747*4882a593Smuzhiyun 	__u8      primary_phy;
1748*4882a593Smuzhiyun 	__u8      secondary_max_skip;
1749*4882a593Smuzhiyun 	__u8      secondary_phy;
1750*4882a593Smuzhiyun 	__u8      sid;
1751*4882a593Smuzhiyun 	__u8      notif_enable;
1752*4882a593Smuzhiyun } __packed;
1753*4882a593Smuzhiyun 
1754*4882a593Smuzhiyun #define HCI_ADV_PHY_1M		0X01
1755*4882a593Smuzhiyun #define HCI_ADV_PHY_2M		0x02
1756*4882a593Smuzhiyun #define HCI_ADV_PHY_CODED	0x03
1757*4882a593Smuzhiyun 
1758*4882a593Smuzhiyun struct hci_rp_le_set_ext_adv_params {
1759*4882a593Smuzhiyun 	__u8  status;
1760*4882a593Smuzhiyun 	__u8  tx_power;
1761*4882a593Smuzhiyun } __packed;
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun #define HCI_OP_LE_SET_EXT_ADV_ENABLE		0x2039
1764*4882a593Smuzhiyun struct hci_cp_le_set_ext_adv_enable {
1765*4882a593Smuzhiyun 	__u8  enable;
1766*4882a593Smuzhiyun 	__u8  num_of_sets;
1767*4882a593Smuzhiyun 	__u8  data[];
1768*4882a593Smuzhiyun } __packed;
1769*4882a593Smuzhiyun 
1770*4882a593Smuzhiyun struct hci_cp_ext_adv_set {
1771*4882a593Smuzhiyun 	__u8  handle;
1772*4882a593Smuzhiyun 	__le16 duration;
1773*4882a593Smuzhiyun 	__u8  max_events;
1774*4882a593Smuzhiyun } __packed;
1775*4882a593Smuzhiyun 
1776*4882a593Smuzhiyun #define HCI_OP_LE_SET_EXT_ADV_DATA		0x2037
1777*4882a593Smuzhiyun struct hci_cp_le_set_ext_adv_data {
1778*4882a593Smuzhiyun 	__u8  handle;
1779*4882a593Smuzhiyun 	__u8  operation;
1780*4882a593Smuzhiyun 	__u8  frag_pref;
1781*4882a593Smuzhiyun 	__u8  length;
1782*4882a593Smuzhiyun 	__u8  data[HCI_MAX_AD_LENGTH];
1783*4882a593Smuzhiyun } __packed;
1784*4882a593Smuzhiyun 
1785*4882a593Smuzhiyun #define HCI_OP_LE_SET_EXT_SCAN_RSP_DATA		0x2038
1786*4882a593Smuzhiyun struct hci_cp_le_set_ext_scan_rsp_data {
1787*4882a593Smuzhiyun 	__u8  handle;
1788*4882a593Smuzhiyun 	__u8  operation;
1789*4882a593Smuzhiyun 	__u8  frag_pref;
1790*4882a593Smuzhiyun 	__u8  length;
1791*4882a593Smuzhiyun 	__u8  data[HCI_MAX_AD_LENGTH];
1792*4882a593Smuzhiyun } __packed;
1793*4882a593Smuzhiyun 
1794*4882a593Smuzhiyun #define LE_SET_ADV_DATA_OP_COMPLETE	0x03
1795*4882a593Smuzhiyun 
1796*4882a593Smuzhiyun #define LE_SET_ADV_DATA_NO_FRAG		0x01
1797*4882a593Smuzhiyun 
1798*4882a593Smuzhiyun #define HCI_OP_LE_REMOVE_ADV_SET	0x203c
1799*4882a593Smuzhiyun 
1800*4882a593Smuzhiyun #define HCI_OP_LE_CLEAR_ADV_SETS	0x203d
1801*4882a593Smuzhiyun 
1802*4882a593Smuzhiyun #define HCI_OP_LE_SET_ADV_SET_RAND_ADDR	0x2035
1803*4882a593Smuzhiyun struct hci_cp_le_set_adv_set_rand_addr {
1804*4882a593Smuzhiyun 	__u8  handle;
1805*4882a593Smuzhiyun 	bdaddr_t  bdaddr;
1806*4882a593Smuzhiyun } __packed;
1807*4882a593Smuzhiyun 
1808*4882a593Smuzhiyun #define HCI_OP_LE_READ_BUFFER_SIZE_V2	0x2060
1809*4882a593Smuzhiyun struct hci_rp_le_read_buffer_size_v2 {
1810*4882a593Smuzhiyun 	__u8    status;
1811*4882a593Smuzhiyun 	__le16  acl_mtu;
1812*4882a593Smuzhiyun 	__u8    acl_max_pkt;
1813*4882a593Smuzhiyun 	__le16  iso_mtu;
1814*4882a593Smuzhiyun 	__u8    iso_max_pkt;
1815*4882a593Smuzhiyun } __packed;
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun #define HCI_OP_LE_READ_ISO_TX_SYNC		0x2061
1818*4882a593Smuzhiyun struct hci_cp_le_read_iso_tx_sync {
1819*4882a593Smuzhiyun 	__le16  handle;
1820*4882a593Smuzhiyun } __packed;
1821*4882a593Smuzhiyun 
1822*4882a593Smuzhiyun struct hci_rp_le_read_iso_tx_sync {
1823*4882a593Smuzhiyun 	__u8    status;
1824*4882a593Smuzhiyun 	__le16  handle;
1825*4882a593Smuzhiyun 	__le16  seq;
1826*4882a593Smuzhiyun 	__le32  imestamp;
1827*4882a593Smuzhiyun 	__u8    offset[3];
1828*4882a593Smuzhiyun } __packed;
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun #define HCI_OP_LE_SET_CIG_PARAMS		0x2062
1831*4882a593Smuzhiyun struct hci_cis_params {
1832*4882a593Smuzhiyun 	__u8    cis_id;
1833*4882a593Smuzhiyun 	__le16  m_sdu;
1834*4882a593Smuzhiyun 	__le16  s_sdu;
1835*4882a593Smuzhiyun 	__u8    m_phy;
1836*4882a593Smuzhiyun 	__u8    s_phy;
1837*4882a593Smuzhiyun 	__u8    m_rtn;
1838*4882a593Smuzhiyun 	__u8    s_rtn;
1839*4882a593Smuzhiyun } __packed;
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun struct hci_cp_le_set_cig_params {
1842*4882a593Smuzhiyun 	__u8    cig_id;
1843*4882a593Smuzhiyun 	__u8    m_interval[3];
1844*4882a593Smuzhiyun 	__u8    s_interval[3];
1845*4882a593Smuzhiyun 	__u8    sca;
1846*4882a593Smuzhiyun 	__u8    packing;
1847*4882a593Smuzhiyun 	__u8    framing;
1848*4882a593Smuzhiyun 	__le16  m_latency;
1849*4882a593Smuzhiyun 	__le16  s_latency;
1850*4882a593Smuzhiyun 	__u8    num_cis;
1851*4882a593Smuzhiyun 	struct hci_cis_params cis[];
1852*4882a593Smuzhiyun } __packed;
1853*4882a593Smuzhiyun 
1854*4882a593Smuzhiyun struct hci_rp_le_set_cig_params {
1855*4882a593Smuzhiyun 	__u8    status;
1856*4882a593Smuzhiyun 	__u8    cig_id;
1857*4882a593Smuzhiyun 	__u8    num_handles;
1858*4882a593Smuzhiyun 	__le16  handle[];
1859*4882a593Smuzhiyun } __packed;
1860*4882a593Smuzhiyun 
1861*4882a593Smuzhiyun #define HCI_OP_LE_CREATE_CIS			0x2064
1862*4882a593Smuzhiyun struct hci_cis {
1863*4882a593Smuzhiyun 	__le16  cis_handle;
1864*4882a593Smuzhiyun 	__le16  acl_handle;
1865*4882a593Smuzhiyun } __packed;
1866*4882a593Smuzhiyun 
1867*4882a593Smuzhiyun struct hci_cp_le_create_cis {
1868*4882a593Smuzhiyun 	__u8    num_cis;
1869*4882a593Smuzhiyun 	struct hci_cis cis[];
1870*4882a593Smuzhiyun } __packed;
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun #define HCI_OP_LE_REMOVE_CIG			0x2065
1873*4882a593Smuzhiyun struct hci_cp_le_remove_cig {
1874*4882a593Smuzhiyun 	__u8    cig_id;
1875*4882a593Smuzhiyun } __packed;
1876*4882a593Smuzhiyun 
1877*4882a593Smuzhiyun #define HCI_OP_LE_ACCEPT_CIS			0x2066
1878*4882a593Smuzhiyun struct hci_cp_le_accept_cis {
1879*4882a593Smuzhiyun 	__le16  handle;
1880*4882a593Smuzhiyun } __packed;
1881*4882a593Smuzhiyun 
1882*4882a593Smuzhiyun #define HCI_OP_LE_REJECT_CIS			0x2067
1883*4882a593Smuzhiyun struct hci_cp_le_reject_cis {
1884*4882a593Smuzhiyun 	__le16  handle;
1885*4882a593Smuzhiyun 	__u8    reason;
1886*4882a593Smuzhiyun } __packed;
1887*4882a593Smuzhiyun 
1888*4882a593Smuzhiyun /* ---- HCI Events ---- */
1889*4882a593Smuzhiyun #define HCI_EV_INQUIRY_COMPLETE		0x01
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun #define HCI_EV_INQUIRY_RESULT		0x02
1892*4882a593Smuzhiyun struct inquiry_info {
1893*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1894*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
1895*4882a593Smuzhiyun 	__u8     pscan_period_mode;
1896*4882a593Smuzhiyun 	__u8     pscan_mode;
1897*4882a593Smuzhiyun 	__u8     dev_class[3];
1898*4882a593Smuzhiyun 	__le16   clock_offset;
1899*4882a593Smuzhiyun } __packed;
1900*4882a593Smuzhiyun 
1901*4882a593Smuzhiyun #define HCI_EV_CONN_COMPLETE		0x03
1902*4882a593Smuzhiyun struct hci_ev_conn_complete {
1903*4882a593Smuzhiyun 	__u8     status;
1904*4882a593Smuzhiyun 	__le16   handle;
1905*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1906*4882a593Smuzhiyun 	__u8     link_type;
1907*4882a593Smuzhiyun 	__u8     encr_mode;
1908*4882a593Smuzhiyun } __packed;
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun #define HCI_EV_CONN_REQUEST		0x04
1911*4882a593Smuzhiyun struct hci_ev_conn_request {
1912*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1913*4882a593Smuzhiyun 	__u8     dev_class[3];
1914*4882a593Smuzhiyun 	__u8     link_type;
1915*4882a593Smuzhiyun } __packed;
1916*4882a593Smuzhiyun 
1917*4882a593Smuzhiyun #define HCI_EV_DISCONN_COMPLETE		0x05
1918*4882a593Smuzhiyun struct hci_ev_disconn_complete {
1919*4882a593Smuzhiyun 	__u8     status;
1920*4882a593Smuzhiyun 	__le16   handle;
1921*4882a593Smuzhiyun 	__u8     reason;
1922*4882a593Smuzhiyun } __packed;
1923*4882a593Smuzhiyun 
1924*4882a593Smuzhiyun #define HCI_EV_AUTH_COMPLETE		0x06
1925*4882a593Smuzhiyun struct hci_ev_auth_complete {
1926*4882a593Smuzhiyun 	__u8     status;
1927*4882a593Smuzhiyun 	__le16   handle;
1928*4882a593Smuzhiyun } __packed;
1929*4882a593Smuzhiyun 
1930*4882a593Smuzhiyun #define HCI_EV_REMOTE_NAME		0x07
1931*4882a593Smuzhiyun struct hci_ev_remote_name {
1932*4882a593Smuzhiyun 	__u8     status;
1933*4882a593Smuzhiyun 	bdaddr_t bdaddr;
1934*4882a593Smuzhiyun 	__u8     name[HCI_MAX_NAME_LENGTH];
1935*4882a593Smuzhiyun } __packed;
1936*4882a593Smuzhiyun 
1937*4882a593Smuzhiyun #define HCI_EV_ENCRYPT_CHANGE		0x08
1938*4882a593Smuzhiyun struct hci_ev_encrypt_change {
1939*4882a593Smuzhiyun 	__u8     status;
1940*4882a593Smuzhiyun 	__le16   handle;
1941*4882a593Smuzhiyun 	__u8     encrypt;
1942*4882a593Smuzhiyun } __packed;
1943*4882a593Smuzhiyun 
1944*4882a593Smuzhiyun #define HCI_EV_CHANGE_LINK_KEY_COMPLETE	0x09
1945*4882a593Smuzhiyun struct hci_ev_change_link_key_complete {
1946*4882a593Smuzhiyun 	__u8     status;
1947*4882a593Smuzhiyun 	__le16   handle;
1948*4882a593Smuzhiyun } __packed;
1949*4882a593Smuzhiyun 
1950*4882a593Smuzhiyun #define HCI_EV_REMOTE_FEATURES		0x0b
1951*4882a593Smuzhiyun struct hci_ev_remote_features {
1952*4882a593Smuzhiyun 	__u8     status;
1953*4882a593Smuzhiyun 	__le16   handle;
1954*4882a593Smuzhiyun 	__u8     features[8];
1955*4882a593Smuzhiyun } __packed;
1956*4882a593Smuzhiyun 
1957*4882a593Smuzhiyun #define HCI_EV_REMOTE_VERSION		0x0c
1958*4882a593Smuzhiyun struct hci_ev_remote_version {
1959*4882a593Smuzhiyun 	__u8     status;
1960*4882a593Smuzhiyun 	__le16   handle;
1961*4882a593Smuzhiyun 	__u8     lmp_ver;
1962*4882a593Smuzhiyun 	__le16   manufacturer;
1963*4882a593Smuzhiyun 	__le16   lmp_subver;
1964*4882a593Smuzhiyun } __packed;
1965*4882a593Smuzhiyun 
1966*4882a593Smuzhiyun #define HCI_EV_QOS_SETUP_COMPLETE	0x0d
1967*4882a593Smuzhiyun struct hci_qos {
1968*4882a593Smuzhiyun 	__u8     service_type;
1969*4882a593Smuzhiyun 	__u32    token_rate;
1970*4882a593Smuzhiyun 	__u32    peak_bandwidth;
1971*4882a593Smuzhiyun 	__u32    latency;
1972*4882a593Smuzhiyun 	__u32    delay_variation;
1973*4882a593Smuzhiyun } __packed;
1974*4882a593Smuzhiyun struct hci_ev_qos_setup_complete {
1975*4882a593Smuzhiyun 	__u8     status;
1976*4882a593Smuzhiyun 	__le16   handle;
1977*4882a593Smuzhiyun 	struct   hci_qos qos;
1978*4882a593Smuzhiyun } __packed;
1979*4882a593Smuzhiyun 
1980*4882a593Smuzhiyun #define HCI_EV_CMD_COMPLETE		0x0e
1981*4882a593Smuzhiyun struct hci_ev_cmd_complete {
1982*4882a593Smuzhiyun 	__u8     ncmd;
1983*4882a593Smuzhiyun 	__le16   opcode;
1984*4882a593Smuzhiyun } __packed;
1985*4882a593Smuzhiyun 
1986*4882a593Smuzhiyun #define HCI_EV_CMD_STATUS		0x0f
1987*4882a593Smuzhiyun struct hci_ev_cmd_status {
1988*4882a593Smuzhiyun 	__u8     status;
1989*4882a593Smuzhiyun 	__u8     ncmd;
1990*4882a593Smuzhiyun 	__le16   opcode;
1991*4882a593Smuzhiyun } __packed;
1992*4882a593Smuzhiyun 
1993*4882a593Smuzhiyun #define HCI_EV_HARDWARE_ERROR		0x10
1994*4882a593Smuzhiyun struct hci_ev_hardware_error {
1995*4882a593Smuzhiyun 	__u8     code;
1996*4882a593Smuzhiyun } __packed;
1997*4882a593Smuzhiyun 
1998*4882a593Smuzhiyun #define HCI_EV_ROLE_CHANGE		0x12
1999*4882a593Smuzhiyun struct hci_ev_role_change {
2000*4882a593Smuzhiyun 	__u8     status;
2001*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2002*4882a593Smuzhiyun 	__u8     role;
2003*4882a593Smuzhiyun } __packed;
2004*4882a593Smuzhiyun 
2005*4882a593Smuzhiyun #define HCI_EV_NUM_COMP_PKTS		0x13
2006*4882a593Smuzhiyun struct hci_comp_pkts_info {
2007*4882a593Smuzhiyun 	__le16   handle;
2008*4882a593Smuzhiyun 	__le16   count;
2009*4882a593Smuzhiyun } __packed;
2010*4882a593Smuzhiyun 
2011*4882a593Smuzhiyun struct hci_ev_num_comp_pkts {
2012*4882a593Smuzhiyun 	__u8     num_hndl;
2013*4882a593Smuzhiyun 	struct hci_comp_pkts_info handles[];
2014*4882a593Smuzhiyun } __packed;
2015*4882a593Smuzhiyun 
2016*4882a593Smuzhiyun #define HCI_EV_MODE_CHANGE		0x14
2017*4882a593Smuzhiyun struct hci_ev_mode_change {
2018*4882a593Smuzhiyun 	__u8     status;
2019*4882a593Smuzhiyun 	__le16   handle;
2020*4882a593Smuzhiyun 	__u8     mode;
2021*4882a593Smuzhiyun 	__le16   interval;
2022*4882a593Smuzhiyun } __packed;
2023*4882a593Smuzhiyun 
2024*4882a593Smuzhiyun #define HCI_EV_PIN_CODE_REQ		0x16
2025*4882a593Smuzhiyun struct hci_ev_pin_code_req {
2026*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2027*4882a593Smuzhiyun } __packed;
2028*4882a593Smuzhiyun 
2029*4882a593Smuzhiyun #define HCI_EV_LINK_KEY_REQ		0x17
2030*4882a593Smuzhiyun struct hci_ev_link_key_req {
2031*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2032*4882a593Smuzhiyun } __packed;
2033*4882a593Smuzhiyun 
2034*4882a593Smuzhiyun #define HCI_EV_LINK_KEY_NOTIFY		0x18
2035*4882a593Smuzhiyun struct hci_ev_link_key_notify {
2036*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2037*4882a593Smuzhiyun 	__u8     link_key[HCI_LINK_KEY_SIZE];
2038*4882a593Smuzhiyun 	__u8     key_type;
2039*4882a593Smuzhiyun } __packed;
2040*4882a593Smuzhiyun 
2041*4882a593Smuzhiyun #define HCI_EV_CLOCK_OFFSET		0x1c
2042*4882a593Smuzhiyun struct hci_ev_clock_offset {
2043*4882a593Smuzhiyun 	__u8     status;
2044*4882a593Smuzhiyun 	__le16   handle;
2045*4882a593Smuzhiyun 	__le16   clock_offset;
2046*4882a593Smuzhiyun } __packed;
2047*4882a593Smuzhiyun 
2048*4882a593Smuzhiyun #define HCI_EV_PKT_TYPE_CHANGE		0x1d
2049*4882a593Smuzhiyun struct hci_ev_pkt_type_change {
2050*4882a593Smuzhiyun 	__u8     status;
2051*4882a593Smuzhiyun 	__le16   handle;
2052*4882a593Smuzhiyun 	__le16   pkt_type;
2053*4882a593Smuzhiyun } __packed;
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun #define HCI_EV_PSCAN_REP_MODE		0x20
2056*4882a593Smuzhiyun struct hci_ev_pscan_rep_mode {
2057*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2058*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
2059*4882a593Smuzhiyun } __packed;
2060*4882a593Smuzhiyun 
2061*4882a593Smuzhiyun #define HCI_EV_INQUIRY_RESULT_WITH_RSSI	0x22
2062*4882a593Smuzhiyun struct inquiry_info_with_rssi {
2063*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2064*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
2065*4882a593Smuzhiyun 	__u8     pscan_period_mode;
2066*4882a593Smuzhiyun 	__u8     dev_class[3];
2067*4882a593Smuzhiyun 	__le16   clock_offset;
2068*4882a593Smuzhiyun 	__s8     rssi;
2069*4882a593Smuzhiyun } __packed;
2070*4882a593Smuzhiyun struct inquiry_info_with_rssi_and_pscan_mode {
2071*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2072*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
2073*4882a593Smuzhiyun 	__u8     pscan_period_mode;
2074*4882a593Smuzhiyun 	__u8     pscan_mode;
2075*4882a593Smuzhiyun 	__u8     dev_class[3];
2076*4882a593Smuzhiyun 	__le16   clock_offset;
2077*4882a593Smuzhiyun 	__s8     rssi;
2078*4882a593Smuzhiyun } __packed;
2079*4882a593Smuzhiyun 
2080*4882a593Smuzhiyun #define HCI_EV_REMOTE_EXT_FEATURES	0x23
2081*4882a593Smuzhiyun struct hci_ev_remote_ext_features {
2082*4882a593Smuzhiyun 	__u8     status;
2083*4882a593Smuzhiyun 	__le16   handle;
2084*4882a593Smuzhiyun 	__u8     page;
2085*4882a593Smuzhiyun 	__u8     max_page;
2086*4882a593Smuzhiyun 	__u8     features[8];
2087*4882a593Smuzhiyun } __packed;
2088*4882a593Smuzhiyun 
2089*4882a593Smuzhiyun #define HCI_EV_SYNC_CONN_COMPLETE	0x2c
2090*4882a593Smuzhiyun struct hci_ev_sync_conn_complete {
2091*4882a593Smuzhiyun 	__u8     status;
2092*4882a593Smuzhiyun 	__le16   handle;
2093*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2094*4882a593Smuzhiyun 	__u8     link_type;
2095*4882a593Smuzhiyun 	__u8     tx_interval;
2096*4882a593Smuzhiyun 	__u8     retrans_window;
2097*4882a593Smuzhiyun 	__le16   rx_pkt_len;
2098*4882a593Smuzhiyun 	__le16   tx_pkt_len;
2099*4882a593Smuzhiyun 	__u8     air_mode;
2100*4882a593Smuzhiyun } __packed;
2101*4882a593Smuzhiyun 
2102*4882a593Smuzhiyun #define HCI_EV_SYNC_CONN_CHANGED	0x2d
2103*4882a593Smuzhiyun struct hci_ev_sync_conn_changed {
2104*4882a593Smuzhiyun 	__u8     status;
2105*4882a593Smuzhiyun 	__le16   handle;
2106*4882a593Smuzhiyun 	__u8     tx_interval;
2107*4882a593Smuzhiyun 	__u8     retrans_window;
2108*4882a593Smuzhiyun 	__le16   rx_pkt_len;
2109*4882a593Smuzhiyun 	__le16   tx_pkt_len;
2110*4882a593Smuzhiyun } __packed;
2111*4882a593Smuzhiyun 
2112*4882a593Smuzhiyun #define HCI_EV_SNIFF_SUBRATE		0x2e
2113*4882a593Smuzhiyun struct hci_ev_sniff_subrate {
2114*4882a593Smuzhiyun 	__u8     status;
2115*4882a593Smuzhiyun 	__le16   handle;
2116*4882a593Smuzhiyun 	__le16   max_tx_latency;
2117*4882a593Smuzhiyun 	__le16   max_rx_latency;
2118*4882a593Smuzhiyun 	__le16   max_remote_timeout;
2119*4882a593Smuzhiyun 	__le16   max_local_timeout;
2120*4882a593Smuzhiyun } __packed;
2121*4882a593Smuzhiyun 
2122*4882a593Smuzhiyun #define HCI_EV_EXTENDED_INQUIRY_RESULT	0x2f
2123*4882a593Smuzhiyun struct extended_inquiry_info {
2124*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2125*4882a593Smuzhiyun 	__u8     pscan_rep_mode;
2126*4882a593Smuzhiyun 	__u8     pscan_period_mode;
2127*4882a593Smuzhiyun 	__u8     dev_class[3];
2128*4882a593Smuzhiyun 	__le16   clock_offset;
2129*4882a593Smuzhiyun 	__s8     rssi;
2130*4882a593Smuzhiyun 	__u8     data[240];
2131*4882a593Smuzhiyun } __packed;
2132*4882a593Smuzhiyun 
2133*4882a593Smuzhiyun #define HCI_EV_KEY_REFRESH_COMPLETE	0x30
2134*4882a593Smuzhiyun struct hci_ev_key_refresh_complete {
2135*4882a593Smuzhiyun 	__u8	status;
2136*4882a593Smuzhiyun 	__le16	handle;
2137*4882a593Smuzhiyun } __packed;
2138*4882a593Smuzhiyun 
2139*4882a593Smuzhiyun #define HCI_EV_IO_CAPA_REQUEST		0x31
2140*4882a593Smuzhiyun struct hci_ev_io_capa_request {
2141*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2142*4882a593Smuzhiyun } __packed;
2143*4882a593Smuzhiyun 
2144*4882a593Smuzhiyun #define HCI_EV_IO_CAPA_REPLY		0x32
2145*4882a593Smuzhiyun struct hci_ev_io_capa_reply {
2146*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2147*4882a593Smuzhiyun 	__u8     capability;
2148*4882a593Smuzhiyun 	__u8     oob_data;
2149*4882a593Smuzhiyun 	__u8     authentication;
2150*4882a593Smuzhiyun } __packed;
2151*4882a593Smuzhiyun 
2152*4882a593Smuzhiyun #define HCI_EV_USER_CONFIRM_REQUEST	0x33
2153*4882a593Smuzhiyun struct hci_ev_user_confirm_req {
2154*4882a593Smuzhiyun 	bdaddr_t	bdaddr;
2155*4882a593Smuzhiyun 	__le32		passkey;
2156*4882a593Smuzhiyun } __packed;
2157*4882a593Smuzhiyun 
2158*4882a593Smuzhiyun #define HCI_EV_USER_PASSKEY_REQUEST	0x34
2159*4882a593Smuzhiyun struct hci_ev_user_passkey_req {
2160*4882a593Smuzhiyun 	bdaddr_t	bdaddr;
2161*4882a593Smuzhiyun } __packed;
2162*4882a593Smuzhiyun 
2163*4882a593Smuzhiyun #define HCI_EV_REMOTE_OOB_DATA_REQUEST	0x35
2164*4882a593Smuzhiyun struct hci_ev_remote_oob_data_request {
2165*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2166*4882a593Smuzhiyun } __packed;
2167*4882a593Smuzhiyun 
2168*4882a593Smuzhiyun #define HCI_EV_SIMPLE_PAIR_COMPLETE	0x36
2169*4882a593Smuzhiyun struct hci_ev_simple_pair_complete {
2170*4882a593Smuzhiyun 	__u8     status;
2171*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2172*4882a593Smuzhiyun } __packed;
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun #define HCI_EV_USER_PASSKEY_NOTIFY	0x3b
2175*4882a593Smuzhiyun struct hci_ev_user_passkey_notify {
2176*4882a593Smuzhiyun 	bdaddr_t	bdaddr;
2177*4882a593Smuzhiyun 	__le32		passkey;
2178*4882a593Smuzhiyun } __packed;
2179*4882a593Smuzhiyun 
2180*4882a593Smuzhiyun #define HCI_KEYPRESS_STARTED		0
2181*4882a593Smuzhiyun #define HCI_KEYPRESS_ENTERED		1
2182*4882a593Smuzhiyun #define HCI_KEYPRESS_ERASED		2
2183*4882a593Smuzhiyun #define HCI_KEYPRESS_CLEARED		3
2184*4882a593Smuzhiyun #define HCI_KEYPRESS_COMPLETED		4
2185*4882a593Smuzhiyun 
2186*4882a593Smuzhiyun #define HCI_EV_KEYPRESS_NOTIFY		0x3c
2187*4882a593Smuzhiyun struct hci_ev_keypress_notify {
2188*4882a593Smuzhiyun 	bdaddr_t	bdaddr;
2189*4882a593Smuzhiyun 	__u8		type;
2190*4882a593Smuzhiyun } __packed;
2191*4882a593Smuzhiyun 
2192*4882a593Smuzhiyun #define HCI_EV_REMOTE_HOST_FEATURES	0x3d
2193*4882a593Smuzhiyun struct hci_ev_remote_host_features {
2194*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2195*4882a593Smuzhiyun 	__u8     features[8];
2196*4882a593Smuzhiyun } __packed;
2197*4882a593Smuzhiyun 
2198*4882a593Smuzhiyun #define HCI_EV_LE_META			0x3e
2199*4882a593Smuzhiyun struct hci_ev_le_meta {
2200*4882a593Smuzhiyun 	__u8     subevent;
2201*4882a593Smuzhiyun } __packed;
2202*4882a593Smuzhiyun 
2203*4882a593Smuzhiyun #define HCI_EV_PHY_LINK_COMPLETE	0x40
2204*4882a593Smuzhiyun struct hci_ev_phy_link_complete {
2205*4882a593Smuzhiyun 	__u8     status;
2206*4882a593Smuzhiyun 	__u8     phy_handle;
2207*4882a593Smuzhiyun } __packed;
2208*4882a593Smuzhiyun 
2209*4882a593Smuzhiyun #define HCI_EV_CHANNEL_SELECTED		0x41
2210*4882a593Smuzhiyun struct hci_ev_channel_selected {
2211*4882a593Smuzhiyun 	__u8     phy_handle;
2212*4882a593Smuzhiyun } __packed;
2213*4882a593Smuzhiyun 
2214*4882a593Smuzhiyun #define HCI_EV_DISCONN_PHY_LINK_COMPLETE	0x42
2215*4882a593Smuzhiyun struct hci_ev_disconn_phy_link_complete {
2216*4882a593Smuzhiyun 	__u8     status;
2217*4882a593Smuzhiyun 	__u8     phy_handle;
2218*4882a593Smuzhiyun 	__u8     reason;
2219*4882a593Smuzhiyun } __packed;
2220*4882a593Smuzhiyun 
2221*4882a593Smuzhiyun #define HCI_EV_LOGICAL_LINK_COMPLETE		0x45
2222*4882a593Smuzhiyun struct hci_ev_logical_link_complete {
2223*4882a593Smuzhiyun 	__u8     status;
2224*4882a593Smuzhiyun 	__le16   handle;
2225*4882a593Smuzhiyun 	__u8     phy_handle;
2226*4882a593Smuzhiyun 	__u8     flow_spec_id;
2227*4882a593Smuzhiyun } __packed;
2228*4882a593Smuzhiyun 
2229*4882a593Smuzhiyun #define HCI_EV_DISCONN_LOGICAL_LINK_COMPLETE	0x46
2230*4882a593Smuzhiyun struct hci_ev_disconn_logical_link_complete {
2231*4882a593Smuzhiyun 	__u8     status;
2232*4882a593Smuzhiyun 	__le16   handle;
2233*4882a593Smuzhiyun 	__u8     reason;
2234*4882a593Smuzhiyun } __packed;
2235*4882a593Smuzhiyun 
2236*4882a593Smuzhiyun #define HCI_EV_NUM_COMP_BLOCKS		0x48
2237*4882a593Smuzhiyun struct hci_comp_blocks_info {
2238*4882a593Smuzhiyun 	__le16   handle;
2239*4882a593Smuzhiyun 	__le16   pkts;
2240*4882a593Smuzhiyun 	__le16   blocks;
2241*4882a593Smuzhiyun } __packed;
2242*4882a593Smuzhiyun 
2243*4882a593Smuzhiyun struct hci_ev_num_comp_blocks {
2244*4882a593Smuzhiyun 	__le16   num_blocks;
2245*4882a593Smuzhiyun 	__u8     num_hndl;
2246*4882a593Smuzhiyun 	struct hci_comp_blocks_info handles[];
2247*4882a593Smuzhiyun } __packed;
2248*4882a593Smuzhiyun 
2249*4882a593Smuzhiyun #define HCI_EV_SYNC_TRAIN_COMPLETE	0x4F
2250*4882a593Smuzhiyun struct hci_ev_sync_train_complete {
2251*4882a593Smuzhiyun 	__u8	status;
2252*4882a593Smuzhiyun } __packed;
2253*4882a593Smuzhiyun 
2254*4882a593Smuzhiyun #define HCI_EV_SLAVE_PAGE_RESP_TIMEOUT	0x54
2255*4882a593Smuzhiyun 
2256*4882a593Smuzhiyun #define HCI_EV_LE_CONN_COMPLETE		0x01
2257*4882a593Smuzhiyun struct hci_ev_le_conn_complete {
2258*4882a593Smuzhiyun 	__u8     status;
2259*4882a593Smuzhiyun 	__le16   handle;
2260*4882a593Smuzhiyun 	__u8     role;
2261*4882a593Smuzhiyun 	__u8     bdaddr_type;
2262*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2263*4882a593Smuzhiyun 	__le16   interval;
2264*4882a593Smuzhiyun 	__le16   latency;
2265*4882a593Smuzhiyun 	__le16   supervision_timeout;
2266*4882a593Smuzhiyun 	__u8     clk_accurancy;
2267*4882a593Smuzhiyun } __packed;
2268*4882a593Smuzhiyun 
2269*4882a593Smuzhiyun /* Advertising report event types */
2270*4882a593Smuzhiyun #define LE_ADV_IND		0x00
2271*4882a593Smuzhiyun #define LE_ADV_DIRECT_IND	0x01
2272*4882a593Smuzhiyun #define LE_ADV_SCAN_IND		0x02
2273*4882a593Smuzhiyun #define LE_ADV_NONCONN_IND	0x03
2274*4882a593Smuzhiyun #define LE_ADV_SCAN_RSP		0x04
2275*4882a593Smuzhiyun #define LE_ADV_INVALID		0x05
2276*4882a593Smuzhiyun 
2277*4882a593Smuzhiyun /* Legacy event types in extended adv report */
2278*4882a593Smuzhiyun #define LE_LEGACY_ADV_IND		0x0013
2279*4882a593Smuzhiyun #define LE_LEGACY_ADV_DIRECT_IND 	0x0015
2280*4882a593Smuzhiyun #define LE_LEGACY_ADV_SCAN_IND		0x0012
2281*4882a593Smuzhiyun #define LE_LEGACY_NONCONN_IND		0x0010
2282*4882a593Smuzhiyun #define LE_LEGACY_SCAN_RSP_ADV		0x001b
2283*4882a593Smuzhiyun #define LE_LEGACY_SCAN_RSP_ADV_SCAN	0x001a
2284*4882a593Smuzhiyun 
2285*4882a593Smuzhiyun /* Extended Advertising event types */
2286*4882a593Smuzhiyun #define LE_EXT_ADV_NON_CONN_IND		0x0000
2287*4882a593Smuzhiyun #define LE_EXT_ADV_CONN_IND		0x0001
2288*4882a593Smuzhiyun #define LE_EXT_ADV_SCAN_IND		0x0002
2289*4882a593Smuzhiyun #define LE_EXT_ADV_DIRECT_IND		0x0004
2290*4882a593Smuzhiyun #define LE_EXT_ADV_SCAN_RSP		0x0008
2291*4882a593Smuzhiyun #define LE_EXT_ADV_LEGACY_PDU		0x0010
2292*4882a593Smuzhiyun 
2293*4882a593Smuzhiyun #define ADDR_LE_DEV_PUBLIC		0x00
2294*4882a593Smuzhiyun #define ADDR_LE_DEV_RANDOM		0x01
2295*4882a593Smuzhiyun #define ADDR_LE_DEV_PUBLIC_RESOLVED	0x02
2296*4882a593Smuzhiyun #define ADDR_LE_DEV_RANDOM_RESOLVED	0x03
2297*4882a593Smuzhiyun 
2298*4882a593Smuzhiyun #define HCI_EV_LE_ADVERTISING_REPORT	0x02
2299*4882a593Smuzhiyun struct hci_ev_le_advertising_info {
2300*4882a593Smuzhiyun 	__u8	 evt_type;
2301*4882a593Smuzhiyun 	__u8	 bdaddr_type;
2302*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2303*4882a593Smuzhiyun 	__u8	 length;
2304*4882a593Smuzhiyun 	__u8	 data[];
2305*4882a593Smuzhiyun } __packed;
2306*4882a593Smuzhiyun 
2307*4882a593Smuzhiyun #define HCI_EV_LE_CONN_UPDATE_COMPLETE	0x03
2308*4882a593Smuzhiyun struct hci_ev_le_conn_update_complete {
2309*4882a593Smuzhiyun 	__u8     status;
2310*4882a593Smuzhiyun 	__le16   handle;
2311*4882a593Smuzhiyun 	__le16   interval;
2312*4882a593Smuzhiyun 	__le16   latency;
2313*4882a593Smuzhiyun 	__le16   supervision_timeout;
2314*4882a593Smuzhiyun } __packed;
2315*4882a593Smuzhiyun 
2316*4882a593Smuzhiyun #define HCI_EV_LE_REMOTE_FEAT_COMPLETE	0x04
2317*4882a593Smuzhiyun struct hci_ev_le_remote_feat_complete {
2318*4882a593Smuzhiyun 	__u8     status;
2319*4882a593Smuzhiyun 	__le16   handle;
2320*4882a593Smuzhiyun 	__u8     features[8];
2321*4882a593Smuzhiyun } __packed;
2322*4882a593Smuzhiyun 
2323*4882a593Smuzhiyun #define HCI_EV_LE_LTK_REQ		0x05
2324*4882a593Smuzhiyun struct hci_ev_le_ltk_req {
2325*4882a593Smuzhiyun 	__le16	handle;
2326*4882a593Smuzhiyun 	__le64	rand;
2327*4882a593Smuzhiyun 	__le16	ediv;
2328*4882a593Smuzhiyun } __packed;
2329*4882a593Smuzhiyun 
2330*4882a593Smuzhiyun #define HCI_EV_LE_REMOTE_CONN_PARAM_REQ	0x06
2331*4882a593Smuzhiyun struct hci_ev_le_remote_conn_param_req {
2332*4882a593Smuzhiyun 	__le16 handle;
2333*4882a593Smuzhiyun 	__le16 interval_min;
2334*4882a593Smuzhiyun 	__le16 interval_max;
2335*4882a593Smuzhiyun 	__le16 latency;
2336*4882a593Smuzhiyun 	__le16 timeout;
2337*4882a593Smuzhiyun } __packed;
2338*4882a593Smuzhiyun 
2339*4882a593Smuzhiyun #define HCI_EV_LE_DATA_LEN_CHANGE	0x07
2340*4882a593Smuzhiyun struct hci_ev_le_data_len_change {
2341*4882a593Smuzhiyun 	__le16	handle;
2342*4882a593Smuzhiyun 	__le16	tx_len;
2343*4882a593Smuzhiyun 	__le16	tx_time;
2344*4882a593Smuzhiyun 	__le16	rx_len;
2345*4882a593Smuzhiyun 	__le16	rx_time;
2346*4882a593Smuzhiyun } __packed;
2347*4882a593Smuzhiyun 
2348*4882a593Smuzhiyun #define HCI_EV_LE_DIRECT_ADV_REPORT	0x0B
2349*4882a593Smuzhiyun struct hci_ev_le_direct_adv_info {
2350*4882a593Smuzhiyun 	__u8	 evt_type;
2351*4882a593Smuzhiyun 	__u8	 bdaddr_type;
2352*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2353*4882a593Smuzhiyun 	__u8	 direct_addr_type;
2354*4882a593Smuzhiyun 	bdaddr_t direct_addr;
2355*4882a593Smuzhiyun 	__s8	 rssi;
2356*4882a593Smuzhiyun } __packed;
2357*4882a593Smuzhiyun 
2358*4882a593Smuzhiyun #define HCI_EV_LE_PHY_UPDATE_COMPLETE	0x0c
2359*4882a593Smuzhiyun struct hci_ev_le_phy_update_complete {
2360*4882a593Smuzhiyun 	__u8  status;
2361*4882a593Smuzhiyun 	__le16 handle;
2362*4882a593Smuzhiyun 	__u8  tx_phy;
2363*4882a593Smuzhiyun 	__u8  rx_phy;
2364*4882a593Smuzhiyun } __packed;
2365*4882a593Smuzhiyun 
2366*4882a593Smuzhiyun #define HCI_EV_LE_EXT_ADV_REPORT    0x0d
2367*4882a593Smuzhiyun struct hci_ev_le_ext_adv_report {
2368*4882a593Smuzhiyun 	__le16 	 evt_type;
2369*4882a593Smuzhiyun 	__u8	 bdaddr_type;
2370*4882a593Smuzhiyun 	bdaddr_t bdaddr;
2371*4882a593Smuzhiyun 	__u8	 primary_phy;
2372*4882a593Smuzhiyun 	__u8	 secondary_phy;
2373*4882a593Smuzhiyun 	__u8	 sid;
2374*4882a593Smuzhiyun 	__u8	 tx_power;
2375*4882a593Smuzhiyun 	__s8	 rssi;
2376*4882a593Smuzhiyun 	__le16 	 interval;
2377*4882a593Smuzhiyun 	__u8  	 direct_addr_type;
2378*4882a593Smuzhiyun 	bdaddr_t direct_addr;
2379*4882a593Smuzhiyun 	__u8  	 length;
2380*4882a593Smuzhiyun 	__u8	 data[];
2381*4882a593Smuzhiyun } __packed;
2382*4882a593Smuzhiyun 
2383*4882a593Smuzhiyun #define HCI_EV_LE_ENHANCED_CONN_COMPLETE    0x0a
2384*4882a593Smuzhiyun struct hci_ev_le_enh_conn_complete {
2385*4882a593Smuzhiyun 	__u8      status;
2386*4882a593Smuzhiyun 	__le16    handle;
2387*4882a593Smuzhiyun 	__u8      role;
2388*4882a593Smuzhiyun 	__u8      bdaddr_type;
2389*4882a593Smuzhiyun 	bdaddr_t  bdaddr;
2390*4882a593Smuzhiyun 	bdaddr_t  local_rpa;
2391*4882a593Smuzhiyun 	bdaddr_t  peer_rpa;
2392*4882a593Smuzhiyun 	__le16    interval;
2393*4882a593Smuzhiyun 	__le16    latency;
2394*4882a593Smuzhiyun 	__le16    supervision_timeout;
2395*4882a593Smuzhiyun 	__u8      clk_accurancy;
2396*4882a593Smuzhiyun } __packed;
2397*4882a593Smuzhiyun 
2398*4882a593Smuzhiyun #define HCI_EV_LE_EXT_ADV_SET_TERM	0x12
2399*4882a593Smuzhiyun struct hci_evt_le_ext_adv_set_term {
2400*4882a593Smuzhiyun 	__u8	status;
2401*4882a593Smuzhiyun 	__u8	handle;
2402*4882a593Smuzhiyun 	__le16	conn_handle;
2403*4882a593Smuzhiyun 	__u8	num_evts;
2404*4882a593Smuzhiyun } __packed;
2405*4882a593Smuzhiyun 
2406*4882a593Smuzhiyun #define HCI_EVT_LE_CIS_ESTABLISHED	0x19
2407*4882a593Smuzhiyun struct hci_evt_le_cis_established {
2408*4882a593Smuzhiyun 	__u8  status;
2409*4882a593Smuzhiyun 	__le16 handle;
2410*4882a593Smuzhiyun 	__u8  cig_sync_delay[3];
2411*4882a593Smuzhiyun 	__u8  cis_sync_delay[3];
2412*4882a593Smuzhiyun 	__u8  m_latency[3];
2413*4882a593Smuzhiyun 	__u8  s_latency[3];
2414*4882a593Smuzhiyun 	__u8  m_phy;
2415*4882a593Smuzhiyun 	__u8  s_phy;
2416*4882a593Smuzhiyun 	__u8  nse;
2417*4882a593Smuzhiyun 	__u8  m_bn;
2418*4882a593Smuzhiyun 	__u8  s_bn;
2419*4882a593Smuzhiyun 	__u8  m_ft;
2420*4882a593Smuzhiyun 	__u8  s_ft;
2421*4882a593Smuzhiyun 	__le16 m_mtu;
2422*4882a593Smuzhiyun 	__le16 s_mtu;
2423*4882a593Smuzhiyun 	__le16 interval;
2424*4882a593Smuzhiyun } __packed;
2425*4882a593Smuzhiyun 
2426*4882a593Smuzhiyun #define HCI_EVT_LE_CIS_REQ		0x1a
2427*4882a593Smuzhiyun struct hci_evt_le_cis_req {
2428*4882a593Smuzhiyun 	__le16 acl_handle;
2429*4882a593Smuzhiyun 	__le16 cis_handle;
2430*4882a593Smuzhiyun 	__u8  cig_id;
2431*4882a593Smuzhiyun 	__u8  cis_id;
2432*4882a593Smuzhiyun } __packed;
2433*4882a593Smuzhiyun 
2434*4882a593Smuzhiyun #define HCI_EV_VENDOR			0xff
2435*4882a593Smuzhiyun 
2436*4882a593Smuzhiyun /* Internal events generated by Bluetooth stack */
2437*4882a593Smuzhiyun #define HCI_EV_STACK_INTERNAL	0xfd
2438*4882a593Smuzhiyun struct hci_ev_stack_internal {
2439*4882a593Smuzhiyun 	__u16    type;
2440*4882a593Smuzhiyun 	__u8     data[];
2441*4882a593Smuzhiyun } __packed;
2442*4882a593Smuzhiyun 
2443*4882a593Smuzhiyun #define HCI_EV_SI_DEVICE	0x01
2444*4882a593Smuzhiyun struct hci_ev_si_device {
2445*4882a593Smuzhiyun 	__u16    event;
2446*4882a593Smuzhiyun 	__u16    dev_id;
2447*4882a593Smuzhiyun } __packed;
2448*4882a593Smuzhiyun 
2449*4882a593Smuzhiyun #define HCI_EV_SI_SECURITY	0x02
2450*4882a593Smuzhiyun struct hci_ev_si_security {
2451*4882a593Smuzhiyun 	__u16    event;
2452*4882a593Smuzhiyun 	__u16    proto;
2453*4882a593Smuzhiyun 	__u16    subproto;
2454*4882a593Smuzhiyun 	__u8     incoming;
2455*4882a593Smuzhiyun } __packed;
2456*4882a593Smuzhiyun 
2457*4882a593Smuzhiyun /* ---- HCI Packet structures ---- */
2458*4882a593Smuzhiyun #define HCI_COMMAND_HDR_SIZE 3
2459*4882a593Smuzhiyun #define HCI_EVENT_HDR_SIZE   2
2460*4882a593Smuzhiyun #define HCI_ACL_HDR_SIZE     4
2461*4882a593Smuzhiyun #define HCI_SCO_HDR_SIZE     3
2462*4882a593Smuzhiyun #define HCI_ISO_HDR_SIZE     4
2463*4882a593Smuzhiyun 
2464*4882a593Smuzhiyun struct hci_command_hdr {
2465*4882a593Smuzhiyun 	__le16	opcode;		/* OCF & OGF */
2466*4882a593Smuzhiyun 	__u8	plen;
2467*4882a593Smuzhiyun } __packed;
2468*4882a593Smuzhiyun 
2469*4882a593Smuzhiyun struct hci_event_hdr {
2470*4882a593Smuzhiyun 	__u8	evt;
2471*4882a593Smuzhiyun 	__u8	plen;
2472*4882a593Smuzhiyun } __packed;
2473*4882a593Smuzhiyun 
2474*4882a593Smuzhiyun struct hci_acl_hdr {
2475*4882a593Smuzhiyun 	__le16	handle;		/* Handle & Flags(PB, BC) */
2476*4882a593Smuzhiyun 	__le16	dlen;
2477*4882a593Smuzhiyun } __packed;
2478*4882a593Smuzhiyun 
2479*4882a593Smuzhiyun struct hci_sco_hdr {
2480*4882a593Smuzhiyun 	__le16	handle;
2481*4882a593Smuzhiyun 	__u8	dlen;
2482*4882a593Smuzhiyun } __packed;
2483*4882a593Smuzhiyun 
2484*4882a593Smuzhiyun struct hci_iso_hdr {
2485*4882a593Smuzhiyun 	__le16	handle;
2486*4882a593Smuzhiyun 	__le16	dlen;
2487*4882a593Smuzhiyun 	__u8	data[];
2488*4882a593Smuzhiyun } __packed;
2489*4882a593Smuzhiyun 
2490*4882a593Smuzhiyun /* ISO data packet status flags */
2491*4882a593Smuzhiyun #define HCI_ISO_STATUS_VALID	0x00
2492*4882a593Smuzhiyun #define HCI_ISO_STATUS_INVALID	0x01
2493*4882a593Smuzhiyun #define HCI_ISO_STATUS_NOP	0x02
2494*4882a593Smuzhiyun 
2495*4882a593Smuzhiyun #define HCI_ISO_DATA_HDR_SIZE	4
2496*4882a593Smuzhiyun struct hci_iso_data_hdr {
2497*4882a593Smuzhiyun 	__le16	sn;
2498*4882a593Smuzhiyun 	__le16	slen;
2499*4882a593Smuzhiyun };
2500*4882a593Smuzhiyun 
2501*4882a593Smuzhiyun #define HCI_ISO_TS_DATA_HDR_SIZE 8
2502*4882a593Smuzhiyun struct hci_iso_ts_data_hdr {
2503*4882a593Smuzhiyun 	__le32	ts;
2504*4882a593Smuzhiyun 	__le16	sn;
2505*4882a593Smuzhiyun 	__le16	slen;
2506*4882a593Smuzhiyun };
2507*4882a593Smuzhiyun 
hci_event_hdr(const struct sk_buff * skb)2508*4882a593Smuzhiyun static inline struct hci_event_hdr *hci_event_hdr(const struct sk_buff *skb)
2509*4882a593Smuzhiyun {
2510*4882a593Smuzhiyun 	return (struct hci_event_hdr *) skb->data;
2511*4882a593Smuzhiyun }
2512*4882a593Smuzhiyun 
hci_acl_hdr(const struct sk_buff * skb)2513*4882a593Smuzhiyun static inline struct hci_acl_hdr *hci_acl_hdr(const struct sk_buff *skb)
2514*4882a593Smuzhiyun {
2515*4882a593Smuzhiyun 	return (struct hci_acl_hdr *) skb->data;
2516*4882a593Smuzhiyun }
2517*4882a593Smuzhiyun 
hci_sco_hdr(const struct sk_buff * skb)2518*4882a593Smuzhiyun static inline struct hci_sco_hdr *hci_sco_hdr(const struct sk_buff *skb)
2519*4882a593Smuzhiyun {
2520*4882a593Smuzhiyun 	return (struct hci_sco_hdr *) skb->data;
2521*4882a593Smuzhiyun }
2522*4882a593Smuzhiyun 
2523*4882a593Smuzhiyun /* Command opcode pack/unpack */
2524*4882a593Smuzhiyun #define hci_opcode_pack(ogf, ocf)	((__u16) ((ocf & 0x03ff)|(ogf << 10)))
2525*4882a593Smuzhiyun #define hci_opcode_ogf(op)		(op >> 10)
2526*4882a593Smuzhiyun #define hci_opcode_ocf(op)		(op & 0x03ff)
2527*4882a593Smuzhiyun 
2528*4882a593Smuzhiyun /* ACL handle and flags pack/unpack */
2529*4882a593Smuzhiyun #define hci_handle_pack(h, f)	((__u16) ((h & 0x0fff)|(f << 12)))
2530*4882a593Smuzhiyun #define hci_handle(h)		(h & 0x0fff)
2531*4882a593Smuzhiyun #define hci_flags(h)		(h >> 12)
2532*4882a593Smuzhiyun 
2533*4882a593Smuzhiyun /* ISO handle and flags pack/unpack */
2534*4882a593Smuzhiyun #define hci_iso_flags_pb(f)		(f & 0x0003)
2535*4882a593Smuzhiyun #define hci_iso_flags_ts(f)		((f >> 2) & 0x0001)
2536*4882a593Smuzhiyun #define hci_iso_flags_pack(pb, ts)	((pb & 0x03) | ((ts & 0x01) << 2))
2537*4882a593Smuzhiyun 
2538*4882a593Smuzhiyun /* ISO data length and flags pack/unpack */
2539*4882a593Smuzhiyun #define hci_iso_data_len_pack(h, f)	((__u16) ((h) | ((f) << 14)))
2540*4882a593Smuzhiyun #define hci_iso_data_len(h)		((h) & 0x3fff)
2541*4882a593Smuzhiyun #define hci_iso_data_flags(h)		((h) >> 14)
2542*4882a593Smuzhiyun 
2543*4882a593Smuzhiyun /* le24 support */
hci_cpu_to_le24(__u32 val,__u8 dst[3])2544*4882a593Smuzhiyun static inline void hci_cpu_to_le24(__u32 val, __u8 dst[3])
2545*4882a593Smuzhiyun {
2546*4882a593Smuzhiyun 	dst[0] = val & 0xff;
2547*4882a593Smuzhiyun 	dst[1] = (val & 0xff00) >> 8;
2548*4882a593Smuzhiyun 	dst[2] = (val & 0xff0000) >> 16;
2549*4882a593Smuzhiyun }
2550*4882a593Smuzhiyun 
2551*4882a593Smuzhiyun #endif /* __HCI_H */
2552