1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Media Bus API header
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef V4L2_MEDIABUS_H
9*4882a593Smuzhiyun #define V4L2_MEDIABUS_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/v4l2-mediabus.h>
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun * How to use the V4L2_MBUS_* flags:
16*4882a593Smuzhiyun * Flags are defined for each of the possible states and values of a media
17*4882a593Smuzhiyun * bus configuration parameter. One and only one bit of each group of flags
18*4882a593Smuzhiyun * shall be set by the users of the v4l2_subdev_pad_ops.get_mbus_config and
19*4882a593Smuzhiyun * v4l2_subdev_pad_ops.set_mbus_config operations to ensure that no
20*4882a593Smuzhiyun * conflicting settings are specified when reporting and setting the media bus
21*4882a593Smuzhiyun * configuration with the two operations respectively. For example, it is
22*4882a593Smuzhiyun * invalid to set or clear both the V4L2_MBUS_HSYNC_ACTIVE_HIGH and the
23*4882a593Smuzhiyun * V4L2_MBUS_HSYNC_ACTIVE_LOW flag at the same time. Instead either flag
24*4882a593Smuzhiyun * V4L2_MBUS_HSYNC_ACTIVE_HIGH or flag V4L2_MBUS_HSYNC_ACTIVE_LOW shall be
25*4882a593Smuzhiyun * set. The same is true for the V4L2_MBUS_CSI2_1/2/3/4_LANE flags group: only
26*4882a593Smuzhiyun * one of these four bits shall be set.
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * TODO: replace the existing V4L2_MBUS_* flags with structures of fields
29*4882a593Smuzhiyun * to avoid conflicting settings.
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * In example:
32*4882a593Smuzhiyun * #define V4L2_MBUS_HSYNC_ACTIVE_HIGH BIT(2)
33*4882a593Smuzhiyun * #define V4L2_MBUS_HSYNC_ACTIVE_LOW BIT(3)
34*4882a593Smuzhiyun * will be replaced by a field whose value reports the intended active state of
35*4882a593Smuzhiyun * the signal:
36*4882a593Smuzhiyun * unsigned int v4l2_mbus_hsync_active : 1;
37*4882a593Smuzhiyun */
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* Parallel flags */
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * The client runs in master or in slave mode. By "Master mode" an operation
42*4882a593Smuzhiyun * mode is meant, when the client (e.g., a camera sensor) is producing
43*4882a593Smuzhiyun * horizontal and vertical synchronisation. In "Slave mode" the host is
44*4882a593Smuzhiyun * providing these signals to the slave.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun #define V4L2_MBUS_MASTER BIT(0)
47*4882a593Smuzhiyun #define V4L2_MBUS_SLAVE BIT(1)
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun * Signal polarity flags
50*4882a593Smuzhiyun * Note: in BT.656 mode HSYNC, FIELD, and VSYNC are unused
51*4882a593Smuzhiyun * V4L2_MBUS_[HV]SYNC* flags should be also used for specifying
52*4882a593Smuzhiyun * configuration of hardware that uses [HV]REF signals
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun #define V4L2_MBUS_HSYNC_ACTIVE_HIGH BIT(2)
55*4882a593Smuzhiyun #define V4L2_MBUS_HSYNC_ACTIVE_LOW BIT(3)
56*4882a593Smuzhiyun #define V4L2_MBUS_VSYNC_ACTIVE_HIGH BIT(4)
57*4882a593Smuzhiyun #define V4L2_MBUS_VSYNC_ACTIVE_LOW BIT(5)
58*4882a593Smuzhiyun #define V4L2_MBUS_PCLK_SAMPLE_RISING BIT(6)
59*4882a593Smuzhiyun #define V4L2_MBUS_PCLK_SAMPLE_FALLING BIT(7)
60*4882a593Smuzhiyun #define V4L2_MBUS_DATA_ACTIVE_HIGH BIT(8)
61*4882a593Smuzhiyun #define V4L2_MBUS_DATA_ACTIVE_LOW BIT(9)
62*4882a593Smuzhiyun /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
63*4882a593Smuzhiyun #define V4L2_MBUS_FIELD_EVEN_HIGH BIT(10)
64*4882a593Smuzhiyun /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
65*4882a593Smuzhiyun #define V4L2_MBUS_FIELD_EVEN_LOW BIT(11)
66*4882a593Smuzhiyun /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
67*4882a593Smuzhiyun #define V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH BIT(12)
68*4882a593Smuzhiyun #define V4L2_MBUS_VIDEO_SOG_ACTIVE_LOW BIT(13)
69*4882a593Smuzhiyun #define V4L2_MBUS_DATA_ENABLE_HIGH BIT(14)
70*4882a593Smuzhiyun #define V4L2_MBUS_DATA_ENABLE_LOW BIT(15)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* Serial flags */
73*4882a593Smuzhiyun /* CSI-2 D-PHY number of data lanes. */
74*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_1_LANE BIT(0)
75*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_2_LANE BIT(1)
76*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_3_LANE BIT(2)
77*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_4_LANE BIT(3)
78*4882a593Smuzhiyun /* CSI-2 Virtual Channel identifiers. */
79*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_CHANNEL_0 BIT(4)
80*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_CHANNEL_1 BIT(5)
81*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_CHANNEL_2 BIT(6)
82*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_CHANNEL_3 BIT(7)
83*4882a593Smuzhiyun /* Clock non-continuous mode support. */
84*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_CONTINUOUS_CLOCK BIT(8)
85*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK BIT(9)
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_LANES (V4L2_MBUS_CSI2_1_LANE | \
88*4882a593Smuzhiyun V4L2_MBUS_CSI2_2_LANE | \
89*4882a593Smuzhiyun V4L2_MBUS_CSI2_3_LANE | \
90*4882a593Smuzhiyun V4L2_MBUS_CSI2_4_LANE)
91*4882a593Smuzhiyun #define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | \
92*4882a593Smuzhiyun V4L2_MBUS_CSI2_CHANNEL_1 | \
93*4882a593Smuzhiyun V4L2_MBUS_CSI2_CHANNEL_2 | \
94*4882a593Smuzhiyun V4L2_MBUS_CSI2_CHANNEL_3)
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /**
97*4882a593Smuzhiyun * enum v4l2_mbus_type - media bus type
98*4882a593Smuzhiyun * @V4L2_MBUS_UNKNOWN: unknown bus type, no V4L2 mediabus configuration
99*4882a593Smuzhiyun * @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync
100*4882a593Smuzhiyun * @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can
101*4882a593Smuzhiyun * also be used for BT.1120
102*4882a593Smuzhiyun * @V4L2_MBUS_CSI1: MIPI CSI-1 serial interface
103*4882a593Smuzhiyun * @V4L2_MBUS_CCP2: CCP2 (Compact Camera Port 2)
104*4882a593Smuzhiyun * @V4L2_MBUS_CSI2_DPHY: MIPI CSI-2 serial interface, with D-PHY
105*4882a593Smuzhiyun * @V4L2_MBUS_CSI2_CPHY: MIPI CSI-2 serial interface, with C-PHY
106*4882a593Smuzhiyun * @V4L2_MBUS_INVALID: invalid bus type (keep as last)
107*4882a593Smuzhiyun */
108*4882a593Smuzhiyun enum v4l2_mbus_type {
109*4882a593Smuzhiyun V4L2_MBUS_UNKNOWN,
110*4882a593Smuzhiyun V4L2_MBUS_PARALLEL,
111*4882a593Smuzhiyun V4L2_MBUS_BT656,
112*4882a593Smuzhiyun V4L2_MBUS_CSI1,
113*4882a593Smuzhiyun V4L2_MBUS_CCP2,
114*4882a593Smuzhiyun V4L2_MBUS_CSI2_DPHY,
115*4882a593Smuzhiyun V4L2_MBUS_CSI2_CPHY,
116*4882a593Smuzhiyun V4L2_MBUS_INVALID,
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /**
120*4882a593Smuzhiyun * struct v4l2_mbus_config - media bus configuration
121*4882a593Smuzhiyun * @type: in: interface type
122*4882a593Smuzhiyun * @flags: in / out: configuration flags, depending on @type
123*4882a593Smuzhiyun */
124*4882a593Smuzhiyun struct v4l2_mbus_config {
125*4882a593Smuzhiyun enum v4l2_mbus_type type;
126*4882a593Smuzhiyun unsigned int flags;
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /**
130*4882a593Smuzhiyun * v4l2_fill_pix_format - Ancillary routine that fills a &struct
131*4882a593Smuzhiyun * v4l2_pix_format fields from a &struct v4l2_mbus_framefmt.
132*4882a593Smuzhiyun *
133*4882a593Smuzhiyun * @pix_fmt: pointer to &struct v4l2_pix_format to be filled
134*4882a593Smuzhiyun * @mbus_fmt: pointer to &struct v4l2_mbus_framefmt to be used as model
135*4882a593Smuzhiyun */
136*4882a593Smuzhiyun static inline void
v4l2_fill_pix_format(struct v4l2_pix_format * pix_fmt,const struct v4l2_mbus_framefmt * mbus_fmt)137*4882a593Smuzhiyun v4l2_fill_pix_format(struct v4l2_pix_format *pix_fmt,
138*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *mbus_fmt)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun pix_fmt->width = mbus_fmt->width;
141*4882a593Smuzhiyun pix_fmt->height = mbus_fmt->height;
142*4882a593Smuzhiyun pix_fmt->field = mbus_fmt->field;
143*4882a593Smuzhiyun pix_fmt->colorspace = mbus_fmt->colorspace;
144*4882a593Smuzhiyun pix_fmt->ycbcr_enc = mbus_fmt->ycbcr_enc;
145*4882a593Smuzhiyun pix_fmt->quantization = mbus_fmt->quantization;
146*4882a593Smuzhiyun pix_fmt->xfer_func = mbus_fmt->xfer_func;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun /**
150*4882a593Smuzhiyun * v4l2_fill_pix_format - Ancillary routine that fills a &struct
151*4882a593Smuzhiyun * v4l2_mbus_framefmt from a &struct v4l2_pix_format and a
152*4882a593Smuzhiyun * data format code.
153*4882a593Smuzhiyun *
154*4882a593Smuzhiyun * @mbus_fmt: pointer to &struct v4l2_mbus_framefmt to be filled
155*4882a593Smuzhiyun * @pix_fmt: pointer to &struct v4l2_pix_format to be used as model
156*4882a593Smuzhiyun * @code: data format code (from &enum v4l2_mbus_pixelcode)
157*4882a593Smuzhiyun */
v4l2_fill_mbus_format(struct v4l2_mbus_framefmt * mbus_fmt,const struct v4l2_pix_format * pix_fmt,u32 code)158*4882a593Smuzhiyun static inline void v4l2_fill_mbus_format(struct v4l2_mbus_framefmt *mbus_fmt,
159*4882a593Smuzhiyun const struct v4l2_pix_format *pix_fmt,
160*4882a593Smuzhiyun u32 code)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun mbus_fmt->width = pix_fmt->width;
163*4882a593Smuzhiyun mbus_fmt->height = pix_fmt->height;
164*4882a593Smuzhiyun mbus_fmt->field = pix_fmt->field;
165*4882a593Smuzhiyun mbus_fmt->colorspace = pix_fmt->colorspace;
166*4882a593Smuzhiyun mbus_fmt->ycbcr_enc = pix_fmt->ycbcr_enc;
167*4882a593Smuzhiyun mbus_fmt->quantization = pix_fmt->quantization;
168*4882a593Smuzhiyun mbus_fmt->xfer_func = pix_fmt->xfer_func;
169*4882a593Smuzhiyun mbus_fmt->code = code;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun /**
173*4882a593Smuzhiyun * v4l2_fill_pix_format - Ancillary routine that fills a &struct
174*4882a593Smuzhiyun * v4l2_pix_format_mplane fields from a media bus structure.
175*4882a593Smuzhiyun *
176*4882a593Smuzhiyun * @pix_mp_fmt: pointer to &struct v4l2_pix_format_mplane to be filled
177*4882a593Smuzhiyun * @mbus_fmt: pointer to &struct v4l2_mbus_framefmt to be used as model
178*4882a593Smuzhiyun */
179*4882a593Smuzhiyun static inline void
v4l2_fill_pix_format_mplane(struct v4l2_pix_format_mplane * pix_mp_fmt,const struct v4l2_mbus_framefmt * mbus_fmt)180*4882a593Smuzhiyun v4l2_fill_pix_format_mplane(struct v4l2_pix_format_mplane *pix_mp_fmt,
181*4882a593Smuzhiyun const struct v4l2_mbus_framefmt *mbus_fmt)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun pix_mp_fmt->width = mbus_fmt->width;
184*4882a593Smuzhiyun pix_mp_fmt->height = mbus_fmt->height;
185*4882a593Smuzhiyun pix_mp_fmt->field = mbus_fmt->field;
186*4882a593Smuzhiyun pix_mp_fmt->colorspace = mbus_fmt->colorspace;
187*4882a593Smuzhiyun pix_mp_fmt->ycbcr_enc = mbus_fmt->ycbcr_enc;
188*4882a593Smuzhiyun pix_mp_fmt->quantization = mbus_fmt->quantization;
189*4882a593Smuzhiyun pix_mp_fmt->xfer_func = mbus_fmt->xfer_func;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /**
193*4882a593Smuzhiyun * v4l2_fill_pix_format - Ancillary routine that fills a &struct
194*4882a593Smuzhiyun * v4l2_mbus_framefmt from a &struct v4l2_pix_format_mplane.
195*4882a593Smuzhiyun *
196*4882a593Smuzhiyun * @mbus_fmt: pointer to &struct v4l2_mbus_framefmt to be filled
197*4882a593Smuzhiyun * @pix_mp_fmt: pointer to &struct v4l2_pix_format_mplane to be used as model
198*4882a593Smuzhiyun */
199*4882a593Smuzhiyun static inline void
v4l2_fill_mbus_format_mplane(struct v4l2_mbus_framefmt * mbus_fmt,const struct v4l2_pix_format_mplane * pix_mp_fmt)200*4882a593Smuzhiyun v4l2_fill_mbus_format_mplane(struct v4l2_mbus_framefmt *mbus_fmt,
201*4882a593Smuzhiyun const struct v4l2_pix_format_mplane *pix_mp_fmt)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun mbus_fmt->width = pix_mp_fmt->width;
204*4882a593Smuzhiyun mbus_fmt->height = pix_mp_fmt->height;
205*4882a593Smuzhiyun mbus_fmt->field = pix_mp_fmt->field;
206*4882a593Smuzhiyun mbus_fmt->colorspace = pix_mp_fmt->colorspace;
207*4882a593Smuzhiyun mbus_fmt->ycbcr_enc = pix_mp_fmt->ycbcr_enc;
208*4882a593Smuzhiyun mbus_fmt->quantization = pix_mp_fmt->quantization;
209*4882a593Smuzhiyun mbus_fmt->xfer_func = pix_mp_fmt->xfer_func;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun #endif
213