1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * drivers/media/video/tvp514x.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2008 Texas Instruments Inc 6*4882a593Smuzhiyun * Author: Vaibhav Hiremath <hvaibhav@ti.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Contributors: 9*4882a593Smuzhiyun * Sivaraj R <sivaraj@ti.com> 10*4882a593Smuzhiyun * Brijesh R Jadav <brijesh.j@ti.com> 11*4882a593Smuzhiyun * Hardik Shah <hardik.shah@ti.com> 12*4882a593Smuzhiyun * Manjunath Hadli <mrh@ti.com> 13*4882a593Smuzhiyun * Karicheri Muralidharan <m-karicheri2@ti.com> 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifndef _TVP514X_H 17*4882a593Smuzhiyun #define _TVP514X_H 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * Other macros 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun #define TVP514X_MODULE_NAME "tvp514x" 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define TVP514X_XCLK_BT656 (27000000) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Number of pixels and number of lines per frame for different standards */ 27*4882a593Smuzhiyun #define NTSC_NUM_ACTIVE_PIXELS (720) 28*4882a593Smuzhiyun #define NTSC_NUM_ACTIVE_LINES (480) 29*4882a593Smuzhiyun #define PAL_NUM_ACTIVE_PIXELS (720) 30*4882a593Smuzhiyun #define PAL_NUM_ACTIVE_LINES (576) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /** 33*4882a593Smuzhiyun * enum tvp514x_input - enum for different decoder input pin 34*4882a593Smuzhiyun * configuration. 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun enum tvp514x_input { 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * CVBS input selection 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun INPUT_CVBS_VI1A = 0x0, 41*4882a593Smuzhiyun INPUT_CVBS_VI1B, 42*4882a593Smuzhiyun INPUT_CVBS_VI1C, 43*4882a593Smuzhiyun INPUT_CVBS_VI2A = 0x04, 44*4882a593Smuzhiyun INPUT_CVBS_VI2B, 45*4882a593Smuzhiyun INPUT_CVBS_VI2C, 46*4882a593Smuzhiyun INPUT_CVBS_VI3A = 0x08, 47*4882a593Smuzhiyun INPUT_CVBS_VI3B, 48*4882a593Smuzhiyun INPUT_CVBS_VI3C, 49*4882a593Smuzhiyun INPUT_CVBS_VI4A = 0x0C, 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * S-Video input selection 52*4882a593Smuzhiyun */ 53*4882a593Smuzhiyun INPUT_SVIDEO_VI2A_VI1A = 0x44, 54*4882a593Smuzhiyun INPUT_SVIDEO_VI2B_VI1B, 55*4882a593Smuzhiyun INPUT_SVIDEO_VI2C_VI1C, 56*4882a593Smuzhiyun INPUT_SVIDEO_VI2A_VI3A = 0x54, 57*4882a593Smuzhiyun INPUT_SVIDEO_VI2B_VI3B, 58*4882a593Smuzhiyun INPUT_SVIDEO_VI2C_VI3C, 59*4882a593Smuzhiyun INPUT_SVIDEO_VI4A_VI1A = 0x4C, 60*4882a593Smuzhiyun INPUT_SVIDEO_VI4A_VI1B, 61*4882a593Smuzhiyun INPUT_SVIDEO_VI4A_VI1C, 62*4882a593Smuzhiyun INPUT_SVIDEO_VI4A_VI3A = 0x5C, 63*4882a593Smuzhiyun INPUT_SVIDEO_VI4A_VI3B, 64*4882a593Smuzhiyun INPUT_SVIDEO_VI4A_VI3C, 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* Need to add entries for 67*4882a593Smuzhiyun * RGB, YPbPr and SCART. 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun INPUT_INVALID 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /** 73*4882a593Smuzhiyun * enum tvp514x_output - enum for output format 74*4882a593Smuzhiyun * supported. 75*4882a593Smuzhiyun * 76*4882a593Smuzhiyun */ 77*4882a593Smuzhiyun enum tvp514x_output { 78*4882a593Smuzhiyun OUTPUT_10BIT_422_EMBEDDED_SYNC = 0, 79*4882a593Smuzhiyun OUTPUT_20BIT_422_SEPERATE_SYNC, 80*4882a593Smuzhiyun OUTPUT_10BIT_422_SEPERATE_SYNC = 3, 81*4882a593Smuzhiyun OUTPUT_INVALID 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /** 85*4882a593Smuzhiyun * struct tvp514x_platform_data - Platform data values and access functions. 86*4882a593Smuzhiyun * @clk_polarity: Clock polarity of the current interface. 87*4882a593Smuzhiyun * @hs_polarity: HSYNC Polarity configuration for current interface. 88*4882a593Smuzhiyun * @vs_polarity: VSYNC Polarity configuration for current interface. 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun struct tvp514x_platform_data { 91*4882a593Smuzhiyun /* Interface control params */ 92*4882a593Smuzhiyun bool clk_polarity; 93*4882a593Smuzhiyun bool hs_polarity; 94*4882a593Smuzhiyun bool vs_polarity; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #endif /* ifndef _TVP514X_H */ 99