1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * adv7183.h - definition for adv7183 inputs and outputs 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2011 Analog Devices Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ADV7183_H_ 9*4882a593Smuzhiyun #define _ADV7183_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* ADV7183 HW inputs */ 12*4882a593Smuzhiyun #define ADV7183_COMPOSITE0 0 /* CVBS in on AIN1 */ 13*4882a593Smuzhiyun #define ADV7183_COMPOSITE1 1 /* CVBS in on AIN2 */ 14*4882a593Smuzhiyun #define ADV7183_COMPOSITE2 2 /* CVBS in on AIN3 */ 15*4882a593Smuzhiyun #define ADV7183_COMPOSITE3 3 /* CVBS in on AIN4 */ 16*4882a593Smuzhiyun #define ADV7183_COMPOSITE4 4 /* CVBS in on AIN5 */ 17*4882a593Smuzhiyun #define ADV7183_COMPOSITE5 5 /* CVBS in on AIN6 */ 18*4882a593Smuzhiyun #define ADV7183_COMPOSITE6 6 /* CVBS in on AIN7 */ 19*4882a593Smuzhiyun #define ADV7183_COMPOSITE7 7 /* CVBS in on AIN8 */ 20*4882a593Smuzhiyun #define ADV7183_COMPOSITE8 8 /* CVBS in on AIN9 */ 21*4882a593Smuzhiyun #define ADV7183_COMPOSITE9 9 /* CVBS in on AIN10 */ 22*4882a593Smuzhiyun #define ADV7183_COMPOSITE10 10 /* CVBS in on AIN11 */ 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define ADV7183_SVIDEO0 11 /* Y on AIN1, C on AIN4 */ 25*4882a593Smuzhiyun #define ADV7183_SVIDEO1 12 /* Y on AIN2, C on AIN5 */ 26*4882a593Smuzhiyun #define ADV7183_SVIDEO2 13 /* Y on AIN3, C on AIN6 */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define ADV7183_COMPONENT0 14 /* Y on AIN1, Pr on AIN4, Pb on AIN5 */ 29*4882a593Smuzhiyun #define ADV7183_COMPONENT1 15 /* Y on AIN2, Pr on AIN3, Pb on AIN6 */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* ADV7183 HW outputs */ 32*4882a593Smuzhiyun #define ADV7183_8BIT_OUT 0 33*4882a593Smuzhiyun #define ADV7183_16BIT_OUT 1 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif 36