1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * include/media/i2c/adp1653.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2008--2011 Nokia Corporation 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Contact: Sakari Ailus <sakari.ailus@iki.fi> 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Contributors: 10*4882a593Smuzhiyun * Sakari Ailus <sakari.ailus@iki.fi> 11*4882a593Smuzhiyun * Tuukka Toivonen <tuukkat76@gmail.com> 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef ADP1653_H 15*4882a593Smuzhiyun #define ADP1653_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <linux/i2c.h> 18*4882a593Smuzhiyun #include <linux/mutex.h> 19*4882a593Smuzhiyun #include <linux/videodev2.h> 20*4882a593Smuzhiyun #include <media/v4l2-ctrls.h> 21*4882a593Smuzhiyun #include <media/v4l2-subdev.h> 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define ADP1653_NAME "adp1653" 24*4882a593Smuzhiyun #define ADP1653_I2C_ADDR (0x60 >> 1) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Register definitions */ 27*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL 0x00 28*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN 0x01 29*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_HPLED_TORCH_MAX 0x0b 30*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN 0x0c 31*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_HPLED_FLASH_MAX 0x1f 32*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_HPLED_SHIFT 3 33*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_ILED_MAX 0x07 34*4882a593Smuzhiyun #define ADP1653_REG_OUT_SEL_ILED_SHIFT 0 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define ADP1653_REG_CONFIG 0x01 37*4882a593Smuzhiyun #define ADP1653_REG_CONFIG_TMR_CFG (1 << 4) 38*4882a593Smuzhiyun #define ADP1653_REG_CONFIG_TMR_SET_MAX 0x0f 39*4882a593Smuzhiyun #define ADP1653_REG_CONFIG_TMR_SET_SHIFT 0 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define ADP1653_REG_SW_STROBE 0x02 42*4882a593Smuzhiyun #define ADP1653_REG_SW_STROBE_SW_STROBE (1 << 0) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define ADP1653_REG_FAULT 0x03 45*4882a593Smuzhiyun #define ADP1653_REG_FAULT_FLT_SCP (1 << 3) 46*4882a593Smuzhiyun #define ADP1653_REG_FAULT_FLT_OT (1 << 2) 47*4882a593Smuzhiyun #define ADP1653_REG_FAULT_FLT_TMR (1 << 1) 48*4882a593Smuzhiyun #define ADP1653_REG_FAULT_FLT_OV (1 << 0) 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define ADP1653_INDICATOR_INTENSITY_MIN 0 51*4882a593Smuzhiyun #define ADP1653_INDICATOR_INTENSITY_STEP 2500 52*4882a593Smuzhiyun #define ADP1653_INDICATOR_INTENSITY_MAX \ 53*4882a593Smuzhiyun (ADP1653_REG_OUT_SEL_ILED_MAX * ADP1653_INDICATOR_INTENSITY_STEP) 54*4882a593Smuzhiyun #define ADP1653_INDICATOR_INTENSITY_uA_TO_REG(a) \ 55*4882a593Smuzhiyun ((a) / ADP1653_INDICATOR_INTENSITY_STEP) 56*4882a593Smuzhiyun #define ADP1653_INDICATOR_INTENSITY_REG_TO_uA(a) \ 57*4882a593Smuzhiyun ((a) * ADP1653_INDICATOR_INTENSITY_STEP) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define ADP1653_FLASH_INTENSITY_BASE 35 60*4882a593Smuzhiyun #define ADP1653_FLASH_INTENSITY_STEP 15 61*4882a593Smuzhiyun #define ADP1653_FLASH_INTENSITY_MIN \ 62*4882a593Smuzhiyun (ADP1653_FLASH_INTENSITY_BASE \ 63*4882a593Smuzhiyun + ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN * ADP1653_FLASH_INTENSITY_STEP) 64*4882a593Smuzhiyun #define ADP1653_FLASH_INTENSITY_MAX \ 65*4882a593Smuzhiyun (ADP1653_FLASH_INTENSITY_MIN + \ 66*4882a593Smuzhiyun (ADP1653_REG_OUT_SEL_HPLED_FLASH_MAX - \ 67*4882a593Smuzhiyun ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN + 1) * \ 68*4882a593Smuzhiyun ADP1653_FLASH_INTENSITY_STEP) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define ADP1653_FLASH_INTENSITY_mA_TO_REG(a) \ 71*4882a593Smuzhiyun ((a) < ADP1653_FLASH_INTENSITY_BASE ? 0 : \ 72*4882a593Smuzhiyun (((a) - ADP1653_FLASH_INTENSITY_BASE) / ADP1653_FLASH_INTENSITY_STEP)) 73*4882a593Smuzhiyun #define ADP1653_FLASH_INTENSITY_REG_TO_mA(a) \ 74*4882a593Smuzhiyun ((a) * ADP1653_FLASH_INTENSITY_STEP + ADP1653_FLASH_INTENSITY_BASE) 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #define ADP1653_TORCH_INTENSITY_MIN \ 77*4882a593Smuzhiyun (ADP1653_FLASH_INTENSITY_BASE \ 78*4882a593Smuzhiyun + ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN * ADP1653_FLASH_INTENSITY_STEP) 79*4882a593Smuzhiyun #define ADP1653_TORCH_INTENSITY_MAX \ 80*4882a593Smuzhiyun (ADP1653_TORCH_INTENSITY_MIN + \ 81*4882a593Smuzhiyun (ADP1653_REG_OUT_SEL_HPLED_TORCH_MAX - \ 82*4882a593Smuzhiyun ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN + 1) * \ 83*4882a593Smuzhiyun ADP1653_FLASH_INTENSITY_STEP) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun struct adp1653_platform_data { 86*4882a593Smuzhiyun int (*power)(struct v4l2_subdev *sd, int on); 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun u32 max_flash_timeout; /* flash light timeout in us */ 89*4882a593Smuzhiyun u32 max_flash_intensity; /* led intensity, flash mode, mA */ 90*4882a593Smuzhiyun u32 max_torch_intensity; /* led intensity, torch mode, mA */ 91*4882a593Smuzhiyun u32 max_indicator_intensity; /* indicator led intensity, uA */ 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun struct gpio_desc *enable_gpio; /* for device-tree based boot */ 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define to_adp1653_flash(sd) container_of(sd, struct adp1653_flash, subdev) 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun struct adp1653_flash { 99*4882a593Smuzhiyun struct v4l2_subdev subdev; 100*4882a593Smuzhiyun struct adp1653_platform_data *platform_data; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls; 103*4882a593Smuzhiyun struct v4l2_ctrl *led_mode; 104*4882a593Smuzhiyun struct v4l2_ctrl *flash_timeout; 105*4882a593Smuzhiyun struct v4l2_ctrl *flash_intensity; 106*4882a593Smuzhiyun struct v4l2_ctrl *torch_intensity; 107*4882a593Smuzhiyun struct v4l2_ctrl *indicator_intensity; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun struct mutex power_lock; 110*4882a593Smuzhiyun int power_count; 111*4882a593Smuzhiyun int fault; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #endif /* ADP1653_H */ 115