1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2006-2009 Texas Instruments Inc
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun #ifndef _DM644X_CCDC_H
6*4882a593Smuzhiyun #define _DM644X_CCDC_H
7*4882a593Smuzhiyun #include <media/davinci/ccdc_types.h>
8*4882a593Smuzhiyun #include <media/davinci/vpfe_types.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /* enum for No of pixel per line to be avg. in Black Clamping*/
11*4882a593Smuzhiyun enum ccdc_sample_length {
12*4882a593Smuzhiyun CCDC_SAMPLE_1PIXELS,
13*4882a593Smuzhiyun CCDC_SAMPLE_2PIXELS,
14*4882a593Smuzhiyun CCDC_SAMPLE_4PIXELS,
15*4882a593Smuzhiyun CCDC_SAMPLE_8PIXELS,
16*4882a593Smuzhiyun CCDC_SAMPLE_16PIXELS
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* enum for No of lines in Black Clamping */
20*4882a593Smuzhiyun enum ccdc_sample_line {
21*4882a593Smuzhiyun CCDC_SAMPLE_1LINES,
22*4882a593Smuzhiyun CCDC_SAMPLE_2LINES,
23*4882a593Smuzhiyun CCDC_SAMPLE_4LINES,
24*4882a593Smuzhiyun CCDC_SAMPLE_8LINES,
25*4882a593Smuzhiyun CCDC_SAMPLE_16LINES
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* enum for Alaw gamma width */
29*4882a593Smuzhiyun enum ccdc_gamma_width {
30*4882a593Smuzhiyun CCDC_GAMMA_BITS_15_6, /* use bits 15-6 for gamma */
31*4882a593Smuzhiyun CCDC_GAMMA_BITS_14_5,
32*4882a593Smuzhiyun CCDC_GAMMA_BITS_13_4,
33*4882a593Smuzhiyun CCDC_GAMMA_BITS_12_3,
34*4882a593Smuzhiyun CCDC_GAMMA_BITS_11_2,
35*4882a593Smuzhiyun CCDC_GAMMA_BITS_10_1,
36*4882a593Smuzhiyun CCDC_GAMMA_BITS_09_0 /* use bits 9-0 for gamma */
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* returns the highest bit used for the gamma */
ccdc_gamma_width_max_bit(enum ccdc_gamma_width width)40*4882a593Smuzhiyun static inline u8 ccdc_gamma_width_max_bit(enum ccdc_gamma_width width)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun return 15 - width;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun enum ccdc_data_size {
46*4882a593Smuzhiyun CCDC_DATA_16BITS,
47*4882a593Smuzhiyun CCDC_DATA_15BITS,
48*4882a593Smuzhiyun CCDC_DATA_14BITS,
49*4882a593Smuzhiyun CCDC_DATA_13BITS,
50*4882a593Smuzhiyun CCDC_DATA_12BITS,
51*4882a593Smuzhiyun CCDC_DATA_11BITS,
52*4882a593Smuzhiyun CCDC_DATA_10BITS,
53*4882a593Smuzhiyun CCDC_DATA_8BITS
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* returns the highest bit used for this data size */
ccdc_data_size_max_bit(enum ccdc_data_size sz)57*4882a593Smuzhiyun static inline u8 ccdc_data_size_max_bit(enum ccdc_data_size sz)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return sz == CCDC_DATA_8BITS ? 7 : 15 - sz;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* structure for ALaw */
63*4882a593Smuzhiyun struct ccdc_a_law {
64*4882a593Smuzhiyun /* Enable/disable A-Law */
65*4882a593Smuzhiyun unsigned char enable;
66*4882a593Smuzhiyun /* Gamma Width Input */
67*4882a593Smuzhiyun enum ccdc_gamma_width gamma_wd;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /* structure for Black Clamping */
71*4882a593Smuzhiyun struct ccdc_black_clamp {
72*4882a593Smuzhiyun unsigned char enable;
73*4882a593Smuzhiyun /* only if bClampEnable is TRUE */
74*4882a593Smuzhiyun enum ccdc_sample_length sample_pixel;
75*4882a593Smuzhiyun /* only if bClampEnable is TRUE */
76*4882a593Smuzhiyun enum ccdc_sample_line sample_ln;
77*4882a593Smuzhiyun /* only if bClampEnable is TRUE */
78*4882a593Smuzhiyun unsigned short start_pixel;
79*4882a593Smuzhiyun /* only if bClampEnable is TRUE */
80*4882a593Smuzhiyun unsigned short sgain;
81*4882a593Smuzhiyun /* only if bClampEnable is FALSE */
82*4882a593Smuzhiyun unsigned short dc_sub;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* structure for Black Level Compensation */
86*4882a593Smuzhiyun struct ccdc_black_compensation {
87*4882a593Smuzhiyun /* Constant value to subtract from Red component */
88*4882a593Smuzhiyun char r;
89*4882a593Smuzhiyun /* Constant value to subtract from Gr component */
90*4882a593Smuzhiyun char gr;
91*4882a593Smuzhiyun /* Constant value to subtract from Blue component */
92*4882a593Smuzhiyun char b;
93*4882a593Smuzhiyun /* Constant value to subtract from Gb component */
94*4882a593Smuzhiyun char gb;
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* Structure for CCDC configuration parameters for raw capture mode passed
98*4882a593Smuzhiyun * by application
99*4882a593Smuzhiyun */
100*4882a593Smuzhiyun struct ccdc_config_params_raw {
101*4882a593Smuzhiyun /* data size value from 8 to 16 bits */
102*4882a593Smuzhiyun enum ccdc_data_size data_sz;
103*4882a593Smuzhiyun /* Structure for Optional A-Law */
104*4882a593Smuzhiyun struct ccdc_a_law alaw;
105*4882a593Smuzhiyun /* Structure for Optical Black Clamp */
106*4882a593Smuzhiyun struct ccdc_black_clamp blk_clamp;
107*4882a593Smuzhiyun /* Structure for Black Compensation */
108*4882a593Smuzhiyun struct ccdc_black_compensation blk_comp;
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun #ifdef __KERNEL__
113*4882a593Smuzhiyun #include <linux/io.h>
114*4882a593Smuzhiyun /* Define to enable/disable video port */
115*4882a593Smuzhiyun #define FP_NUM_BYTES 4
116*4882a593Smuzhiyun /* Define for extra pixel/line and extra lines/frame */
117*4882a593Smuzhiyun #define NUM_EXTRAPIXELS 8
118*4882a593Smuzhiyun #define NUM_EXTRALINES 8
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* settings for commonly used video formats */
121*4882a593Smuzhiyun #define CCDC_WIN_PAL {0, 0, 720, 576}
122*4882a593Smuzhiyun /* ntsc square pixel */
123*4882a593Smuzhiyun #define CCDC_WIN_VGA {0, 0, (640 + NUM_EXTRAPIXELS), (480 + NUM_EXTRALINES)}
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* Structure for CCDC configuration parameters for raw capture mode */
126*4882a593Smuzhiyun struct ccdc_params_raw {
127*4882a593Smuzhiyun /* pixel format */
128*4882a593Smuzhiyun enum ccdc_pixfmt pix_fmt;
129*4882a593Smuzhiyun /* progressive or interlaced frame */
130*4882a593Smuzhiyun enum ccdc_frmfmt frm_fmt;
131*4882a593Smuzhiyun /* video window */
132*4882a593Smuzhiyun struct v4l2_rect win;
133*4882a593Smuzhiyun /* field id polarity */
134*4882a593Smuzhiyun enum vpfe_pin_pol fid_pol;
135*4882a593Smuzhiyun /* vertical sync polarity */
136*4882a593Smuzhiyun enum vpfe_pin_pol vd_pol;
137*4882a593Smuzhiyun /* horizontal sync polarity */
138*4882a593Smuzhiyun enum vpfe_pin_pol hd_pol;
139*4882a593Smuzhiyun /* interleaved or separated fields */
140*4882a593Smuzhiyun enum ccdc_buftype buf_type;
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * enable to store the image in inverse
143*4882a593Smuzhiyun * order in memory(bottom to top)
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun unsigned char image_invert_enable;
146*4882a593Smuzhiyun /* configurable parameters */
147*4882a593Smuzhiyun struct ccdc_config_params_raw config_params;
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun struct ccdc_params_ycbcr {
151*4882a593Smuzhiyun /* pixel format */
152*4882a593Smuzhiyun enum ccdc_pixfmt pix_fmt;
153*4882a593Smuzhiyun /* progressive or interlaced frame */
154*4882a593Smuzhiyun enum ccdc_frmfmt frm_fmt;
155*4882a593Smuzhiyun /* video window */
156*4882a593Smuzhiyun struct v4l2_rect win;
157*4882a593Smuzhiyun /* field id polarity */
158*4882a593Smuzhiyun enum vpfe_pin_pol fid_pol;
159*4882a593Smuzhiyun /* vertical sync polarity */
160*4882a593Smuzhiyun enum vpfe_pin_pol vd_pol;
161*4882a593Smuzhiyun /* horizontal sync polarity */
162*4882a593Smuzhiyun enum vpfe_pin_pol hd_pol;
163*4882a593Smuzhiyun /* enable BT.656 embedded sync mode */
164*4882a593Smuzhiyun int bt656_enable;
165*4882a593Smuzhiyun /* cb:y:cr:y or y:cb:y:cr in memory */
166*4882a593Smuzhiyun enum ccdc_pixorder pix_order;
167*4882a593Smuzhiyun /* interleaved or separated fields */
168*4882a593Smuzhiyun enum ccdc_buftype buf_type;
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun #endif
171*4882a593Smuzhiyun #endif /* _DM644X_CCDC_H */
172