1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun /* 4*4882a593Smuzhiyun * Register bits and API for Wolfson WM97xx series of codecs 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _LINUX_WM97XX_H 8*4882a593Smuzhiyun #define _LINUX_WM97XX_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <sound/core.h> 11*4882a593Smuzhiyun #include <sound/pcm.h> 12*4882a593Smuzhiyun #include <sound/ac97_codec.h> 13*4882a593Smuzhiyun #include <sound/initval.h> 14*4882a593Smuzhiyun #include <linux/types.h> 15*4882a593Smuzhiyun #include <linux/list.h> 16*4882a593Smuzhiyun #include <linux/input.h> /* Input device layer */ 17*4882a593Smuzhiyun #include <linux/platform_device.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * WM97xx variants 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun #define WM97xx_GENERIC 0x0000 23*4882a593Smuzhiyun #define WM97xx_WM1613 0x1613 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* 26*4882a593Smuzhiyun * WM97xx AC97 Touchscreen registers 27*4882a593Smuzhiyun */ 28*4882a593Smuzhiyun #define AC97_WM97XX_DIGITISER1 0x76 29*4882a593Smuzhiyun #define AC97_WM97XX_DIGITISER2 0x78 30*4882a593Smuzhiyun #define AC97_WM97XX_DIGITISER_RD 0x7a 31*4882a593Smuzhiyun #define AC97_WM9713_DIG1 0x74 32*4882a593Smuzhiyun #define AC97_WM9713_DIG2 AC97_WM97XX_DIGITISER1 33*4882a593Smuzhiyun #define AC97_WM9713_DIG3 AC97_WM97XX_DIGITISER2 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* 36*4882a593Smuzhiyun * WM97xx register bits 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun #define WM97XX_POLL 0x8000 /* initiate a polling measurement */ 39*4882a593Smuzhiyun #define WM97XX_ADCSEL_X 0x1000 /* x coord measurement */ 40*4882a593Smuzhiyun #define WM97XX_ADCSEL_Y 0x2000 /* y coord measurement */ 41*4882a593Smuzhiyun #define WM97XX_ADCSEL_PRES 0x3000 /* pressure measurement */ 42*4882a593Smuzhiyun #define WM97XX_AUX_ID1 0x4000 43*4882a593Smuzhiyun #define WM97XX_AUX_ID2 0x5000 44*4882a593Smuzhiyun #define WM97XX_AUX_ID3 0x6000 45*4882a593Smuzhiyun #define WM97XX_AUX_ID4 0x7000 46*4882a593Smuzhiyun #define WM97XX_ADCSEL_MASK 0x7000 /* ADC selection mask */ 47*4882a593Smuzhiyun #define WM97XX_COO 0x0800 /* enable coordinate mode */ 48*4882a593Smuzhiyun #define WM97XX_CTC 0x0400 /* enable continuous mode */ 49*4882a593Smuzhiyun #define WM97XX_CM_RATE_93 0x0000 /* 93.75Hz continuous rate */ 50*4882a593Smuzhiyun #define WM97XX_CM_RATE_187 0x0100 /* 187.5Hz continuous rate */ 51*4882a593Smuzhiyun #define WM97XX_CM_RATE_375 0x0200 /* 375Hz continuous rate */ 52*4882a593Smuzhiyun #define WM97XX_CM_RATE_750 0x0300 /* 750Hz continuous rate */ 53*4882a593Smuzhiyun #define WM97XX_CM_RATE_8K 0x00f0 /* 8kHz continuous rate */ 54*4882a593Smuzhiyun #define WM97XX_CM_RATE_12K 0x01f0 /* 12kHz continuous rate */ 55*4882a593Smuzhiyun #define WM97XX_CM_RATE_24K 0x02f0 /* 24kHz continuous rate */ 56*4882a593Smuzhiyun #define WM97XX_CM_RATE_48K 0x03f0 /* 48kHz continuous rate */ 57*4882a593Smuzhiyun #define WM97XX_CM_RATE_MASK 0x03f0 58*4882a593Smuzhiyun #define WM97XX_RATE(i) (((i & 3) << 8) | ((i & 4) ? 0xf0 : 0)) 59*4882a593Smuzhiyun #define WM97XX_DELAY(i) ((i << 4) & 0x00f0) /* sample delay times */ 60*4882a593Smuzhiyun #define WM97XX_DELAY_MASK 0x00f0 61*4882a593Smuzhiyun #define WM97XX_SLEN 0x0008 /* slot read back enable */ 62*4882a593Smuzhiyun #define WM97XX_SLT(i) ((i - 5) & 0x7) /* panel slot (5-11) */ 63*4882a593Smuzhiyun #define WM97XX_SLT_MASK 0x0007 64*4882a593Smuzhiyun #define WM97XX_PRP_DETW 0x4000 /* detect on, digitise off, wake */ 65*4882a593Smuzhiyun #define WM97XX_PRP_DET 0x8000 /* detect on, digitise off, no wake */ 66*4882a593Smuzhiyun #define WM97XX_PRP_DET_DIG 0xc000 /* setect on, digitise on */ 67*4882a593Smuzhiyun #define WM97XX_RPR 0x2000 /* wake up on pen down */ 68*4882a593Smuzhiyun #define WM97XX_PEN_DOWN 0x8000 /* pen is down */ 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* WM9712 Bits */ 71*4882a593Smuzhiyun #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */ 72*4882a593Smuzhiyun #define WM9712_PDEN 0x0800 /* measure only when pen down */ 73*4882a593Smuzhiyun #define WM9712_WAIT 0x0200 /* wait until adc is read before next sample */ 74*4882a593Smuzhiyun #define WM9712_PIL 0x0100 /* current used for pressure measurement. set 400uA else 200uA */ 75*4882a593Smuzhiyun #define WM9712_MASK_HI 0x0040 /* hi on mask pin (47) stops conversions */ 76*4882a593Smuzhiyun #define WM9712_MASK_EDGE 0x0080 /* rising/falling edge on pin delays sample */ 77*4882a593Smuzhiyun #define WM9712_MASK_SYNC 0x00c0 /* rising/falling edge on mask initiates sample */ 78*4882a593Smuzhiyun #define WM9712_RPU(i) (i&0x3f) /* internal pull up on pen detect (64k / rpu) */ 79*4882a593Smuzhiyun #define WM9712_PD(i) (0x1 << i) /* power management */ 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* WM9712 Registers */ 82*4882a593Smuzhiyun #define AC97_WM9712_POWER 0x24 83*4882a593Smuzhiyun #define AC97_WM9712_REV 0x58 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* WM9705 Bits */ 86*4882a593Smuzhiyun #define WM9705_PDEN 0x1000 /* measure only when pen is down */ 87*4882a593Smuzhiyun #define WM9705_PINV 0x0800 /* inverts sense of pen down output */ 88*4882a593Smuzhiyun #define WM9705_BSEN 0x0400 /* BUSY flag enable, pin47 is 1 when busy */ 89*4882a593Smuzhiyun #define WM9705_BINV 0x0200 /* invert BUSY (pin47) output */ 90*4882a593Smuzhiyun #define WM9705_WAIT 0x0100 /* wait until adc is read before next sample */ 91*4882a593Smuzhiyun #define WM9705_PIL 0x0080 /* current used for pressure measurement. set 400uA else 200uA */ 92*4882a593Smuzhiyun #define WM9705_PHIZ 0x0040 /* set PHONE and PCBEEP inputs to high impedance */ 93*4882a593Smuzhiyun #define WM9705_MASK_HI 0x0010 /* hi on mask stops conversions */ 94*4882a593Smuzhiyun #define WM9705_MASK_EDGE 0x0020 /* rising/falling edge on pin delays sample */ 95*4882a593Smuzhiyun #define WM9705_MASK_SYNC 0x0030 /* rising/falling edge on mask initiates sample */ 96*4882a593Smuzhiyun #define WM9705_PDD(i) (i & 0x000f) /* pen detect comparator threshold */ 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* WM9713 Bits */ 100*4882a593Smuzhiyun #define WM9713_PDPOL 0x0400 /* Pen down polarity */ 101*4882a593Smuzhiyun #define WM9713_POLL 0x0200 /* initiate a polling measurement */ 102*4882a593Smuzhiyun #define WM9713_CTC 0x0100 /* enable continuous mode */ 103*4882a593Smuzhiyun #define WM9713_ADCSEL_X 0x0002 /* X measurement */ 104*4882a593Smuzhiyun #define WM9713_ADCSEL_Y 0x0004 /* Y measurement */ 105*4882a593Smuzhiyun #define WM9713_ADCSEL_PRES 0x0008 /* Pressure measurement */ 106*4882a593Smuzhiyun #define WM9713_COO 0x0001 /* enable coordinate mode */ 107*4882a593Smuzhiyun #define WM9713_45W 0x1000 /* set for 5 wire panel */ 108*4882a593Smuzhiyun #define WM9713_PDEN 0x0800 /* measure only when pen down */ 109*4882a593Smuzhiyun #define WM9713_ADCSEL_MASK 0x00fe /* ADC selection mask */ 110*4882a593Smuzhiyun #define WM9713_WAIT 0x0200 /* coordinate wait */ 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* AUX ADC ID's */ 113*4882a593Smuzhiyun #define TS_COMP1 0x0 114*4882a593Smuzhiyun #define TS_COMP2 0x1 115*4882a593Smuzhiyun #define TS_BMON 0x2 116*4882a593Smuzhiyun #define TS_WIPER 0x3 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* ID numbers */ 119*4882a593Smuzhiyun #define WM97XX_ID1 0x574d 120*4882a593Smuzhiyun #define WM9712_ID2 0x4c12 121*4882a593Smuzhiyun #define WM9705_ID2 0x4c05 122*4882a593Smuzhiyun #define WM9713_ID2 0x4c13 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun /* Codec GPIO's */ 125*4882a593Smuzhiyun #define WM97XX_MAX_GPIO 16 126*4882a593Smuzhiyun #define WM97XX_GPIO_1 (1 << 1) 127*4882a593Smuzhiyun #define WM97XX_GPIO_2 (1 << 2) 128*4882a593Smuzhiyun #define WM97XX_GPIO_3 (1 << 3) 129*4882a593Smuzhiyun #define WM97XX_GPIO_4 (1 << 4) 130*4882a593Smuzhiyun #define WM97XX_GPIO_5 (1 << 5) 131*4882a593Smuzhiyun #define WM97XX_GPIO_6 (1 << 6) 132*4882a593Smuzhiyun #define WM97XX_GPIO_7 (1 << 7) 133*4882a593Smuzhiyun #define WM97XX_GPIO_8 (1 << 8) 134*4882a593Smuzhiyun #define WM97XX_GPIO_9 (1 << 9) 135*4882a593Smuzhiyun #define WM97XX_GPIO_10 (1 << 10) 136*4882a593Smuzhiyun #define WM97XX_GPIO_11 (1 << 11) 137*4882a593Smuzhiyun #define WM97XX_GPIO_12 (1 << 12) 138*4882a593Smuzhiyun #define WM97XX_GPIO_13 (1 << 13) 139*4882a593Smuzhiyun #define WM97XX_GPIO_14 (1 << 14) 140*4882a593Smuzhiyun #define WM97XX_GPIO_15 (1 << 15) 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun #define AC97_LINK_FRAME 21 /* time in uS for AC97 link frame */ 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /*---------------- Return codes from sample reading functions ---------------*/ 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* More data is available; call the sample gathering function again */ 149*4882a593Smuzhiyun #define RC_AGAIN 0x00000001 150*4882a593Smuzhiyun /* The returned sample is valid */ 151*4882a593Smuzhiyun #define RC_VALID 0x00000002 152*4882a593Smuzhiyun /* The pen is up (the first RC_VALID without RC_PENUP means pen is down) */ 153*4882a593Smuzhiyun #define RC_PENUP 0x00000004 154*4882a593Smuzhiyun /* The pen is down (RC_VALID implies RC_PENDOWN, but sometimes it is helpful 155*4882a593Smuzhiyun to tell the handler that the pen is down but we don't know yet his coords, 156*4882a593Smuzhiyun so the handler should not sleep or wait for pendown irq) */ 157*4882a593Smuzhiyun #define RC_PENDOWN 0x00000008 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun /* 160*4882a593Smuzhiyun * The wm97xx driver provides a private API for writing platform-specific 161*4882a593Smuzhiyun * drivers. 162*4882a593Smuzhiyun */ 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun /* The structure used to return arch specific sampled data into */ 165*4882a593Smuzhiyun struct wm97xx_data { 166*4882a593Smuzhiyun int x; 167*4882a593Smuzhiyun int y; 168*4882a593Smuzhiyun int p; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* 172*4882a593Smuzhiyun * Codec GPIO status 173*4882a593Smuzhiyun */ 174*4882a593Smuzhiyun enum wm97xx_gpio_status { 175*4882a593Smuzhiyun WM97XX_GPIO_HIGH, 176*4882a593Smuzhiyun WM97XX_GPIO_LOW 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun /* 180*4882a593Smuzhiyun * Codec GPIO direction 181*4882a593Smuzhiyun */ 182*4882a593Smuzhiyun enum wm97xx_gpio_dir { 183*4882a593Smuzhiyun WM97XX_GPIO_IN, 184*4882a593Smuzhiyun WM97XX_GPIO_OUT 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun /* 188*4882a593Smuzhiyun * Codec GPIO polarity 189*4882a593Smuzhiyun */ 190*4882a593Smuzhiyun enum wm97xx_gpio_pol { 191*4882a593Smuzhiyun WM97XX_GPIO_POL_HIGH, 192*4882a593Smuzhiyun WM97XX_GPIO_POL_LOW 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun /* 196*4882a593Smuzhiyun * Codec GPIO sticky 197*4882a593Smuzhiyun */ 198*4882a593Smuzhiyun enum wm97xx_gpio_sticky { 199*4882a593Smuzhiyun WM97XX_GPIO_STICKY, 200*4882a593Smuzhiyun WM97XX_GPIO_NOTSTICKY 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun /* 204*4882a593Smuzhiyun * Codec GPIO wake 205*4882a593Smuzhiyun */ 206*4882a593Smuzhiyun enum wm97xx_gpio_wake { 207*4882a593Smuzhiyun WM97XX_GPIO_WAKE, 208*4882a593Smuzhiyun WM97XX_GPIO_NOWAKE 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun /* 212*4882a593Smuzhiyun * Digitiser ioctl commands 213*4882a593Smuzhiyun */ 214*4882a593Smuzhiyun #define WM97XX_DIG_START 0x1 215*4882a593Smuzhiyun #define WM97XX_DIG_STOP 0x2 216*4882a593Smuzhiyun #define WM97XX_PHY_INIT 0x3 217*4882a593Smuzhiyun #define WM97XX_AUX_PREPARE 0x4 218*4882a593Smuzhiyun #define WM97XX_DIG_RESTORE 0x5 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun struct wm97xx; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun extern struct wm97xx_codec_drv wm9705_codec; 223*4882a593Smuzhiyun extern struct wm97xx_codec_drv wm9712_codec; 224*4882a593Smuzhiyun extern struct wm97xx_codec_drv wm9713_codec; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun /* 227*4882a593Smuzhiyun * Codec driver interface - allows mapping to WM9705/12/13 and newer codecs 228*4882a593Smuzhiyun */ 229*4882a593Smuzhiyun struct wm97xx_codec_drv { 230*4882a593Smuzhiyun u16 id; 231*4882a593Smuzhiyun char *name; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun /* read 1 sample */ 234*4882a593Smuzhiyun int (*poll_sample) (struct wm97xx *, int adcsel, int *sample); 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun /* read X,Y,[P] in poll */ 237*4882a593Smuzhiyun int (*poll_touch) (struct wm97xx *, struct wm97xx_data *); 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun int (*acc_enable) (struct wm97xx *, int enable); 240*4882a593Smuzhiyun void (*phy_init) (struct wm97xx *); 241*4882a593Smuzhiyun void (*dig_enable) (struct wm97xx *, int enable); 242*4882a593Smuzhiyun void (*dig_restore) (struct wm97xx *); 243*4882a593Smuzhiyun void (*aux_prepare) (struct wm97xx *); 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun /* Machine specific and accelerated touch operations */ 248*4882a593Smuzhiyun struct wm97xx_mach_ops { 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun /* accelerated touch readback - coords are transmited on AC97 link */ 251*4882a593Smuzhiyun int acc_enabled; 252*4882a593Smuzhiyun void (*acc_pen_up) (struct wm97xx *); 253*4882a593Smuzhiyun int (*acc_pen_down) (struct wm97xx *); 254*4882a593Smuzhiyun int (*acc_startup) (struct wm97xx *); 255*4882a593Smuzhiyun void (*acc_shutdown) (struct wm97xx *); 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun /* interrupt mask control - required for accelerated operation */ 258*4882a593Smuzhiyun void (*irq_enable) (struct wm97xx *, int enable); 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun /* GPIO pin used for accelerated operation */ 261*4882a593Smuzhiyun int irq_gpio; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun /* pre and post sample - can be used to minimise any analog noise */ 264*4882a593Smuzhiyun void (*pre_sample) (int); /* function to run before sampling */ 265*4882a593Smuzhiyun void (*post_sample) (int); /* function to run after sampling */ 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun struct wm97xx { 269*4882a593Smuzhiyun u16 dig[3], id, gpio[6], misc; /* Cached codec registers */ 270*4882a593Smuzhiyun u16 dig_save[3]; /* saved during aux reading */ 271*4882a593Smuzhiyun struct wm97xx_codec_drv *codec; /* attached codec driver*/ 272*4882a593Smuzhiyun struct input_dev *input_dev; /* touchscreen input device */ 273*4882a593Smuzhiyun struct snd_ac97 *ac97; /* ALSA codec access */ 274*4882a593Smuzhiyun struct device *dev; /* ALSA device */ 275*4882a593Smuzhiyun struct platform_device *battery_dev; 276*4882a593Smuzhiyun struct platform_device *touch_dev; 277*4882a593Smuzhiyun struct wm97xx_mach_ops *mach_ops; 278*4882a593Smuzhiyun struct mutex codec_mutex; 279*4882a593Smuzhiyun struct delayed_work ts_reader; /* Used to poll touchscreen */ 280*4882a593Smuzhiyun unsigned long ts_reader_interval; /* Current interval for timer */ 281*4882a593Smuzhiyun unsigned long ts_reader_min_interval; /* Minimum interval */ 282*4882a593Smuzhiyun unsigned int pen_irq; /* Pen IRQ number in use */ 283*4882a593Smuzhiyun struct workqueue_struct *ts_workq; 284*4882a593Smuzhiyun struct work_struct pen_event_work; 285*4882a593Smuzhiyun u16 acc_slot; /* AC97 slot used for acc touch data */ 286*4882a593Smuzhiyun u16 acc_rate; /* acc touch data rate */ 287*4882a593Smuzhiyun unsigned pen_is_down:1; /* Pen is down */ 288*4882a593Smuzhiyun unsigned aux_waiting:1; /* aux measurement waiting */ 289*4882a593Smuzhiyun unsigned pen_probably_down:1; /* used in polling mode */ 290*4882a593Smuzhiyun u16 variant; /* WM97xx chip variant */ 291*4882a593Smuzhiyun u16 suspend_mode; /* PRP in suspend mode */ 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun struct wm97xx_batt_pdata { 295*4882a593Smuzhiyun int batt_aux; 296*4882a593Smuzhiyun int temp_aux; 297*4882a593Smuzhiyun int charge_gpio; 298*4882a593Smuzhiyun int min_voltage; 299*4882a593Smuzhiyun int max_voltage; 300*4882a593Smuzhiyun int batt_div; 301*4882a593Smuzhiyun int batt_mult; 302*4882a593Smuzhiyun int temp_div; 303*4882a593Smuzhiyun int temp_mult; 304*4882a593Smuzhiyun int batt_tech; 305*4882a593Smuzhiyun char *batt_name; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun struct wm97xx_pdata { 309*4882a593Smuzhiyun struct wm97xx_batt_pdata *batt_pdata; /* battery data */ 310*4882a593Smuzhiyun }; 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun /* 313*4882a593Smuzhiyun * Codec GPIO access (not supported on WM9705) 314*4882a593Smuzhiyun * This can be used to set/get codec GPIO and Virtual GPIO status. 315*4882a593Smuzhiyun */ 316*4882a593Smuzhiyun enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio); 317*4882a593Smuzhiyun void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio, 318*4882a593Smuzhiyun enum wm97xx_gpio_status status); 319*4882a593Smuzhiyun void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio, 320*4882a593Smuzhiyun enum wm97xx_gpio_dir dir, 321*4882a593Smuzhiyun enum wm97xx_gpio_pol pol, 322*4882a593Smuzhiyun enum wm97xx_gpio_sticky sticky, 323*4882a593Smuzhiyun enum wm97xx_gpio_wake wake); 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode); 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun /* codec AC97 IO access */ 328*4882a593Smuzhiyun int wm97xx_reg_read(struct wm97xx *wm, u16 reg); 329*4882a593Smuzhiyun void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val); 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun /* aux adc readback */ 332*4882a593Smuzhiyun int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel); 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun /* machine ops */ 335*4882a593Smuzhiyun int wm97xx_register_mach_ops(struct wm97xx *, struct wm97xx_mach_ops *); 336*4882a593Smuzhiyun void wm97xx_unregister_mach_ops(struct wm97xx *); 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun #endif 339