1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Miscellaneous definitions for VIA chipsets 3*4882a593Smuzhiyun Currently used only by drivers/parport/parport_pc.c */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* Values for SuperIO function select configuration register */ 6*4882a593Smuzhiyun #define VIA_FUNCTION_PARPORT_SPP 0x00 7*4882a593Smuzhiyun #define VIA_FUNCTION_PARPORT_ECP 0x01 8*4882a593Smuzhiyun #define VIA_FUNCTION_PARPORT_EPP 0x02 9*4882a593Smuzhiyun #define VIA_FUNCTION_PARPORT_DISABLE 0x03 10*4882a593Smuzhiyun #define VIA_FUNCTION_PROBE 0xFF /* Special magic value to be used in code, not to be written into chip */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* Bits for parallel port mode configuration register */ 13*4882a593Smuzhiyun #define VIA_PARPORT_ECPEPP 0X20 14*4882a593Smuzhiyun #define VIA_PARPORT_BIDIR 0x80 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* VIA configuration registers */ 17*4882a593Smuzhiyun #define VIA_CONFIG_INDEX 0x3F0 18*4882a593Smuzhiyun #define VIA_CONFIG_DATA 0x3F1 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* Mask for parallel port IRQ bits (in ISA PnP IRQ routing register 1) */ 21*4882a593Smuzhiyun #define VIA_IRQCONTROL_PARALLEL 0xF0 22*4882a593Smuzhiyun /* Mask for parallel port DMA bits (in ISA PnP DMA routing register) */ 23*4882a593Smuzhiyun #define VIA_DMACONTROL_PARALLEL 0x0C 24