1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2010 Google, Inc. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This software is licensed under the terms of the GNU General Public 6*4882a593Smuzhiyun * License version 2, as published by the Free Software Foundation, and 7*4882a593Smuzhiyun * may be copied, distributed, and modified under those terms. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 10*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*4882a593Smuzhiyun * GNU General Public License for more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifndef __TEGRA_USB_PHY_H 17*4882a593Smuzhiyun #define __TEGRA_USB_PHY_H 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #include <linux/clk.h> 20*4882a593Smuzhiyun #include <linux/gpio.h> 21*4882a593Smuzhiyun #include <linux/reset.h> 22*4882a593Smuzhiyun #include <linux/usb/otg.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* 25*4882a593Smuzhiyun * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers 26*4882a593Smuzhiyun * should be set up by clk-tegra, false if by the PHY code 27*4882a593Smuzhiyun * has_hostpc: true if the USB controller has the HOSTPC extension, which 28*4882a593Smuzhiyun * changes the location of the PHCD and PTS fields 29*4882a593Smuzhiyun * requires_usbmode_setup: true if the USBMODE register needs to be set to 30*4882a593Smuzhiyun * enter host mode 31*4882a593Smuzhiyun * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level 32*4882a593Smuzhiyun * and hsdiscon_level should be set for adequate signal quality 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct tegra_phy_soc_config { 36*4882a593Smuzhiyun bool utmi_pll_config_in_car_module; 37*4882a593Smuzhiyun bool has_hostpc; 38*4882a593Smuzhiyun bool requires_usbmode_setup; 39*4882a593Smuzhiyun bool requires_extra_tuning_parameters; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun struct tegra_utmip_config { 43*4882a593Smuzhiyun u8 hssync_start_delay; 44*4882a593Smuzhiyun u8 elastic_limit; 45*4882a593Smuzhiyun u8 idle_wait_delay; 46*4882a593Smuzhiyun u8 term_range_adj; 47*4882a593Smuzhiyun bool xcvr_setup_use_fuses; 48*4882a593Smuzhiyun u8 xcvr_setup; 49*4882a593Smuzhiyun u8 xcvr_lsfslew; 50*4882a593Smuzhiyun u8 xcvr_lsrslew; 51*4882a593Smuzhiyun u8 xcvr_hsslew; 52*4882a593Smuzhiyun u8 hssquelch_level; 53*4882a593Smuzhiyun u8 hsdiscon_level; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun enum tegra_usb_phy_port_speed { 57*4882a593Smuzhiyun TEGRA_USB_PHY_PORT_SPEED_FULL = 0, 58*4882a593Smuzhiyun TEGRA_USB_PHY_PORT_SPEED_LOW, 59*4882a593Smuzhiyun TEGRA_USB_PHY_PORT_SPEED_HIGH, 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun struct tegra_xtal_freq; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct tegra_usb_phy { 65*4882a593Smuzhiyun int instance; 66*4882a593Smuzhiyun const struct tegra_xtal_freq *freq; 67*4882a593Smuzhiyun void __iomem *regs; 68*4882a593Smuzhiyun void __iomem *pad_regs; 69*4882a593Smuzhiyun struct clk *clk; 70*4882a593Smuzhiyun struct clk *pll_u; 71*4882a593Smuzhiyun struct clk *pad_clk; 72*4882a593Smuzhiyun struct regulator *vbus; 73*4882a593Smuzhiyun enum usb_dr_mode mode; 74*4882a593Smuzhiyun void *config; 75*4882a593Smuzhiyun const struct tegra_phy_soc_config *soc_config; 76*4882a593Smuzhiyun struct usb_phy *ulpi; 77*4882a593Smuzhiyun struct usb_phy u_phy; 78*4882a593Smuzhiyun bool is_legacy_phy; 79*4882a593Smuzhiyun bool is_ulpi_phy; 80*4882a593Smuzhiyun struct gpio_desc *reset_gpio; 81*4882a593Smuzhiyun struct reset_control *pad_rst; 82*4882a593Smuzhiyun bool powered_on; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun void tegra_usb_phy_preresume(struct usb_phy *phy); 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun void tegra_usb_phy_postresume(struct usb_phy *phy); 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun void tegra_ehci_phy_restore_start(struct usb_phy *phy, 90*4882a593Smuzhiyun enum tegra_usb_phy_port_speed port_speed); 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun void tegra_ehci_phy_restore_end(struct usb_phy *phy); 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #endif /* __TEGRA_USB_PHY_H */ 95