1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Platform data for the chipidea USB dual role controller 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __LINUX_USB_CHIPIDEA_H 7*4882a593Smuzhiyun #define __LINUX_USB_CHIPIDEA_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/extcon.h> 10*4882a593Smuzhiyun #include <linux/usb/otg.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun struct ci_hdrc; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /** 15*4882a593Smuzhiyun * struct ci_hdrc_cable - structure for external connector cable state tracking 16*4882a593Smuzhiyun * @connected: true if cable is connected, false otherwise 17*4882a593Smuzhiyun * @changed: set to true when extcon event happen 18*4882a593Smuzhiyun * @enabled: set to true if we've enabled the vbus or id interrupt 19*4882a593Smuzhiyun * @edev: device which generate events 20*4882a593Smuzhiyun * @ci: driver state of the chipidea device 21*4882a593Smuzhiyun * @nb: hold event notification callback 22*4882a593Smuzhiyun * @conn: used for notification registration 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun struct ci_hdrc_cable { 25*4882a593Smuzhiyun bool connected; 26*4882a593Smuzhiyun bool changed; 27*4882a593Smuzhiyun bool enabled; 28*4882a593Smuzhiyun struct extcon_dev *edev; 29*4882a593Smuzhiyun struct ci_hdrc *ci; 30*4882a593Smuzhiyun struct notifier_block nb; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct ci_hdrc_platform_data { 34*4882a593Smuzhiyun const char *name; 35*4882a593Smuzhiyun /* offset of the capability registers */ 36*4882a593Smuzhiyun uintptr_t capoffset; 37*4882a593Smuzhiyun unsigned power_budget; 38*4882a593Smuzhiyun struct phy *phy; 39*4882a593Smuzhiyun /* old usb_phy interface */ 40*4882a593Smuzhiyun struct usb_phy *usb_phy; 41*4882a593Smuzhiyun enum usb_phy_interface phy_mode; 42*4882a593Smuzhiyun unsigned long flags; 43*4882a593Smuzhiyun #define CI_HDRC_REGS_SHARED BIT(0) 44*4882a593Smuzhiyun #define CI_HDRC_DISABLE_DEVICE_STREAMING BIT(1) 45*4882a593Smuzhiyun #define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2) 46*4882a593Smuzhiyun #define CI_HDRC_DISABLE_HOST_STREAMING BIT(3) 47*4882a593Smuzhiyun #define CI_HDRC_DISABLE_STREAMING (CI_HDRC_DISABLE_DEVICE_STREAMING | \ 48*4882a593Smuzhiyun CI_HDRC_DISABLE_HOST_STREAMING) 49*4882a593Smuzhiyun /* 50*4882a593Smuzhiyun * Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1, 51*4882a593Smuzhiyun * but otg is not supported (no register otgsc). 52*4882a593Smuzhiyun */ 53*4882a593Smuzhiyun #define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4) 54*4882a593Smuzhiyun #define CI_HDRC_IMX28_WRITE_FIX BIT(5) 55*4882a593Smuzhiyun #define CI_HDRC_FORCE_FULLSPEED BIT(6) 56*4882a593Smuzhiyun #define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7) 57*4882a593Smuzhiyun #define CI_HDRC_SET_NON_ZERO_TTHA BIT(8) 58*4882a593Smuzhiyun #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9) 59*4882a593Smuzhiyun #define CI_HDRC_OVERRIDE_TX_BURST BIT(10) 60*4882a593Smuzhiyun #define CI_HDRC_OVERRIDE_RX_BURST BIT(11) 61*4882a593Smuzhiyun #define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12) /* Glue layer manages phy */ 62*4882a593Smuzhiyun #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13) 63*4882a593Smuzhiyun #define CI_HDRC_IMX_IS_HSIC BIT(14) 64*4882a593Smuzhiyun #define CI_HDRC_PMQOS BIT(15) 65*4882a593Smuzhiyun enum usb_dr_mode dr_mode; 66*4882a593Smuzhiyun #define CI_HDRC_CONTROLLER_RESET_EVENT 0 67*4882a593Smuzhiyun #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 68*4882a593Smuzhiyun #define CI_HDRC_IMX_HSIC_ACTIVE_EVENT 2 69*4882a593Smuzhiyun #define CI_HDRC_IMX_HSIC_SUSPEND_EVENT 3 70*4882a593Smuzhiyun #define CI_HDRC_CONTROLLER_VBUS_EVENT 4 71*4882a593Smuzhiyun int (*notify_event) (struct ci_hdrc *ci, unsigned event); 72*4882a593Smuzhiyun struct regulator *reg_vbus; 73*4882a593Smuzhiyun struct usb_otg_caps ci_otg_caps; 74*4882a593Smuzhiyun bool tpl_support; 75*4882a593Smuzhiyun /* interrupt threshold setting */ 76*4882a593Smuzhiyun u32 itc_setting; 77*4882a593Smuzhiyun u32 ahb_burst_config; 78*4882a593Smuzhiyun u32 tx_burst_size; 79*4882a593Smuzhiyun u32 rx_burst_size; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* VBUS and ID signal state tracking, using extcon framework */ 82*4882a593Smuzhiyun struct ci_hdrc_cable vbus_extcon; 83*4882a593Smuzhiyun struct ci_hdrc_cable id_extcon; 84*4882a593Smuzhiyun u32 phy_clkgate_delay_us; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* pins */ 87*4882a593Smuzhiyun struct pinctrl *pctl; 88*4882a593Smuzhiyun struct pinctrl_state *pins_default; 89*4882a593Smuzhiyun struct pinctrl_state *pins_host; 90*4882a593Smuzhiyun struct pinctrl_state *pins_device; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Default offset of capability registers */ 94*4882a593Smuzhiyun #define DEF_CAPOFFSET 0x100 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* Add ci hdrc device */ 97*4882a593Smuzhiyun struct platform_device *ci_hdrc_add_device(struct device *dev, 98*4882a593Smuzhiyun struct resource *res, int nres, 99*4882a593Smuzhiyun struct ci_hdrc_platform_data *platdata); 100*4882a593Smuzhiyun /* Remove ci hdrc device */ 101*4882a593Smuzhiyun void ci_hdrc_remove_device(struct platform_device *pdev); 102*4882a593Smuzhiyun /* Get current available role */ 103*4882a593Smuzhiyun enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev); 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #endif 106