1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2018 Vincent Pelletier 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef __CCID_H 8*4882a593Smuzhiyun #define __CCID_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define USB_INTERFACE_CLASS_CCID 0x0b 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun struct ccid_descriptor { 15*4882a593Smuzhiyun __u8 bLength; 16*4882a593Smuzhiyun __u8 bDescriptorType; 17*4882a593Smuzhiyun __le16 bcdCCID; 18*4882a593Smuzhiyun __u8 bMaxSlotIndex; 19*4882a593Smuzhiyun __u8 bVoltageSupport; 20*4882a593Smuzhiyun __le32 dwProtocols; 21*4882a593Smuzhiyun __le32 dwDefaultClock; 22*4882a593Smuzhiyun __le32 dwMaximumClock; 23*4882a593Smuzhiyun __u8 bNumClockSupported; 24*4882a593Smuzhiyun __le32 dwDataRate; 25*4882a593Smuzhiyun __le32 dwMaxDataRate; 26*4882a593Smuzhiyun __u8 bNumDataRatesSupported; 27*4882a593Smuzhiyun __le32 dwMaxIFSD; 28*4882a593Smuzhiyun __le32 dwSynchProtocols; 29*4882a593Smuzhiyun __le32 dwMechanical; 30*4882a593Smuzhiyun __le32 dwFeatures; 31*4882a593Smuzhiyun __le32 dwMaxCCIDMessageLength; 32*4882a593Smuzhiyun __u8 bClassGetResponse; 33*4882a593Smuzhiyun __u8 bClassEnvelope; 34*4882a593Smuzhiyun __le16 wLcdLayout; 35*4882a593Smuzhiyun __u8 bPINSupport; 36*4882a593Smuzhiyun __u8 bMaxCCIDBusySlots; 37*4882a593Smuzhiyun } __attribute__ ((packed)); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif /* __CCID_H */ 40