1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __QCOM_SMD_RPM_H__ 3*4882a593Smuzhiyun #define __QCOM_SMD_RPM_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun struct qcom_smd_rpm; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define QCOM_SMD_RPM_ACTIVE_STATE 0 8*4882a593Smuzhiyun #define QCOM_SMD_RPM_SLEEP_STATE 1 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* 11*4882a593Smuzhiyun * Constants used for addressing resources in the RPM. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun #define QCOM_SMD_RPM_BBYB 0x62796262 14*4882a593Smuzhiyun #define QCOM_SMD_RPM_BOBB 0x62626f62 15*4882a593Smuzhiyun #define QCOM_SMD_RPM_BOOST 0x61747362 16*4882a593Smuzhiyun #define QCOM_SMD_RPM_BUS_CLK 0x316b6c63 17*4882a593Smuzhiyun #define QCOM_SMD_RPM_BUS_MASTER 0x73616d62 18*4882a593Smuzhiyun #define QCOM_SMD_RPM_BUS_SLAVE 0x766c7362 19*4882a593Smuzhiyun #define QCOM_SMD_RPM_CLK_BUF_A 0x616B6C63 20*4882a593Smuzhiyun #define QCOM_SMD_RPM_LDOA 0x616f646c 21*4882a593Smuzhiyun #define QCOM_SMD_RPM_LDOB 0x626F646C 22*4882a593Smuzhiyun #define QCOM_SMD_RPM_RWCX 0x78637772 23*4882a593Smuzhiyun #define QCOM_SMD_RPM_RWMX 0x786d7772 24*4882a593Smuzhiyun #define QCOM_SMD_RPM_RWLC 0x636c7772 25*4882a593Smuzhiyun #define QCOM_SMD_RPM_RWLM 0x6d6c7772 26*4882a593Smuzhiyun #define QCOM_SMD_RPM_MEM_CLK 0x326b6c63 27*4882a593Smuzhiyun #define QCOM_SMD_RPM_MISC_CLK 0x306b6c63 28*4882a593Smuzhiyun #define QCOM_SMD_RPM_NCPA 0x6170636E 29*4882a593Smuzhiyun #define QCOM_SMD_RPM_NCPB 0x6270636E 30*4882a593Smuzhiyun #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f 31*4882a593Smuzhiyun #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 32*4882a593Smuzhiyun #define QCOM_SMD_RPM_SMPA 0x61706d73 33*4882a593Smuzhiyun #define QCOM_SMD_RPM_SMPB 0x62706d73 34*4882a593Smuzhiyun #define QCOM_SMD_RPM_SPDM 0x63707362 35*4882a593Smuzhiyun #define QCOM_SMD_RPM_VSA 0x00617376 36*4882a593Smuzhiyun #define QCOM_SMD_RPM_MMAXI_CLK 0x69786d6d 37*4882a593Smuzhiyun #define QCOM_SMD_RPM_IPA_CLK 0x617069 38*4882a593Smuzhiyun #define QCOM_SMD_RPM_CE_CLK 0x6563 39*4882a593Smuzhiyun #define QCOM_SMD_RPM_AGGR_CLK 0x72676761 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, 42*4882a593Smuzhiyun int state, 43*4882a593Smuzhiyun u32 resource_type, u32 resource_id, 44*4882a593Smuzhiyun void *buf, size_t count); 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif 47