1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * tps51632-regulator.h -- TPS51632 regulator 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Interface for regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down 6*4882a593Smuzhiyun * Driverless Controller with serial VID control and DVFS. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2012 NVIDIA Corporation 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun * Author: Laxman Dewangan <ldewangan@nvidia.com> 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef __LINUX_REGULATOR_TPS51632_H 14*4882a593Smuzhiyun #define __LINUX_REGULATOR_TPS51632_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * struct tps51632_regulator_platform_data - tps51632 regulator platform data. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * @reg_init_data: The regulator init data. 20*4882a593Smuzhiyun * @enable_pwm_dvfs: Enable PWM DVFS or not. 21*4882a593Smuzhiyun * @dvfs_step_20mV: Step for DVFS is 20mV or 10mV. 22*4882a593Smuzhiyun * @max_voltage_uV: Maximum possible voltage in PWM-DVFS mode. 23*4882a593Smuzhiyun * @base_voltage_uV: Base voltage when PWM-DVFS enabled. 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun struct tps51632_regulator_platform_data { 26*4882a593Smuzhiyun struct regulator_init_data *reg_init_data; 27*4882a593Smuzhiyun bool enable_pwm_dvfs; 28*4882a593Smuzhiyun bool dvfs_step_20mV; 29*4882a593Smuzhiyun int max_voltage_uV; 30*4882a593Smuzhiyun int base_voltage_uV; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #endif /* __LINUX_REGULATOR_TPS51632_H */ 34