1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2016 MediaTek Inc. 4*4882a593Smuzhiyun * Author: Chen Zhong <chen.zhong@mediatek.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __LINUX_REGULATOR_MT6323_H 8*4882a593Smuzhiyun #define __LINUX_REGULATOR_MT6323_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun enum { 11*4882a593Smuzhiyun MT6323_ID_VPROC = 0, 12*4882a593Smuzhiyun MT6323_ID_VSYS, 13*4882a593Smuzhiyun MT6323_ID_VPA, 14*4882a593Smuzhiyun MT6323_ID_VTCXO, 15*4882a593Smuzhiyun MT6323_ID_VCN28, 16*4882a593Smuzhiyun MT6323_ID_VCN33_BT, 17*4882a593Smuzhiyun MT6323_ID_VCN33_WIFI, 18*4882a593Smuzhiyun MT6323_ID_VA, 19*4882a593Smuzhiyun MT6323_ID_VCAMA, 20*4882a593Smuzhiyun MT6323_ID_VIO28 = 9, 21*4882a593Smuzhiyun MT6323_ID_VUSB, 22*4882a593Smuzhiyun MT6323_ID_VMC, 23*4882a593Smuzhiyun MT6323_ID_VMCH, 24*4882a593Smuzhiyun MT6323_ID_VEMC3V3, 25*4882a593Smuzhiyun MT6323_ID_VGP1, 26*4882a593Smuzhiyun MT6323_ID_VGP2, 27*4882a593Smuzhiyun MT6323_ID_VGP3, 28*4882a593Smuzhiyun MT6323_ID_VCN18, 29*4882a593Smuzhiyun MT6323_ID_VSIM1, 30*4882a593Smuzhiyun MT6323_ID_VSIM2, 31*4882a593Smuzhiyun MT6323_ID_VRTC, 32*4882a593Smuzhiyun MT6323_ID_VCAMAF, 33*4882a593Smuzhiyun MT6323_ID_VIBR, 34*4882a593Smuzhiyun MT6323_ID_VRF18, 35*4882a593Smuzhiyun MT6323_ID_VM, 36*4882a593Smuzhiyun MT6323_ID_VIO18, 37*4882a593Smuzhiyun MT6323_ID_VCAMD, 38*4882a593Smuzhiyun MT6323_ID_VCAMIO, 39*4882a593Smuzhiyun MT6323_ID_RG_MAX, 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define MT6323_MAX_REGULATOR MT6323_ID_RG_MAX 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #endif /* __LINUX_REGULATOR_MT6323_H */ 45