1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2012 Texas Instruments 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __LP872X_REGULATOR_H__ 9*4882a593Smuzhiyun #define __LP872X_REGULATOR_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/regulator/machine.h> 12*4882a593Smuzhiyun #include <linux/platform_device.h> 13*4882a593Smuzhiyun #include <linux/gpio.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define LP872X_MAX_REGULATORS 9 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define LP8720_ENABLE_DELAY 200 18*4882a593Smuzhiyun #define LP8725_ENABLE_DELAY 30000 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun enum lp872x_regulator_id { 21*4882a593Smuzhiyun LP8720_ID_BASE, 22*4882a593Smuzhiyun LP8720_ID_LDO1 = LP8720_ID_BASE, 23*4882a593Smuzhiyun LP8720_ID_LDO2, 24*4882a593Smuzhiyun LP8720_ID_LDO3, 25*4882a593Smuzhiyun LP8720_ID_LDO4, 26*4882a593Smuzhiyun LP8720_ID_LDO5, 27*4882a593Smuzhiyun LP8720_ID_BUCK, 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun LP8725_ID_BASE, 30*4882a593Smuzhiyun LP8725_ID_LDO1 = LP8725_ID_BASE, 31*4882a593Smuzhiyun LP8725_ID_LDO2, 32*4882a593Smuzhiyun LP8725_ID_LDO3, 33*4882a593Smuzhiyun LP8725_ID_LDO4, 34*4882a593Smuzhiyun LP8725_ID_LDO5, 35*4882a593Smuzhiyun LP8725_ID_LILO1, 36*4882a593Smuzhiyun LP8725_ID_LILO2, 37*4882a593Smuzhiyun LP8725_ID_BUCK1, 38*4882a593Smuzhiyun LP8725_ID_BUCK2, 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun LP872X_ID_MAX, 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun enum lp872x_dvs_state { 44*4882a593Smuzhiyun DVS_LOW = GPIOF_OUT_INIT_LOW, 45*4882a593Smuzhiyun DVS_HIGH = GPIOF_OUT_INIT_HIGH, 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun enum lp872x_dvs_sel { 49*4882a593Smuzhiyun SEL_V1, 50*4882a593Smuzhiyun SEL_V2, 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /** 54*4882a593Smuzhiyun * lp872x_dvs 55*4882a593Smuzhiyun * @gpio : gpio pin number for dvs control 56*4882a593Smuzhiyun * @vsel : dvs selector for buck v1 or buck v2 register 57*4882a593Smuzhiyun * @init_state : initial dvs pin state 58*4882a593Smuzhiyun */ 59*4882a593Smuzhiyun struct lp872x_dvs { 60*4882a593Smuzhiyun int gpio; 61*4882a593Smuzhiyun enum lp872x_dvs_sel vsel; 62*4882a593Smuzhiyun enum lp872x_dvs_state init_state; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /** 66*4882a593Smuzhiyun * lp872x_regdata 67*4882a593Smuzhiyun * @id : regulator id 68*4882a593Smuzhiyun * @init_data : init data for each regulator 69*4882a593Smuzhiyun */ 70*4882a593Smuzhiyun struct lp872x_regulator_data { 71*4882a593Smuzhiyun enum lp872x_regulator_id id; 72*4882a593Smuzhiyun struct regulator_init_data *init_data; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /** 76*4882a593Smuzhiyun * lp872x_platform_data 77*4882a593Smuzhiyun * @general_config : the value of LP872X_GENERAL_CFG register 78*4882a593Smuzhiyun * @update_config : if LP872X_GENERAL_CFG register is updated, set true 79*4882a593Smuzhiyun * @regulator_data : platform regulator id and init data 80*4882a593Smuzhiyun * @dvs : dvs data for buck voltage control 81*4882a593Smuzhiyun * @enable_gpio : gpio pin number for enable control 82*4882a593Smuzhiyun */ 83*4882a593Smuzhiyun struct lp872x_platform_data { 84*4882a593Smuzhiyun u8 general_config; 85*4882a593Smuzhiyun bool update_config; 86*4882a593Smuzhiyun struct lp872x_regulator_data regulator_data[LP872X_MAX_REGULATORS]; 87*4882a593Smuzhiyun struct lp872x_dvs *dvs; 88*4882a593Smuzhiyun int enable_gpio; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #endif 92