xref: /OK3568_Linux_fs/kernel/include/linux/power/max17042_battery.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Fuel gauge driver for Maxim 17042 / 8966 / 8997
4*4882a593Smuzhiyun  *  Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2011 Samsung Electronics
7*4882a593Smuzhiyun  * MyungJoo Ham <myungjoo.ham@samsung.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef __MAX17042_BATTERY_H_
11*4882a593Smuzhiyun #define __MAX17042_BATTERY_H_
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define MAX17042_STATUS_BattAbsent	(1 << 3)
14*4882a593Smuzhiyun #define MAX17042_BATTERY_FULL		(95)   /* Recommend. FullSOCThr value */
15*4882a593Smuzhiyun #define MAX17042_DEFAULT_SNS_RESISTOR	(10000)
16*4882a593Smuzhiyun #define MAX17042_DEFAULT_VMIN		(3000)
17*4882a593Smuzhiyun #define MAX17042_DEFAULT_VMAX		(4500) /* LiHV cell max */
18*4882a593Smuzhiyun #define MAX17042_DEFAULT_TEMP_MIN	(0)    /* For sys without temp sensor */
19*4882a593Smuzhiyun #define MAX17042_DEFAULT_TEMP_MAX	(700)  /* 70 degrees Celcius */
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* Consider RepCap which is less then 10 units below FullCAP full */
22*4882a593Smuzhiyun #define MAX17042_FULL_THRESHOLD		10
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define MAX17042_CHARACTERIZATION_DATA_SIZE 48
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun enum max17042_register {
27*4882a593Smuzhiyun 	MAX17042_STATUS		= 0x00,
28*4882a593Smuzhiyun 	MAX17042_VALRT_Th	= 0x01,
29*4882a593Smuzhiyun 	MAX17042_TALRT_Th	= 0x02,
30*4882a593Smuzhiyun 	MAX17042_SALRT_Th	= 0x03,
31*4882a593Smuzhiyun 	MAX17042_AtRate		= 0x04,
32*4882a593Smuzhiyun 	MAX17042_RepCap		= 0x05,
33*4882a593Smuzhiyun 	MAX17042_RepSOC		= 0x06,
34*4882a593Smuzhiyun 	MAX17042_Age		= 0x07,
35*4882a593Smuzhiyun 	MAX17042_TEMP		= 0x08,
36*4882a593Smuzhiyun 	MAX17042_VCELL		= 0x09,
37*4882a593Smuzhiyun 	MAX17042_Current	= 0x0A,
38*4882a593Smuzhiyun 	MAX17042_AvgCurrent	= 0x0B,
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	MAX17042_SOC		= 0x0D,
41*4882a593Smuzhiyun 	MAX17042_AvSOC		= 0x0E,
42*4882a593Smuzhiyun 	MAX17042_RemCap		= 0x0F,
43*4882a593Smuzhiyun 	MAX17042_FullCAP	= 0x10,
44*4882a593Smuzhiyun 	MAX17042_TTE		= 0x11,
45*4882a593Smuzhiyun 	MAX17042_V_empty	= 0x12,
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	MAX17042_RSLOW		= 0x14,
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	MAX17042_AvgTA		= 0x16,
50*4882a593Smuzhiyun 	MAX17042_Cycles		= 0x17,
51*4882a593Smuzhiyun 	MAX17042_DesignCap	= 0x18,
52*4882a593Smuzhiyun 	MAX17042_AvgVCELL	= 0x19,
53*4882a593Smuzhiyun 	MAX17042_MinMaxTemp	= 0x1A,
54*4882a593Smuzhiyun 	MAX17042_MinMaxVolt	= 0x1B,
55*4882a593Smuzhiyun 	MAX17042_MinMaxCurr	= 0x1C,
56*4882a593Smuzhiyun 	MAX17042_CONFIG		= 0x1D,
57*4882a593Smuzhiyun 	MAX17042_ICHGTerm	= 0x1E,
58*4882a593Smuzhiyun 	MAX17042_AvCap		= 0x1F,
59*4882a593Smuzhiyun 	MAX17042_ManName	= 0x20,
60*4882a593Smuzhiyun 	MAX17042_DevName	= 0x21,
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	MAX17042_FullCAPNom	= 0x23,
63*4882a593Smuzhiyun 	MAX17042_TempNom	= 0x24,
64*4882a593Smuzhiyun 	MAX17042_TempLim	= 0x25,
65*4882a593Smuzhiyun 	MAX17042_TempHot	= 0x26,
66*4882a593Smuzhiyun 	MAX17042_AIN		= 0x27,
67*4882a593Smuzhiyun 	MAX17042_LearnCFG	= 0x28,
68*4882a593Smuzhiyun 	MAX17042_FilterCFG	= 0x29,
69*4882a593Smuzhiyun 	MAX17042_RelaxCFG	= 0x2A,
70*4882a593Smuzhiyun 	MAX17042_MiscCFG	= 0x2B,
71*4882a593Smuzhiyun 	MAX17042_TGAIN		= 0x2C,
72*4882a593Smuzhiyun 	MAX17042_TOFF		= 0x2D,
73*4882a593Smuzhiyun 	MAX17042_CGAIN		= 0x2E,
74*4882a593Smuzhiyun 	MAX17042_COFF		= 0x2F,
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	MAX17042_MaskSOC	= 0x32,
77*4882a593Smuzhiyun 	MAX17042_SOC_empty	= 0x33,
78*4882a593Smuzhiyun 	MAX17042_T_empty	= 0x34,
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	MAX17042_FullCAP0       = 0x35,
81*4882a593Smuzhiyun 	MAX17042_LAvg_empty	= 0x36,
82*4882a593Smuzhiyun 	MAX17042_FCTC		= 0x37,
83*4882a593Smuzhiyun 	MAX17042_RCOMP0		= 0x38,
84*4882a593Smuzhiyun 	MAX17042_TempCo		= 0x39,
85*4882a593Smuzhiyun 	MAX17042_EmptyTempCo	= 0x3A,
86*4882a593Smuzhiyun 	MAX17042_K_empty0	= 0x3B,
87*4882a593Smuzhiyun 	MAX17042_TaskPeriod	= 0x3C,
88*4882a593Smuzhiyun 	MAX17042_FSTAT		= 0x3D,
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	MAX17042_SHDNTIMER	= 0x3F,
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	MAX17042_dQacc		= 0x45,
93*4882a593Smuzhiyun 	MAX17042_dPacc		= 0x46,
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	MAX17042_VFSOC0		= 0x48,
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	MAX17042_QH		= 0x4D,
98*4882a593Smuzhiyun 	MAX17042_QL		= 0x4E,
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	MAX17042_VFSOC0Enable	= 0x60,
101*4882a593Smuzhiyun 	MAX17042_MLOCKReg1	= 0x62,
102*4882a593Smuzhiyun 	MAX17042_MLOCKReg2	= 0x63,
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	MAX17042_MODELChrTbl	= 0x80,
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	MAX17042_OCV		= 0xEE,
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	MAX17042_OCVInternal	= 0xFB,  /* MAX17055 VFOCV */
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	MAX17042_VFSOC		= 0xFF,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun enum max17055_register {
114*4882a593Smuzhiyun 	MAX17055_QRes		= 0x0C,
115*4882a593Smuzhiyun 	MAX17055_TTF		= 0x20,
116*4882a593Smuzhiyun 	MAX17055_V_empty	= 0x3A,
117*4882a593Smuzhiyun 	MAX17055_TIMER		= 0x3E,
118*4882a593Smuzhiyun 	MAX17055_USER_MEM	= 0x40,
119*4882a593Smuzhiyun 	MAX17055_RGAIN		= 0x42,
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	MAX17055_ConvgCfg	= 0x49,
122*4882a593Smuzhiyun 	MAX17055_VFRemCap	= 0x4A,
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	MAX17055_STATUS2	= 0xB0,
125*4882a593Smuzhiyun 	MAX17055_POWER		= 0xB1,
126*4882a593Smuzhiyun 	MAX17055_ID		= 0xB2,
127*4882a593Smuzhiyun 	MAX17055_AvgPower	= 0xB3,
128*4882a593Smuzhiyun 	MAX17055_IAlrtTh	= 0xB4,
129*4882a593Smuzhiyun 	MAX17055_TTFCfg		= 0xB5,
130*4882a593Smuzhiyun 	MAX17055_CVMixCap	= 0xB6,
131*4882a593Smuzhiyun 	MAX17055_CVHalfTime	= 0xB7,
132*4882a593Smuzhiyun 	MAX17055_CGTempCo	= 0xB8,
133*4882a593Smuzhiyun 	MAX17055_Curve		= 0xB9,
134*4882a593Smuzhiyun 	MAX17055_HibCfg		= 0xBA,
135*4882a593Smuzhiyun 	MAX17055_Config2	= 0xBB,
136*4882a593Smuzhiyun 	MAX17055_VRipple	= 0xBC,
137*4882a593Smuzhiyun 	MAX17055_RippleCfg	= 0xBD,
138*4882a593Smuzhiyun 	MAX17055_TimerH		= 0xBE,
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	MAX17055_RSense		= 0xD0,
141*4882a593Smuzhiyun 	MAX17055_ScOcvLim	= 0xD1,
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	MAX17055_SOCHold	= 0xD3,
144*4882a593Smuzhiyun 	MAX17055_MaxPeakPwr	= 0xD4,
145*4882a593Smuzhiyun 	MAX17055_SusPeakPwr	= 0xD5,
146*4882a593Smuzhiyun 	MAX17055_PackResistance	= 0xD6,
147*4882a593Smuzhiyun 	MAX17055_SysResistance	= 0xD7,
148*4882a593Smuzhiyun 	MAX17055_MinSysV	= 0xD8,
149*4882a593Smuzhiyun 	MAX17055_MPPCurrent	= 0xD9,
150*4882a593Smuzhiyun 	MAX17055_SPPCurrent	= 0xDA,
151*4882a593Smuzhiyun 	MAX17055_ModelCfg	= 0xDB,
152*4882a593Smuzhiyun 	MAX17055_AtQResidual	= 0xDC,
153*4882a593Smuzhiyun 	MAX17055_AtTTE		= 0xDD,
154*4882a593Smuzhiyun 	MAX17055_AtAvSOC	= 0xDE,
155*4882a593Smuzhiyun 	MAX17055_AtAvCap	= 0xDF,
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /* Registers specific to max17047/50 */
159*4882a593Smuzhiyun enum max17047_register {
160*4882a593Smuzhiyun 	MAX17047_QRTbl00	= 0x12,
161*4882a593Smuzhiyun 	MAX17047_FullSOCThr	= 0x13,
162*4882a593Smuzhiyun 	MAX17047_QRTbl10	= 0x22,
163*4882a593Smuzhiyun 	MAX17047_QRTbl20	= 0x32,
164*4882a593Smuzhiyun 	MAX17047_V_empty	= 0x3A,
165*4882a593Smuzhiyun 	MAX17047_QRTbl30	= 0x42,
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun enum max170xx_chip_type {
169*4882a593Smuzhiyun 	MAXIM_DEVICE_TYPE_UNKNOWN	= 0,
170*4882a593Smuzhiyun 	MAXIM_DEVICE_TYPE_MAX17042,
171*4882a593Smuzhiyun 	MAXIM_DEVICE_TYPE_MAX17047,
172*4882a593Smuzhiyun 	MAXIM_DEVICE_TYPE_MAX17050,
173*4882a593Smuzhiyun 	MAXIM_DEVICE_TYPE_MAX17055,
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	MAXIM_DEVICE_TYPE_NUM
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun /*
179*4882a593Smuzhiyun  * used for setting a register to a desired value
180*4882a593Smuzhiyun  * addr : address for a register
181*4882a593Smuzhiyun  * data : setting value for the register
182*4882a593Smuzhiyun  */
183*4882a593Smuzhiyun struct max17042_reg_data {
184*4882a593Smuzhiyun 	u8 addr;
185*4882a593Smuzhiyun 	u16 data;
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun struct max17042_config_data {
189*4882a593Smuzhiyun 	/* External current sense resistor value in milli-ohms */
190*4882a593Smuzhiyun 	u32	cur_sense_val;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	/* A/D measurement */
193*4882a593Smuzhiyun 	u16	tgain;		/* 0x2C */
194*4882a593Smuzhiyun 	u16	toff;		/* 0x2D */
195*4882a593Smuzhiyun 	u16	cgain;		/* 0x2E */
196*4882a593Smuzhiyun 	u16	coff;		/* 0x2F */
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	/* Alert / Status */
199*4882a593Smuzhiyun 	u16	valrt_thresh;	/* 0x01 */
200*4882a593Smuzhiyun 	u16	talrt_thresh;	/* 0x02 */
201*4882a593Smuzhiyun 	u16	soc_alrt_thresh;	/* 0x03 */
202*4882a593Smuzhiyun 	u16	config;		/* 0x01D */
203*4882a593Smuzhiyun 	u16	shdntimer;	/* 0x03F */
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	/* App data */
206*4882a593Smuzhiyun 	u16	full_soc_thresh;	/* 0x13 */
207*4882a593Smuzhiyun 	u16	design_cap;	/* 0x18 */
208*4882a593Smuzhiyun 	u16	ichgt_term;	/* 0x1E */
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	/* MG3 config */
211*4882a593Smuzhiyun 	u16	at_rate;	/* 0x04 */
212*4882a593Smuzhiyun 	u16	learn_cfg;	/* 0x28 */
213*4882a593Smuzhiyun 	u16	filter_cfg;	/* 0x29 */
214*4882a593Smuzhiyun 	u16	relax_cfg;	/* 0x2A */
215*4882a593Smuzhiyun 	u16	misc_cfg;	/* 0x2B */
216*4882a593Smuzhiyun 	u16	masksoc;	/* 0x32 */
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	/* MG3 save and restore */
219*4882a593Smuzhiyun 	u16	fullcap;	/* 0x10 */
220*4882a593Smuzhiyun 	u16	fullcapnom;	/* 0x23 */
221*4882a593Smuzhiyun 	u16	socempty;	/* 0x33 */
222*4882a593Smuzhiyun 	u16	lavg_empty;	/* 0x36 */
223*4882a593Smuzhiyun 	u16	dqacc;		/* 0x45 */
224*4882a593Smuzhiyun 	u16	dpacc;		/* 0x46 */
225*4882a593Smuzhiyun 	u16	qrtbl00;	/* 0x12 */
226*4882a593Smuzhiyun 	u16	qrtbl10;	/* 0x22 */
227*4882a593Smuzhiyun 	u16	qrtbl20;	/* 0x32 */
228*4882a593Smuzhiyun 	u16	qrtbl30;	/* 0x42 */
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	/* Cell technology from power_supply.h */
231*4882a593Smuzhiyun 	u16	cell_technology;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	/* Cell Data */
234*4882a593Smuzhiyun 	u16	vempty;		/* 0x12 */
235*4882a593Smuzhiyun 	u16	temp_nom;	/* 0x24 */
236*4882a593Smuzhiyun 	u16	temp_lim;	/* 0x25 */
237*4882a593Smuzhiyun 	u16	fctc;		/* 0x37 */
238*4882a593Smuzhiyun 	u16	rcomp0;		/* 0x38 */
239*4882a593Smuzhiyun 	u16	tcompc0;	/* 0x39 */
240*4882a593Smuzhiyun 	u16	empty_tempco;	/* 0x3A */
241*4882a593Smuzhiyun 	u16	kempty0;	/* 0x3B */
242*4882a593Smuzhiyun 	u16	cell_char_tbl[MAX17042_CHARACTERIZATION_DATA_SIZE];
243*4882a593Smuzhiyun } __packed;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun struct max17042_platform_data {
246*4882a593Smuzhiyun 	struct max17042_reg_data *init_data;
247*4882a593Smuzhiyun 	struct max17042_config_data *config_data;
248*4882a593Smuzhiyun 	int num_init_data; /* Number of enties in init_data array */
249*4882a593Smuzhiyun 	bool enable_current_sense;
250*4882a593Smuzhiyun 	bool enable_por_init; /* Use POR init from Maxim appnote */
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	/*
253*4882a593Smuzhiyun 	 * R_sns in micro-ohms.
254*4882a593Smuzhiyun 	 * default 10000 (if r_sns = 0) as it is the recommended value by
255*4882a593Smuzhiyun 	 * the datasheet although it can be changed by board designers.
256*4882a593Smuzhiyun 	 */
257*4882a593Smuzhiyun 	unsigned int r_sns;
258*4882a593Smuzhiyun 	int         vmin;	/* in millivolts */
259*4882a593Smuzhiyun 	int         vmax;	/* in millivolts */
260*4882a593Smuzhiyun 	int         temp_min;	/* in tenths of degree Celsius */
261*4882a593Smuzhiyun 	int         temp_max;	/* in tenths of degree Celsius */
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun #endif /* __MAX17042_BATTERY_H_ */
265