1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __LINUX_BQ27X00_BATTERY_H__ 3*4882a593Smuzhiyun #define __LINUX_BQ27X00_BATTERY_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun enum bq27xxx_chip { 6*4882a593Smuzhiyun BQ27000 = 1, /* bq27000, bq27200 */ 7*4882a593Smuzhiyun BQ27010, /* bq27010, bq27210 */ 8*4882a593Smuzhiyun BQ2750X, /* bq27500 deprecated alias */ 9*4882a593Smuzhiyun BQ2751X, /* bq27510, bq27520 deprecated alias */ 10*4882a593Smuzhiyun BQ2752X, 11*4882a593Smuzhiyun BQ27500, /* bq27500/1 */ 12*4882a593Smuzhiyun BQ27510G1, /* bq27510G1 */ 13*4882a593Smuzhiyun BQ27510G2, /* bq27510G2 */ 14*4882a593Smuzhiyun BQ27510G3, /* bq27510G3 */ 15*4882a593Smuzhiyun BQ27520G1, /* bq27520G1 */ 16*4882a593Smuzhiyun BQ27520G2, /* bq27520G2 */ 17*4882a593Smuzhiyun BQ27520G3, /* bq27520G3 */ 18*4882a593Smuzhiyun BQ27520G4, /* bq27520G4 */ 19*4882a593Smuzhiyun BQ27521, /* bq27521 */ 20*4882a593Smuzhiyun BQ27530, /* bq27530, bq27531 */ 21*4882a593Smuzhiyun BQ27531, 22*4882a593Smuzhiyun BQ27541, /* bq27541, bq27542, bq27546, bq27742 */ 23*4882a593Smuzhiyun BQ27542, 24*4882a593Smuzhiyun BQ27546, 25*4882a593Smuzhiyun BQ27742, 26*4882a593Smuzhiyun BQ27545, /* bq27545 */ 27*4882a593Smuzhiyun BQ27411, 28*4882a593Smuzhiyun BQ27421, /* bq27421, bq27441, bq27621 */ 29*4882a593Smuzhiyun BQ27425, 30*4882a593Smuzhiyun BQ27426, 31*4882a593Smuzhiyun BQ27441, 32*4882a593Smuzhiyun BQ27621, 33*4882a593Smuzhiyun BQ27Z561, 34*4882a593Smuzhiyun BQ28Z610, 35*4882a593Smuzhiyun BQ34Z100, 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun struct bq27xxx_device_info; 39*4882a593Smuzhiyun struct bq27xxx_access_methods { 40*4882a593Smuzhiyun int (*read)(struct bq27xxx_device_info *di, u8 reg, bool single); 41*4882a593Smuzhiyun int (*write)(struct bq27xxx_device_info *di, u8 reg, int value, bool single); 42*4882a593Smuzhiyun int (*read_bulk)(struct bq27xxx_device_info *di, u8 reg, u8 *data, int len); 43*4882a593Smuzhiyun int (*write_bulk)(struct bq27xxx_device_info *di, u8 reg, u8 *data, int len); 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun struct bq27xxx_reg_cache { 47*4882a593Smuzhiyun int temperature; 48*4882a593Smuzhiyun int time_to_empty; 49*4882a593Smuzhiyun int time_to_empty_avg; 50*4882a593Smuzhiyun int time_to_full; 51*4882a593Smuzhiyun int charge_full; 52*4882a593Smuzhiyun int cycle_count; 53*4882a593Smuzhiyun int capacity; 54*4882a593Smuzhiyun int energy; 55*4882a593Smuzhiyun int flags; 56*4882a593Smuzhiyun int health; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun struct bq27xxx_device_info { 60*4882a593Smuzhiyun struct device *dev; 61*4882a593Smuzhiyun int id; 62*4882a593Smuzhiyun enum bq27xxx_chip chip; 63*4882a593Smuzhiyun u32 opts; 64*4882a593Smuzhiyun const char *name; 65*4882a593Smuzhiyun struct bq27xxx_dm_reg *dm_regs; 66*4882a593Smuzhiyun u32 unseal_key; 67*4882a593Smuzhiyun struct bq27xxx_access_methods bus; 68*4882a593Smuzhiyun struct bq27xxx_reg_cache cache; 69*4882a593Smuzhiyun int charge_design_full; 70*4882a593Smuzhiyun unsigned long last_update; 71*4882a593Smuzhiyun struct delayed_work work; 72*4882a593Smuzhiyun struct power_supply *bat; 73*4882a593Smuzhiyun struct list_head list; 74*4882a593Smuzhiyun struct mutex lock; 75*4882a593Smuzhiyun u8 *regs; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun void bq27xxx_battery_update(struct bq27xxx_device_info *di); 79*4882a593Smuzhiyun int bq27xxx_battery_setup(struct bq27xxx_device_info *di); 80*4882a593Smuzhiyun void bq27xxx_battery_teardown(struct bq27xxx_device_info *di); 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #endif 83