1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * shmob_drm.h -- SH Mobile DRM driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2012 Renesas Corporation 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Laurent Pinchart (laurent.pinchart@ideasonboard.com) 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __SHMOB_DRM_H__ 11*4882a593Smuzhiyun #define __SHMOB_DRM_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/kernel.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <drm/drm_mode.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun enum shmob_drm_clk_source { 18*4882a593Smuzhiyun SHMOB_DRM_CLK_BUS, 19*4882a593Smuzhiyun SHMOB_DRM_CLK_PERIPHERAL, 20*4882a593Smuzhiyun SHMOB_DRM_CLK_EXTERNAL, 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun enum shmob_drm_interface { 24*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */ 25*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */ 26*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */ 27*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB12B, /* 12bpp */ 28*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB16, /* 16bpp */ 29*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB18, /* 18bpp */ 30*4882a593Smuzhiyun SHMOB_DRM_IFACE_RGB24, /* 24bpp */ 31*4882a593Smuzhiyun SHMOB_DRM_IFACE_YUV422, /* 16bpp */ 32*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */ 33*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */ 34*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS8C, /* 18bpp, 2:8:8 */ 35*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS8D, /* 16bpp, 8:8 */ 36*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */ 37*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */ 38*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS16A, /* 16bpp */ 39*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS16B, /* 18bpp, 16:2 */ 40*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS16C, /* 18bpp, 2:16 */ 41*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS18, /* 18bpp */ 42*4882a593Smuzhiyun SHMOB_DRM_IFACE_SYS24, /* 24bpp */ 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun struct shmob_drm_backlight_data { 46*4882a593Smuzhiyun const char *name; 47*4882a593Smuzhiyun int max_brightness; 48*4882a593Smuzhiyun int (*get_brightness)(void); 49*4882a593Smuzhiyun int (*set_brightness)(int brightness); 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun struct shmob_drm_panel_data { 53*4882a593Smuzhiyun unsigned int width_mm; /* Panel width in mm */ 54*4882a593Smuzhiyun unsigned int height_mm; /* Panel height in mm */ 55*4882a593Smuzhiyun struct drm_mode_modeinfo mode; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct shmob_drm_sys_interface_data { 59*4882a593Smuzhiyun unsigned int read_latch:6; 60*4882a593Smuzhiyun unsigned int read_setup:8; 61*4882a593Smuzhiyun unsigned int read_cycle:8; 62*4882a593Smuzhiyun unsigned int read_strobe:8; 63*4882a593Smuzhiyun unsigned int write_setup:8; 64*4882a593Smuzhiyun unsigned int write_cycle:8; 65*4882a593Smuzhiyun unsigned int write_strobe:8; 66*4882a593Smuzhiyun unsigned int cs_setup:3; 67*4882a593Smuzhiyun unsigned int vsync_active_high:1; 68*4882a593Smuzhiyun unsigned int vsync_dir_input:1; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */ 72*4882a593Smuzhiyun #define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */ 73*4882a593Smuzhiyun #define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */ 74*4882a593Smuzhiyun #define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */ 75*4882a593Smuzhiyun #define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4) /* Disable dotclock during blanking */ 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun struct shmob_drm_interface_data { 78*4882a593Smuzhiyun enum shmob_drm_interface interface; 79*4882a593Smuzhiyun struct shmob_drm_sys_interface_data sys; 80*4882a593Smuzhiyun unsigned int clk_div; 81*4882a593Smuzhiyun unsigned int flags; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun struct shmob_drm_platform_data { 85*4882a593Smuzhiyun enum shmob_drm_clk_source clk_source; 86*4882a593Smuzhiyun struct shmob_drm_interface_data iface; 87*4882a593Smuzhiyun struct shmob_drm_panel_data panel; 88*4882a593Smuzhiyun struct shmob_drm_backlight_data backlight; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #endif /* __SHMOB_DRM_H__ */ 92