1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * TI pm33xx platform data 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2016-2018 Texas Instruments, Inc. 6*4882a593Smuzhiyun * Dave Gerlach <d-gerlach@ti.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _LINUX_PLATFORM_DATA_PM33XX_H 10*4882a593Smuzhiyun #define _LINUX_PLATFORM_DATA_PM33XX_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/kbuild.h> 13*4882a593Smuzhiyun #include <linux/types.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * WFI Flags for sleep code control 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * These flags allow PM code to exclude certain operations from happening 19*4882a593Smuzhiyun * in the low level ASM code found in sleep33xx.S and sleep43xx.S 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * WFI_FLAG_FLUSH_CACHE: Flush the ARM caches and disable caching. Only 22*4882a593Smuzhiyun * needed when MPU will lose context. 23*4882a593Smuzhiyun * WFI_FLAG_SELF_REFRESH: Let EMIF place DDR memory into self-refresh and 24*4882a593Smuzhiyun * disable EMIF. 25*4882a593Smuzhiyun * WFI_FLAG_SAVE_EMIF: Save context of all EMIF registers and restore in 26*4882a593Smuzhiyun * resume path. Only needed if PER domain loses context 27*4882a593Smuzhiyun * and must also have WFI_FLAG_SELF_REFRESH set. 28*4882a593Smuzhiyun * WFI_FLAG_WAKE_M3: Disable MPU clock or clockdomain to cause wkup_m3 to 29*4882a593Smuzhiyun * execute when WFI instruction executes. 30*4882a593Smuzhiyun * WFI_FLAG_RTC_ONLY: Configure the RTC to enter RTC+DDR mode. 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun #define WFI_FLAG_FLUSH_CACHE BIT(0) 33*4882a593Smuzhiyun #define WFI_FLAG_SELF_REFRESH BIT(1) 34*4882a593Smuzhiyun #define WFI_FLAG_SAVE_EMIF BIT(2) 35*4882a593Smuzhiyun #define WFI_FLAG_WAKE_M3 BIT(3) 36*4882a593Smuzhiyun #define WFI_FLAG_RTC_ONLY BIT(4) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #ifndef __ASSEMBLER__ 39*4882a593Smuzhiyun struct am33xx_pm_sram_addr { 40*4882a593Smuzhiyun void (*do_wfi)(void); 41*4882a593Smuzhiyun unsigned long *do_wfi_sz; 42*4882a593Smuzhiyun unsigned long *resume_offset; 43*4882a593Smuzhiyun unsigned long *emif_sram_table; 44*4882a593Smuzhiyun unsigned long *ro_sram_data; 45*4882a593Smuzhiyun unsigned long resume_address; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun struct am33xx_pm_platform_data { 49*4882a593Smuzhiyun int (*init)(int (*idle)(u32 wfi_flags)); 50*4882a593Smuzhiyun int (*deinit)(void); 51*4882a593Smuzhiyun int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long), 52*4882a593Smuzhiyun unsigned long args); 53*4882a593Smuzhiyun int (*cpu_suspend)(int (*fn)(unsigned long), unsigned long args); 54*4882a593Smuzhiyun void (*begin_suspend)(void); 55*4882a593Smuzhiyun void (*finish_suspend)(void); 56*4882a593Smuzhiyun struct am33xx_pm_sram_addr *(*get_sram_addrs)(void); 57*4882a593Smuzhiyun void (*save_context)(void); 58*4882a593Smuzhiyun void (*restore_context)(void); 59*4882a593Smuzhiyun int (*check_off_mode_enable)(void); 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun struct am33xx_pm_sram_data { 63*4882a593Smuzhiyun u32 wfi_flags; 64*4882a593Smuzhiyun u32 l2_aux_ctrl_val; 65*4882a593Smuzhiyun u32 l2_prefetch_ctrl_val; 66*4882a593Smuzhiyun } __packed __aligned(8); 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun struct am33xx_pm_ro_sram_data { 69*4882a593Smuzhiyun u32 amx3_pm_sram_data_virt; 70*4882a593Smuzhiyun u32 amx3_pm_sram_data_phys; 71*4882a593Smuzhiyun void __iomem *rtc_base_virt; 72*4882a593Smuzhiyun } __packed __aligned(8); 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #endif /* __ASSEMBLER__ */ 75*4882a593Smuzhiyun #endif /* _LINUX_PLATFORM_DATA_PM33XX_H */ 76