1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2010 Wolfram Sang <kernel@pengutronix.de> 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __ASM_ARCH_IMX_ESDHC_H 7*4882a593Smuzhiyun #define __ASM_ARCH_IMX_ESDHC_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/types.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum wp_types { 12*4882a593Smuzhiyun ESDHC_WP_NONE, /* no WP, neither controller nor gpio */ 13*4882a593Smuzhiyun ESDHC_WP_CONTROLLER, /* mmc controller internal WP */ 14*4882a593Smuzhiyun ESDHC_WP_GPIO, /* external gpio pin for WP */ 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun enum cd_types { 18*4882a593Smuzhiyun ESDHC_CD_NONE, /* no CD, neither controller nor gpio */ 19*4882a593Smuzhiyun ESDHC_CD_CONTROLLER, /* mmc controller internal CD */ 20*4882a593Smuzhiyun ESDHC_CD_GPIO, /* external gpio pin for CD */ 21*4882a593Smuzhiyun ESDHC_CD_PERMANENT, /* no CD, card permanently wired to host */ 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /** 25*4882a593Smuzhiyun * struct esdhc_platform_data - platform data for esdhc on i.MX 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * ESDHC_WP(CD)_CONTROLLER type is not available on i.MX25/35. 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * @wp_type: type of write_protect method (see wp_types enum above) 30*4882a593Smuzhiyun * @cd_type: type of card_detect method (see cd_types enum above) 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct esdhc_platform_data { 34*4882a593Smuzhiyun enum wp_types wp_type; 35*4882a593Smuzhiyun enum cd_types cd_type; 36*4882a593Smuzhiyun int max_bus_width; 37*4882a593Smuzhiyun unsigned int delay_line; 38*4882a593Smuzhiyun unsigned int tuning_step; /* The delay cell steps in tuning procedure */ 39*4882a593Smuzhiyun unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */ 40*4882a593Smuzhiyun unsigned int strobe_dll_delay_target; /* The delay cell for strobe pad (read clock) */ 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun #endif /* __ASM_ARCH_IMX_ESDHC_H */ 43