1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Board-specific MMC configuration 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _DAVINCI_MMC_H 7*4882a593Smuzhiyun #define _DAVINCI_MMC_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/types.h> 10*4882a593Smuzhiyun #include <linux/mmc/host.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun struct davinci_mmc_config { 13*4882a593Smuzhiyun /* get_cd()/get_wp() may sleep */ 14*4882a593Smuzhiyun int (*get_cd)(int module); 15*4882a593Smuzhiyun int (*get_ro)(int module); 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun void (*set_power)(int module, bool on); 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* wires == 0 is equivalent to wires == 4 (4-bit parallel) */ 20*4882a593Smuzhiyun u8 wires; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun u32 max_freq; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* any additional host capabilities: OR'd in to mmc->f_caps */ 25*4882a593Smuzhiyun u32 caps; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Number of sg segments */ 28*4882a593Smuzhiyun u8 nr_sg; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun void davinci_setup_mmc(int module, struct davinci_mmc_config *config); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun enum { 33*4882a593Smuzhiyun MMC_CTLR_VERSION_1 = 0, /* DM644x and DM355 */ 34*4882a593Smuzhiyun MMC_CTLR_VERSION_2, /* DA830 */ 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #endif 38