xref: /OK3568_Linux_fs/kernel/include/linux/platform_data/mlxreg.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2017-2020 Mellanox Technologies Ltd.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef __LINUX_PLATFORM_DATA_MLXREG_H
7*4882a593Smuzhiyun #define __LINUX_PLATFORM_DATA_MLXREG_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #define MLXREG_CORE_LABEL_MAX_SIZE	32
10*4882a593Smuzhiyun #define MLXREG_CORE_WD_FEATURE_NOWAYOUT		BIT(0)
11*4882a593Smuzhiyun #define MLXREG_CORE_WD_FEATURE_START_AT_BOOT	BIT(1)
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /**
14*4882a593Smuzhiyun  * enum mlxreg_wdt_type - type of HW watchdog
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * TYPE1 HW watchdog implementation exist in old systems.
17*4882a593Smuzhiyun  * All new systems have TYPE2 HW watchdog.
18*4882a593Smuzhiyun  * TYPE3 HW watchdog can exist on all systems with new CPLD.
19*4882a593Smuzhiyun  * TYPE3 is selected by WD capability bit.
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun enum mlxreg_wdt_type {
22*4882a593Smuzhiyun 	MLX_WDT_TYPE1,
23*4882a593Smuzhiyun 	MLX_WDT_TYPE2,
24*4882a593Smuzhiyun 	MLX_WDT_TYPE3,
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun /**
28*4882a593Smuzhiyun  * struct mlxreg_hotplug_device - I2C device data:
29*4882a593Smuzhiyun  *
30*4882a593Smuzhiyun  * @adapter: I2C device adapter;
31*4882a593Smuzhiyun  * @client: I2C device client;
32*4882a593Smuzhiyun  * @brdinfo: device board information;
33*4882a593Smuzhiyun  * @nr: I2C device adapter number, to which device is to be attached;
34*4882a593Smuzhiyun  *
35*4882a593Smuzhiyun  * Structure represents I2C hotplug device static data (board topology) and
36*4882a593Smuzhiyun  * dynamic data (related kernel objects handles).
37*4882a593Smuzhiyun  */
38*4882a593Smuzhiyun struct mlxreg_hotplug_device {
39*4882a593Smuzhiyun 	struct i2c_adapter *adapter;
40*4882a593Smuzhiyun 	struct i2c_client *client;
41*4882a593Smuzhiyun 	struct i2c_board_info *brdinfo;
42*4882a593Smuzhiyun 	int nr;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /**
46*4882a593Smuzhiyun  * struct mlxreg_core_data - attributes control data:
47*4882a593Smuzhiyun  *
48*4882a593Smuzhiyun  * @label: attribute label;
49*4882a593Smuzhiyun  * @reg: attribute register;
50*4882a593Smuzhiyun  * @mask: attribute access mask;
51*4882a593Smuzhiyun  * @bit: attribute effective bit;
52*4882a593Smuzhiyun  * @capability: attribute capability register;
53*4882a593Smuzhiyun  * @reg_prsnt: attribute presence register;
54*4882a593Smuzhiyun  * @mode: access mode;
55*4882a593Smuzhiyun  * @np - pointer to node platform associated with attribute;
56*4882a593Smuzhiyun  * @hpdev - hotplug device data;
57*4882a593Smuzhiyun  * @health_cntr: dynamic device health indication counter;
58*4882a593Smuzhiyun  * @attached: true if device has been attached after good health indication;
59*4882a593Smuzhiyun  * @regnum: number of registers occupied by multi-register attribute;
60*4882a593Smuzhiyun  */
61*4882a593Smuzhiyun struct mlxreg_core_data {
62*4882a593Smuzhiyun 	char label[MLXREG_CORE_LABEL_MAX_SIZE];
63*4882a593Smuzhiyun 	u32 reg;
64*4882a593Smuzhiyun 	u32 mask;
65*4882a593Smuzhiyun 	u32 bit;
66*4882a593Smuzhiyun 	u32 capability;
67*4882a593Smuzhiyun 	u32 reg_prsnt;
68*4882a593Smuzhiyun 	umode_t	mode;
69*4882a593Smuzhiyun 	struct device_node *np;
70*4882a593Smuzhiyun 	struct mlxreg_hotplug_device hpdev;
71*4882a593Smuzhiyun 	u32 health_cntr;
72*4882a593Smuzhiyun 	bool attached;
73*4882a593Smuzhiyun 	u8 regnum;
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /**
77*4882a593Smuzhiyun  * struct mlxreg_core_item - same type components controlled by the driver:
78*4882a593Smuzhiyun  *
79*4882a593Smuzhiyun  * @data: component data;
80*4882a593Smuzhiyun  * @aggr_mask: group aggregation mask;
81*4882a593Smuzhiyun  * @reg: group interrupt status register;
82*4882a593Smuzhiyun  * @mask: group interrupt mask;
83*4882a593Smuzhiyun  * @capability: group capability register;
84*4882a593Smuzhiyun  * @cache: last status value for elements fro the same group;
85*4882a593Smuzhiyun  * @count: number of available elements in the group;
86*4882a593Smuzhiyun  * @ind: element's index inside the group;
87*4882a593Smuzhiyun  * @inversed: if 0: 0 for signal status is OK, if 1 - 1 is OK;
88*4882a593Smuzhiyun  * @health: true if device has health indication, false in other case;
89*4882a593Smuzhiyun  */
90*4882a593Smuzhiyun struct mlxreg_core_item {
91*4882a593Smuzhiyun 	struct mlxreg_core_data *data;
92*4882a593Smuzhiyun 	u32 aggr_mask;
93*4882a593Smuzhiyun 	u32 reg;
94*4882a593Smuzhiyun 	u32 mask;
95*4882a593Smuzhiyun 	u32 capability;
96*4882a593Smuzhiyun 	u32 cache;
97*4882a593Smuzhiyun 	u8 count;
98*4882a593Smuzhiyun 	u8 ind;
99*4882a593Smuzhiyun 	u8 inversed;
100*4882a593Smuzhiyun 	u8 health;
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /**
104*4882a593Smuzhiyun  * struct mlxreg_core_platform_data - platform data:
105*4882a593Smuzhiyun  *
106*4882a593Smuzhiyun  * @data: instance private data;
107*4882a593Smuzhiyun  * @regmap: register map of parent device;
108*4882a593Smuzhiyun  * @counter: number of instances;
109*4882a593Smuzhiyun  * @features: supported features of device;
110*4882a593Smuzhiyun  * @version: implementation version;
111*4882a593Smuzhiyun  * @identity: device identity name;
112*4882a593Smuzhiyun  * @capability: device capability register;
113*4882a593Smuzhiyun  */
114*4882a593Smuzhiyun struct mlxreg_core_platform_data {
115*4882a593Smuzhiyun 	struct mlxreg_core_data *data;
116*4882a593Smuzhiyun 	void *regmap;
117*4882a593Smuzhiyun 	int counter;
118*4882a593Smuzhiyun 	u32 features;
119*4882a593Smuzhiyun 	u32 version;
120*4882a593Smuzhiyun 	char identity[MLXREG_CORE_LABEL_MAX_SIZE];
121*4882a593Smuzhiyun 	u32 capability;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /**
125*4882a593Smuzhiyun  * struct mlxreg_core_hotplug_platform_data - hotplug platform data:
126*4882a593Smuzhiyun  *
127*4882a593Smuzhiyun  * @items: same type components with the hotplug capability;
128*4882a593Smuzhiyun  * @irq: platform interrupt number;
129*4882a593Smuzhiyun  * @regmap: register map of parent device;
130*4882a593Smuzhiyun  * @counter: number of the components with the hotplug capability;
131*4882a593Smuzhiyun  * @cell: location of top aggregation interrupt register;
132*4882a593Smuzhiyun  * @mask: top aggregation interrupt common mask;
133*4882a593Smuzhiyun  * @cell_low: location of low aggregation interrupt register;
134*4882a593Smuzhiyun  * @mask_low: low aggregation interrupt common mask;
135*4882a593Smuzhiyun  * @deferred_nr: I2C adapter number must be exist prior probing execution;
136*4882a593Smuzhiyun  * @shift_nr: I2C adapter numbers must be incremented by this value;
137*4882a593Smuzhiyun  */
138*4882a593Smuzhiyun struct mlxreg_core_hotplug_platform_data {
139*4882a593Smuzhiyun 	struct mlxreg_core_item *items;
140*4882a593Smuzhiyun 	int irq;
141*4882a593Smuzhiyun 	void *regmap;
142*4882a593Smuzhiyun 	int counter;
143*4882a593Smuzhiyun 	u32 cell;
144*4882a593Smuzhiyun 	u32 mask;
145*4882a593Smuzhiyun 	u32 cell_low;
146*4882a593Smuzhiyun 	u32 mask_low;
147*4882a593Smuzhiyun 	int deferred_nr;
148*4882a593Smuzhiyun 	int shift_nr;
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun #endif /* __LINUX_PLATFORM_DATA_MLXREG_H */
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